diff --git a/Testing/cmsis_build/configs/ARM_VHT_Corstone_300_config_AC6.txt b/Testing/cmsis_build/configs/ARM_VHT_Corstone_300_config_ext.txt
similarity index 100%
rename from Testing/cmsis_build/configs/ARM_VHT_Corstone_300_config_AC6.txt
rename to Testing/cmsis_build/configs/ARM_VHT_Corstone_300_config_ext.txt
diff --git a/Testing/cmsis_build/linker_scripts/ARMCM0P/region_defs.h b/Testing/cmsis_build/linker_scripts/ARMCM0P/region_defs.h
index 462ccaed..7d523c01 100644
--- a/Testing/cmsis_build/linker_scripts/ARMCM0P/region_defs.h
+++ b/Testing/cmsis_build/linker_scripts/ARMCM0P/region_defs.h
@@ -17,7 +17,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00040000
-#define __ROM0_SIZE 0x00100000
+#define __ROM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __ROM0_DEFAULT 1
@@ -38,7 +38,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00020000
-#define __RAM0_SIZE 0x00120000
+#define __RAM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __RAM0_DEFAULT 1
diff --git a/Testing/cmsis_build/linker_scripts/ARMCM3/region_defs.h b/Testing/cmsis_build/linker_scripts/ARMCM3/region_defs.h
index c82cdb67..8b2ab0ca 100644
--- a/Testing/cmsis_build/linker_scripts/ARMCM3/region_defs.h
+++ b/Testing/cmsis_build/linker_scripts/ARMCM3/region_defs.h
@@ -17,7 +17,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00040000
-#define __ROM0_SIZE 0x00040000
+#define __ROM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __ROM0_DEFAULT 1
@@ -38,7 +38,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00020000
-#define __RAM0_SIZE 0x00040000
+#define __RAM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __RAM0_DEFAULT 1
diff --git a/Testing/cmsis_build/linker_scripts/ARMCM33_DSP_FP/region_defs.h b/Testing/cmsis_build/linker_scripts/ARMCM33_DSP_FP/region_defs.h
index d7a8478d..8b2ab0ca 100644
--- a/Testing/cmsis_build/linker_scripts/ARMCM33_DSP_FP/region_defs.h
+++ b/Testing/cmsis_build/linker_scripts/ARMCM33_DSP_FP/region_defs.h
@@ -17,7 +17,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00040000
-#define __ROM0_SIZE 0x00100000
+#define __ROM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __ROM0_DEFAULT 1
@@ -38,7 +38,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00020000
-#define __RAM0_SIZE 0x00120000
+#define __RAM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __RAM0_DEFAULT 1
diff --git a/Testing/cmsis_build/linker_scripts/ARMCM4/region_defs.h b/Testing/cmsis_build/linker_scripts/ARMCM4/region_defs.h
index d7a8478d..8b2ab0ca 100644
--- a/Testing/cmsis_build/linker_scripts/ARMCM4/region_defs.h
+++ b/Testing/cmsis_build/linker_scripts/ARMCM4/region_defs.h
@@ -17,7 +17,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00040000
-#define __ROM0_SIZE 0x00100000
+#define __ROM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __ROM0_DEFAULT 1
@@ -38,7 +38,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00020000
-#define __RAM0_SIZE 0x00120000
+#define __RAM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __RAM0_DEFAULT 1
diff --git a/Testing/cmsis_build/linker_scripts/ARMCM7_DP/region_defs.h b/Testing/cmsis_build/linker_scripts/ARMCM7_DP/region_defs.h
index d7a8478d..8b2ab0ca 100644
--- a/Testing/cmsis_build/linker_scripts/ARMCM7_DP/region_defs.h
+++ b/Testing/cmsis_build/linker_scripts/ARMCM7_DP/region_defs.h
@@ -17,7 +17,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00040000
-#define __ROM0_SIZE 0x00100000
+#define __ROM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __ROM0_DEFAULT 1
@@ -38,7 +38,7 @@
 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
 //   <i> Defines size of memory region.
 //   <i> Default: 0x00020000
-#define __RAM0_SIZE 0x00120000
+#define __RAM0_SIZE 0x00200000
 //   <q>Default region
 //   <i> Enables memory region globally for the application.
 #define __RAM0_DEFAULT 1
diff --git a/Testing/cmsis_build/linker_scripts/clang_sse300_mps3.sct b/Testing/cmsis_build/linker_scripts/clang_sse300_mps3.sct
index 09aa0799..9c10fb1e 100644
--- a/Testing/cmsis_build/linker_scripts/clang_sse300_mps3.sct
+++ b/Testing/cmsis_build/linker_scripts/clang_sse300_mps3.sct
@@ -58,9 +58,9 @@ MEMORY
   ROM3  (rx!w)  : ORIGIN = __ROM3_BASE, LENGTH = __ROM3_SIZE
 #endif
 
-  RAM0  (w!rx) : ORIGIN = S_DATA_START, LENGTH = S_DATA_SIZE + 0x000000
-#if S_DDR4_SIZE > 0
-  RAM1  (rw) : ORIGIN = S_DDR4_START, LENGTH = S_DDR4_SIZE + 0x000000
+  RAM0  (w!rx) : ORIGIN = S_DDR4_START, LENGTH = S_DDR4_SIZE + 0x000000
+#if __RAM1_SIZE > 0
+  RAM1  (rw) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE + 0x000000
 #endif
 #if __RAM2_SIZE > 0
   RAM2  (w!rx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
@@ -87,7 +87,7 @@ SECTIONS
 		KEEP (*(.text.init.enter))
 		KEEP (*(.data.init.enter))
 		KEEP (*(SORT_BY_NAME(.init) SORT_BY_NAME(.init.*)))
-	} >ROM0 AT>ROM0 :text
+	} >RAM0 AT>RAM0 :text
 
 	.text : {
 
@@ -133,19 +133,19 @@ SECTIONS
 		KEEP (*(.fini_array .dtors))
 		PROVIDE_HIDDEN ( __fini_array_end = . );
 
-	} >ROM0 AT>ROM0 :text
+	} >RAM0 AT>RAM0 :text
 
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 	.veneers :
 	{
 		. = ALIGN(32);
 		KEEP(*(.gnu.sgstubs))
-	} > ROM0 AT>ROM0 :text
+	} > RAM0 AT>RAM0 :text
 #endif
 
 	.toc : {
 		*(.toc .toc.*)
-	} >ROM0 AT>ROM0 :text
+	} >RAM0 AT>RAM0 :text
 
 	/* additional sections when compiling with C++ exception support */
 
@@ -153,7 +153,7 @@ SECTIONS
 		*(.gcc_except_table *.gcc_except_table.*)
 		KEEP (*(.eh_frame .eh_frame.*))
 		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} >ROM0 AT>ROM0 :text
+	} >RAM0 AT>RAM0 :text
 
 	.except_unordered : {
 		. = ALIGN(8);
@@ -161,7 +161,7 @@ SECTIONS
 		PROVIDE(__exidx_start = .);
 		*(.ARM.exidx*)
 		PROVIDE(__exidx_end = .);
-	} >ROM0 AT>ROM0 :text
+	} >RAM0 AT>RAM0 :text
 
 
 	/*
@@ -188,7 +188,7 @@ SECTIONS
 		PROVIDE( __global_pointer$ = . + 0x800 );
 		*(.sdata .sdata.* .sdata2.*)
 		*(.gnu.linkonce.s.*)
-	} >RAM1 AT>ROM0 :ram_init
+	} >RAM0 AT>RAM0 :ram_init
 	PROVIDE(__data_start = ADDR(.data));
 	PROVIDE(__data_source = LOADADDR(.data));
 
@@ -204,7 +204,7 @@ SECTIONS
 		*(.tdata .tdata.* .gnu.linkonce.td.*)
 		PROVIDE(__data_end = .);
 		PROVIDE(__tdata_end = .);
-	} >RAM1 AT>ROM0 :tls :ram_init
+	} >RAM0 AT>RAM0 :tls :ram_init
 	PROVIDE( __tls_base = ADDR(.tdata));
 	PROVIDE( __tdata_start = ADDR(.tdata));
 	PROVIDE( __tdata_source = LOADADDR(.tdata) );
@@ -224,7 +224,7 @@ SECTIONS
 		*(.tcommon)
 		PROVIDE( __tls_end = . );
 		PROVIDE( __tbss_end = . );
-	} >RAM1 AT>RAM1 :tls :ram
+	} >RAM0 AT>RAM0 :tls :ram
 	PROVIDE( __bss_start = ADDR(.tbss));
 	PROVIDE( __tbss_start = ADDR(.tbss));
 	PROVIDE( __tbss_offset = ADDR(.tbss) - ADDR(.tdata) );
@@ -260,7 +260,7 @@ SECTIONS
 		/* Align the heap */
 		. = ALIGN(8);
 		__bss_end = .;
-	} >RAM1 AT>RAM1 :ram
+	} >RAM0 AT>RAM0 :ram
 	PROVIDE( __non_tls_bss_start = ADDR(.bss) );
 	PROVIDE( __end = __bss_end );
 	PROVIDE( _end = __bss_end );
@@ -278,21 +278,21 @@ SECTIONS
 #endif
 	.heap (NOLOAD) : {
 		. += __heap_size;
-	} >RAM1 :ram
+	} >RAM0 :ram
 
 	/* Define a stack region to make sure it fits in memory */
-	PROVIDE(__stack = ORIGIN(RAM1) + LENGTH(RAM1) - __STACKSEAL_SIZE);
+	PROVIDE(__stack = ORIGIN(RAM0) + LENGTH(RAM0) - __STACKSEAL_SIZE);
 	PROVIDE(__stack_limit = __stack - STACK_SIZE);
 	.stack (__stack_limit) (NOLOAD) : {
 		. += STACK_SIZE;
-	} >RAM1 :ram
+	} >RAM0 :ram
 
 #if __STACKSEAL_SIZE > 0
 	PROVIDE(__stack_seal = __stack);
   	.stackseal (__stack) (NOLOAD) :
   	{
     	. += __STACKSEAL_SIZE;
-  	} >RAM1 :ram
+  	} >RAM0 :ram
 #endif
 
 	/* Throw away C++ exception handling information */
diff --git a/Testing/cmsis_build/linker_scripts/gcc_sse300_mps3.ld b/Testing/cmsis_build/linker_scripts/gcc_sse300_mps3.ld
index acc44ac9..691e6685 100644
--- a/Testing/cmsis_build/linker_scripts/gcc_sse300_mps3.ld
+++ b/Testing/cmsis_build/linker_scripts/gcc_sse300_mps3.ld
@@ -41,9 +41,9 @@ MEMORY
   ROM3  (rx)  : ORIGIN = __ROM3_BASE, LENGTH = __ROM3_SIZE
 #endif
 
-  RAM0  (rw) : ORIGIN = S_DATA_START, LENGTH = S_DATA_SIZE
-#if S_DDR4_SIZE > 0
-  RAM1  (rw) : ORIGIN = S_DDR4_START, LENGTH = S_DDR4_SIZE
+  RAM0  (rw) : ORIGIN = S_DDR4_START, LENGTH = S_DDR4_SIZE
+#if __RAM1_SIZE > 0
+  RAM1  (rw) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
 #endif
 #if __RAM2_SIZE > 0
   RAM2  (rw) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
@@ -112,25 +112,25 @@ SECTIONS
     /* *(.rodata*) */
 
     KEEP(*(.eh_frame*))
-  } > ROM0
+  } > RAM0
 
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
   .gnu.sgstubs :
   {
     . = ALIGN(32);
-  } > ROM0
+  } > RAM0
 #endif
 
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > ROM0
+  } > RAM0
 
   __exidx_start = .;
   .ARM.exidx :
   {
     *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } > ROM0
+  } > RAM0
   __exidx_end = .;
 
   .copy.table :
@@ -149,7 +149,7 @@ SECTIONS
     LONG (SIZEOF(.data2) / 4)
 */
     __copy_table_end__ = .;
-  } > ROM0
+  } > RAM0
 
   .zero.table :
   {
@@ -167,7 +167,7 @@ SECTIONS
     LONG (SIZEOF(.bss2) / 4)
 */
     __zero_table_end__ = .;
-  } > ROM0
+  } > RAM0
 
   /*
    * This __etext variable is kept for backward compatibility with older,
@@ -208,7 +208,7 @@ SECTIONS
     /* All data end */
     __data_end__ = .;
 
-  } > RAM0 AT > ROM0
+  } > RAM0
 
   /*
    * Secondary data section, optional
@@ -239,7 +239,7 @@ SECTIONS
     *(COMMON)
     . = ALIGN(4);
     __bss_end__ = .;
-  } > RAM0 AT > RAM0
+  } > RAM0
 
   /*
    * Secondary bss section, optional
@@ -268,26 +268,26 @@ SECTIONS
     . = . + HEAP_SIZE;
     . = ALIGN(8);
     __HeapLimit = .;
-  } > RAM1
+  } > RAM0
 
-  .stack (ORIGIN(RAM1) + LENGTH(RAM1) - STACK_SIZE - __STACKSEAL_SIZE) (NOLOAD) :
+  .stack (ORIGIN(RAM0) + LENGTH(RAM0) - STACK_SIZE - __STACKSEAL_SIZE) (NOLOAD) :
   {
     . = ALIGN(8);
     __StackLimit = .;
     . = . + STACK_SIZE;
     . = ALIGN(8);
     __StackTop = .;
-  } > RAM1
+  } > RAM0
   PROVIDE(__stack = __StackTop);
 
 #if __STACKSEAL_SIZE > 0
-  .stackseal (ORIGIN(RAM1) + LENGTH(RAM1) - __STACKSEAL_SIZE) (NOLOAD) :
+  .stackseal (ORIGIN(RAM0) + LENGTH(RAM0) - __STACKSEAL_SIZE) (NOLOAD) :
   {
     . = ALIGN(8);
     __StackSeal = .;
     . = . + 8;
     . = ALIGN(8);
-  } > RAM1
+  } > RAM0
 #endif
 
   /* Check if data + heap + stack exceeds RAM limit */
diff --git a/Testing/cmsis_build/runall.py b/Testing/cmsis_build/runall.py
index 46642db5..0c329e85 100644
--- a/Testing/cmsis_build/runall.py
+++ b/Testing/cmsis_build/runall.py
@@ -110,9 +110,9 @@ def run(*args,mustPrint=False,dumpStdErr=True):
 configFiles={
     "CS310":"ARM_VHT_Corstone_310_config.txt",
     "CS300":{
-       "AC6":"ARM_VHT_Corstone_300_config_AC6.txt",
-       "GCC":"ARM_VHT_Corstone_300_config.txt",
-       "CLANG":"ARM_VHT_Corstone_300_config.txt"
+       "AC6":"ARM_VHT_Corstone_300_config_ext.txt",
+       "GCC":"ARM_VHT_Corstone_300_config_ext.txt",
+       "CLANG":"ARM_VHT_Corstone_300_config_ext.txt"
     },
     "M55":"ARM_VHT_MPS2_M55_config.txt",
     "M33_DSP_FP":"ARM_VHT_MPS2_M33_DSP_FP_config.txt",
@@ -201,10 +201,10 @@ def runAVH(build,core,compiler):
 
 
 #allSuites=[
-#("DECIMF64","../Output.pickle"),
-#("BasicTestsF32","../Output.pickle"),
+#("TransformCF64","../Output.pickle"),
+##("BasicTestsF32","../Output.pickle"),
 #("BasicTestsF16","../Output_f16.pickle"),
-#("UnaryTestsF16","../Output_f16.pickle"),
+##("UnaryTestsF16","../Output_f16.pickle"),
 #]
 
 # Solution and build file for all
@@ -246,15 +246,15 @@ def runAVH(build,core,compiler):
 #compil_config={
 #    'AC6':[
 #      #("VHT-Corstone-300-NOMVE","CS300"),
-#      ("VHT-Corstone-300","CS300"),
+#      ("VHT_M33","M33_DSP_FP"),
 #    ],
 #    'GCC':[
-#      ("VHT-Corstone-300","CS300"),
+#      ("VHT_M33","M33_DSP_FP"),
 #     # ("VHT-Corstone-300-NOMVE","CS300"),
 #    ],
 #    'CLANG':[
 #      #("VHT-Corstone-300-NOMVE","CS300"),
-#      ("VHT-Corstone-300","CS300"),
+#      ("VHT_M33","M33_DSP_FP"),
 #    ]
 #}