From 4b4ed45ba40be2efd1959bae1daf136b108c8cab Mon Sep 17 00:00:00 2001 From: Kiran Upadhyayula Date: Thu, 5 Sep 2024 14:29:27 -0700 Subject: [PATCH] Integrate abr into 2.0 --- src/aes/config/aes.vf | 2 +- src/caliptra_prim/config/caliptra_prim.vf | 2 +- src/caliptra_prim/config/caliptra_prim_pkg.vf | 1 + .../config/caliptra_prim_generic.vf | 2 +- src/csrng/config/csrng_tb.vf | 2 +- src/datavault/rtl/dv_reg.sv | 58 +- src/doe/rtl/doe_reg.sv | 214 +- src/ecc/rtl/ecc_reg.sv | 286 +- src/ecc/uvmf_ecc/config/uvmf_ecc.vf | 4 +- src/entropy_src/config/entropy_src.vf | 2 +- src/entropy_src/config/entropy_src_tb.vf | 2 +- src/hmac/rtl/hmac_reg.sv | 334 +- src/hmac/uvmf_2022/config/uvmf_hmac.vf | 5 +- src/integration/asserts/caliptra_top_sva.sv | 1 + src/integration/config/caliptra_top.vf | 158 +- src/integration/config/caliptra_top_tb.vf | 158 +- .../config/caliptra_top_trng_tb.vf | 156 + src/integration/config/compile.yml | 5 +- src/integration/rtl/caliptra_reg.h | 3814 +++++++++++++++++ src/integration/rtl/caliptra_reg.rdl | 2 + src/integration/rtl/caliptra_reg_defines.svh | 3814 +++++++++++++++++ src/integration/rtl/caliptra_top.sv | 27 + src/integration/rtl/config_defines.svh | 13 +- .../tb/caliptra_top_tb_services.sv | 180 +- .../c_intr_handler/c_intr_handler.c | 2 + .../test_suites/c_intr_handler/caliptra_isr.h | 17 + .../test_suites/caliptra_demo/caliptra_isr.h | 15 + .../test_suites/caliptra_fmc/caliptra_isr.h | 17 + .../test_suites/caliptra_rt/caliptra_isr.h | 17 + .../test_suites/caliptra_rt/caliptra_rt.c | 2 + .../test_suites/caliptra_top/caliptra_isr.h | 23 + .../hello_world_iccm/caliptra_isr.h | 17 + .../test_suites/iccm_lock/caliptra_isr.h | 17 + .../test_suites/iccm_lock/iccm_lock.c | 2 + .../test_suites/includes/caliptra_defines.h | 14 +- .../test_suites/infinite_loop/caliptra_isr.h | 5 + .../libs/caliptra_isr/caliptra_isr.c | 28 +- .../test_suites/libs/mldsa/mldsa.c | 383 ++ .../test_suites/libs/mldsa/mldsa.h | 43 + .../test_suites/libs/riscv_hw_if/link.ld | 2 +- .../memCpy_ROM_to_dccm/caliptra_isr.h | 17 + .../memCpy_dccm_to_iccm/caliptra_isr.h | 17 + .../pv_hash_and_sign/caliptra_isr.h | 17 + .../pv_hash_and_sign/pv_hash_and_sign.c | 2 + .../test_suites/pv_hash_reset/caliptra_isr.h | 2 + .../randomized_pcr_signing/caliptra_isr.h | 17 + .../randomized_pcr_signing.c | 2 + .../smoke_test_ahb_mux/caliptra_isr.h | 17 + .../smoke_test_cg_wdt/caliptra_isr.h | 5 + .../smoke_test_cg_wdt/smoke_test_cg_wdt.c | 2 + .../smoke_test_clk_gating/caliptra_isr.h | 4 + .../smoke_test_clk_gating.c | 2 + .../smoke_test_datavault_basic/caliptra_isr.h | 17 + .../smoke_test_datavault_basic.c | 2 + .../smoke_test_datavault_lock/caliptra_isr.h | 17 + .../smoke_test_datavault_lock.c | 2 + .../smoke_test_datavault_mini/caliptra_isr.h | 17 + .../smoke_test_datavault_mini.c | 2 + .../smoke_test_datavault_reset/caliptra_isr.h | 17 + .../smoke_test_datavault_reset.c | 2 + .../smoke_test_doe_cg/caliptra_isr.h | 17 + .../smoke_test_doe_cg/smoke_test_doe_cg.c | 2 + .../smoke_test_doe_rand/caliptra_isr.h | 17 + .../smoke_test_doe_rand/smoke_test_doe_rand.c | 2 + .../smoke_test_doe_scan/caliptra_isr.h | 17 + .../smoke_test_doe_scan/smoke_test_doe_scan.c | 2 + .../test_suites/smoke_test_ecc/caliptra_isr.h | 17 + .../smoke_test_ecc/smoke_test_ecc.c | 2 + .../caliptra_isr.h | 17 + .../smoke_test_ecc_errortrigger.c | 2 + .../caliptra_isr.h | 17 + .../smoke_test_fw_kv_backtoback_hmac.c | 2 + .../smoke_test_hmac/caliptra_isr.h | 17 + .../smoke_test_hmac/smoke_test_hmac.c | 2 + .../smoke_test_hw_config/caliptra_isr.h | 17 + .../smoke_test_hw_config.c | 2 + .../smoke_test_iccm_reset/caliptra_isr.h | 17 + .../smoke_test_iccm_reset.c | 2 + .../test_suites/smoke_test_kv/caliptra_isr.h | 17 + .../smoke_test_kv_cg/caliptra_isr.h | 17 + .../smoke_test_kv_cg/smoke_test_kv_cg.c | 2 + .../smoke_test_kv_crypto_flow/caliptra_isr.h | 17 + .../smoke_test_kv_crypto_flow.c | 2 + .../smoke_test_kv_ecc_flow/caliptra_isr.h | 17 + .../smoke_test_kv_ecc_flow.c | 2 + .../smoke_test_kv_hmac_flow/caliptra_isr.h | 17 + .../smoke_test_kv_hmac_flow.c | 2 + .../caliptra_isr.h | 17 + .../smoke_test_kv_hmac_multiblock_flow.c | 2 + .../caliptra_isr.h | 17 + .../smoke_test_kv_securitystate.c | 2 + .../smoke_test_kv_sha512_flow/caliptra_isr.h | 17 + .../smoke_test_kv_sha512_flow.c | 2 + .../smoke_test_kv_uds_reset/caliptra_isr.h | 17 + .../smoke_test_kv_uds_reset.c | 2 + .../smoke_test_mbox/caliptra_isr.h | 17 + .../smoke_test_mbox/smoke_test_mbox.c | 2 + .../smoke_test_mbox_cg/caliptra_isr.h | 17 + .../smoke_test_mbox_cg/smoke_test_mbox_cg.c | 2 + .../smoke_test_mldsa/caliptra_isr.h | 265 ++ .../smoke_test_mldsa/smoke_test_mldsa.c | 3247 ++++++++++++++ .../smoke_test_mldsa/smoke_test_mldsa.yml | 3 + .../smoke_test_mldsa_kat/caliptra_isr.h | 265 ++ .../smoke_test_mldsa_kat.c | 178 + .../smoke_test_mldsa_kat.yml | 3 + .../smoke_test_mldsa_rand/caliptra_isr.h | 265 ++ .../smoke_test_mldsa_rand.c | 3243 ++++++++++++++ .../smoke_test_mldsa_rand.yml | 3 + .../smoke_test_pcr_signing/caliptra_isr.h | 17 + .../smoke_test_pcr_signing.c | 2 + .../smoke_test_pcr_zeroize/caliptra_isr.h | 17 + .../smoke_test_pcr_zeroize.c | 2 + .../smoke_test_qspi/caliptra_isr.h | 17 + .../smoke_test_qspi/smoke_test_qspi.c | 2 + .../test_suites/smoke_test_ras/caliptra_isr.h | 17 + .../smoke_test_ras/smoke_test_ras.c | 2 + .../smoke_test_sha256/caliptra_isr.h | 17 + .../smoke_test_sha256/smoke_test_sha256.c | 2 + .../smoke_test_sha256_wntz/caliptra_isr.h | 17 + .../smoke_test_sha256_wntz.c | 2 + .../caliptra_isr.h | 17 + .../smoke_test_sha256_wntz_rand.c | 2 + .../smoke_test_sha512/caliptra_isr.h | 17 + .../smoke_test_sha512/smoke_test_sha512.c | 2 + .../smoke_test_sha_accel/caliptra_isr.h | 4 + .../smoke_test_sram_ecc/caliptra_isr.h | 17 + .../smoke_test_sram_ecc/smoke_test_sram_ecc.c | 2 + .../smoke_test_trng/caliptra_isr.h | 17 + .../smoke_test_trng/smoke_test_trng.c | 2 + .../smoke_test_uart/caliptra_isr.h | 17 + .../smoke_test_uart/smoke_test_uart.c | 2 + .../smoke_test_veer/caliptra_isr.h | 17 + .../test_suites/smoke_test_wdt/caliptra_isr.h | 4 + .../smoke_test_wdt/smoke_test_wdt.c | 2 + .../smoke_test_wdt_rst/caliptra_isr.h | 4 + .../smoke_test_wdt_rst/smoke_test_wdt_rst.c | 2 + .../smoke_test_zeroize_crypto/caliptra_isr.h | 17 + .../smoke_test_zeroize_crypto.c | 2 + .../config/uvmf_caliptra_top.vf | 160 +- .../config/uvmf_caliptra_top_itrng.vf | 160 +- src/keyvault/rtl/kv_reg.sv | 64 +- .../qvip_ahb_lite_slave_params_pkg.sv | 4 +- src/mldsa/rtl/mldsa_87_reg.rdl | 521 +++ src/mldsa/rtl/mldsa_reg.rdl | 500 +++ src/mldsa/rtl/mldsa_reg.sv | 1069 +++++ src/mldsa/rtl/mldsa_reg_pkg.sv | 279 ++ src/mldsa/rtl/mldsa_reg_uvm.sv | 976 +++++ src/mldsa/tb/.keygen_input_for_test.hex.swp | Bin 0 -> 12288 bytes src/mldsa/tb/.keygen_output_for_test.hex.swp | Bin 0 -> 24576 bytes src/mldsa/tb/.signing_input.hex.swp | Bin 0 -> 24576 bytes src/mldsa/tb/.signing_output.hex.swp | Bin 0 -> 24576 bytes src/mldsa/tb/keygen_input_for_test.hex | 2 + src/mldsa/tb/keygen_output_for_test.hex | 3 + src/mldsa/tb/signing_input.hex | 3 + src/mldsa/tb/signing_output.hex | 3 + src/mldsa/tb/smoke_test_mldsa_vector.hex | 7 + src/mldsa/tb/test_dilithium5 | Bin 0 -> 71344 bytes src/pcrvault/rtl/pv_reg.sv | 34 +- src/sha256/rtl/sha256_reg.sv | 232 +- src/sha512/rtl/sha512_reg.sv | 328 +- src/soc_ifc/rtl/mbox_csr.sv | 88 +- src/soc_ifc/rtl/sha512_acc_csr.sv | 250 +- src/soc_ifc/rtl/soc_ifc_reg.sv | 952 ++-- src/spi_host/config/spi_host.vf | 2 +- src/uart/config/uart.vf | 2 +- src/uart/config/uart_tb.vf | 2 +- tools/scripts/Makefile | 1 + tools/scripts/reg_doc_gen.py | 13 + tools/scripts/reg_doc_gen.sh | 1 + tools/scripts/reg_gen.sh | 1 + 170 files changed, 21874 insertions(+), 1920 deletions(-) create mode 100644 src/integration/test_suites/libs/mldsa/mldsa.c create mode 100644 src/integration/test_suites/libs/mldsa/mldsa.h create mode 100644 src/integration/test_suites/smoke_test_mldsa/caliptra_isr.h create mode 100644 src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.c create mode 100644 src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.yml create mode 100644 src/integration/test_suites/smoke_test_mldsa_kat/caliptra_isr.h create mode 100644 src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.c create mode 100644 src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.yml create mode 100644 src/integration/test_suites/smoke_test_mldsa_rand/caliptra_isr.h create mode 100644 src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.c create mode 100644 src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.yml create mode 100644 src/mldsa/rtl/mldsa_87_reg.rdl create mode 100644 src/mldsa/rtl/mldsa_reg.rdl create mode 100644 src/mldsa/rtl/mldsa_reg.sv create mode 100644 src/mldsa/rtl/mldsa_reg_pkg.sv create mode 100644 src/mldsa/rtl/mldsa_reg_uvm.sv create mode 100644 src/mldsa/tb/.keygen_input_for_test.hex.swp create mode 100644 src/mldsa/tb/.keygen_output_for_test.hex.swp create mode 100644 src/mldsa/tb/.signing_input.hex.swp create mode 100644 src/mldsa/tb/.signing_output.hex.swp create mode 100644 src/mldsa/tb/keygen_input_for_test.hex create mode 100644 src/mldsa/tb/keygen_output_for_test.hex create mode 100644 src/mldsa/tb/signing_input.hex create mode 100644 src/mldsa/tb/signing_output.hex create mode 100644 src/mldsa/tb/smoke_test_mldsa_vector.hex create mode 100755 src/mldsa/tb/test_dilithium5 diff --git a/src/aes/config/aes.vf b/src/aes/config/aes.vf index 9592049a5..c3f49375b 100644 --- a/src/aes/config/aes.vf +++ b/src/aes/config/aes.vf @@ -88,4 +88,4 @@ ${CALIPTRA_ROOT}/src/aes/rtl/aes_shift_rows.sv ${CALIPTRA_ROOT}/src/aes/rtl/aes_mix_single_column.sv ${CALIPTRA_ROOT}/src/aes/rtl/aes_cipher_control.sv ${CALIPTRA_ROOT}/src/aes/rtl/aes_prng_masking.sv -${CALIPTRA_ROOT}/src/aes/rtl/aes_key_expand.sv +${CALIPTRA_ROOT}/src/aes/rtl/aes_key_expand.sv \ No newline at end of file diff --git a/src/caliptra_prim/config/caliptra_prim.vf b/src/caliptra_prim/config/caliptra_prim.vf index 59740aec8..6f4015742 100644 --- a/src/caliptra_prim/config/caliptra_prim.vf +++ b/src/caliptra_prim/config/caliptra_prim.vf @@ -59,4 +59,4 @@ ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_fifo_sync.sv ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_arbiter_ppc.sv ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_sum_tree.sv ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_subreg_ext.sv -${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_edge_detector.sv +${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_edge_detector.sv \ No newline at end of file diff --git a/src/caliptra_prim/config/caliptra_prim_pkg.vf b/src/caliptra_prim/config/caliptra_prim_pkg.vf index f97774292..b3a1e93ff 100644 --- a/src/caliptra_prim/config/caliptra_prim_pkg.vf +++ b/src/caliptra_prim/config/caliptra_prim_pkg.vf @@ -6,3 +6,4 @@ ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_mubi_pkg.sv ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_cipher_pkg.sv ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_pkg.sv ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_sparse_fsm_pkg.sv +${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_sparse_fsm_pkg.sv \ No newline at end of file diff --git a/src/caliptra_prim_generic/config/caliptra_prim_generic.vf b/src/caliptra_prim_generic/config/caliptra_prim_generic.vf index 38af67734..46b307534 100644 --- a/src/caliptra_prim_generic/config/caliptra_prim_generic.vf +++ b/src/caliptra_prim_generic/config/caliptra_prim_generic.vf @@ -1,4 +1,4 @@ +incdir+${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl ${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop_en.sv ${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop.sv -${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl/caliptra_prim_generic_buf.sv +${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl/caliptra_prim_generic_buf.sv \ No newline at end of file diff --git a/src/csrng/config/csrng_tb.vf b/src/csrng/config/csrng_tb.vf index 4793e52ec..405dc59a5 100644 --- a/src/csrng/config/csrng_tb.vf +++ b/src/csrng/config/csrng_tb.vf @@ -103,4 +103,4 @@ ${CALIPTRA_ROOT}/src/csrng/rtl/csrng_block_encrypt.sv ${CALIPTRA_ROOT}/src/csrng/rtl/csrng_state_db.sv ${CALIPTRA_ROOT}/src/csrng/rtl/csrng_cmd_stage.sv ${CALIPTRA_ROOT}/src/csrng/rtl/csrng.sv -${CALIPTRA_ROOT}/src/csrng/tb/csrng_tb.sv +${CALIPTRA_ROOT}/src/csrng/tb/csrng_tb.sv \ No newline at end of file diff --git a/src/datavault/rtl/dv_reg.sv b/src/datavault/rtl/dv_reg.sv index 3cf9a61b9..8484364f0 100644 --- a/src/datavault/rtl/dv_reg.sv +++ b/src/datavault/rtl/dv_reg.sv @@ -235,10 +235,8 @@ module dv_reg ( for(genvar i0=0; i0<10; i0++) begin // Field: dv_reg.StickyDataVaultCtrl[].lock_entry always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.StickyDataVaultCtrl[i0].lock_entry.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.StickyDataVaultCtrl[i0].lock_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.StickyDataVaultCtrl[i0] && decoded_req_is_wr && !(hwif_in.StickyDataVaultCtrl[i0].lock_entry.swwel)) begin // SW write next_c = (field_storage.StickyDataVaultCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -259,10 +257,8 @@ module dv_reg ( for(genvar i1=0; i1<12; i1++) begin // Field: dv_reg.STICKY_DATA_VAULT_ENTRY[][].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.STICKY_DATA_VAULT_ENTRY[i0][i1].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.STICKY_DATA_VAULT_ENTRY[i0][i1].data.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.STICKY_DATA_VAULT_ENTRY[i0][i1] && decoded_req_is_wr && !(hwif_in.STICKY_DATA_VAULT_ENTRY[i0][i1].data.swwel)) begin // SW write next_c = (field_storage.STICKY_DATA_VAULT_ENTRY[i0][i1].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -282,10 +278,8 @@ module dv_reg ( for(genvar i0=0; i0<10; i0++) begin // Field: dv_reg.DataVaultCtrl[].lock_entry always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DataVaultCtrl[i0].lock_entry.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.DataVaultCtrl[i0].lock_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DataVaultCtrl[i0] && decoded_req_is_wr && !(hwif_in.DataVaultCtrl[i0].lock_entry.swwel)) begin // SW write next_c = (field_storage.DataVaultCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -306,10 +300,8 @@ module dv_reg ( for(genvar i1=0; i1<12; i1++) begin // Field: dv_reg.DATA_VAULT_ENTRY[][].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DATA_VAULT_ENTRY[i0][i1].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.DATA_VAULT_ENTRY[i0][i1].data.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DATA_VAULT_ENTRY[i0][i1] && decoded_req_is_wr && !(hwif_in.DATA_VAULT_ENTRY[i0][i1].data.swwel)) begin // SW write next_c = (field_storage.DATA_VAULT_ENTRY[i0][i1].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -329,10 +321,8 @@ module dv_reg ( for(genvar i0=0; i0<10; i0++) begin // Field: dv_reg.LockableScratchRegCtrl[].lock_entry always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.LockableScratchRegCtrl[i0].lock_entry.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.LockableScratchRegCtrl[i0].lock_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.LockableScratchRegCtrl[i0] && decoded_req_is_wr && !(hwif_in.LockableScratchRegCtrl[i0].lock_entry.swwel)) begin // SW write next_c = (field_storage.LockableScratchRegCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -352,10 +342,8 @@ module dv_reg ( for(genvar i0=0; i0<10; i0++) begin // Field: dv_reg.LockableScratchReg[].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.LockableScratchReg[i0].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.LockableScratchReg[i0].data.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.LockableScratchReg[i0] && decoded_req_is_wr && !(hwif_in.LockableScratchReg[i0].data.swwel)) begin // SW write next_c = (field_storage.LockableScratchReg[i0].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -374,10 +362,8 @@ module dv_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: dv_reg.NonStickyGenericScratchReg[].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.NonStickyGenericScratchReg[i0].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.NonStickyGenericScratchReg[i0].data.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.NonStickyGenericScratchReg[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.NonStickyGenericScratchReg[i0].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -396,10 +382,8 @@ module dv_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: dv_reg.StickyLockableScratchRegCtrl[].lock_entry always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.StickyLockableScratchRegCtrl[i0].lock_entry.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.StickyLockableScratchRegCtrl[i0].lock_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.StickyLockableScratchRegCtrl[i0] && decoded_req_is_wr && !(hwif_in.StickyLockableScratchRegCtrl[i0].lock_entry.swwel)) begin // SW write next_c = (field_storage.StickyLockableScratchRegCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -419,10 +403,8 @@ module dv_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: dv_reg.StickyLockableScratchReg[].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.StickyLockableScratchReg[i0].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.StickyLockableScratchReg[i0].data.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.StickyLockableScratchReg[i0] && decoded_req_is_wr && !(hwif_in.StickyLockableScratchReg[i0].data.swwel)) begin // SW write next_c = (field_storage.StickyLockableScratchReg[i0].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -453,7 +435,7 @@ module dv_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [304-1:0][31:0] readback_array; for(genvar i0=0; i0<10; i0++) begin @@ -508,4 +490,4 @@ module dv_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.hard_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/doe/rtl/doe_reg.sv b/src/doe/rtl/doe_reg.sv index 377e1784e..6f9747288 100644 --- a/src/doe/rtl/doe_reg.sv +++ b/src/doe/rtl/doe_reg.sv @@ -501,10 +501,8 @@ module doe_reg ( for(genvar i0=0; i0<4; i0++) begin // Field: doe_reg.DOE_IV[].IV always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DOE_IV[i0].IV.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.DOE_IV[i0].IV.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DOE_IV[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.DOE_IV[i0].IV.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -527,10 +525,8 @@ module doe_reg ( end // Field: doe_reg.DOE_CTRL.CMD always_comb begin - automatic logic [1:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DOE_CTRL.CMD.value; - load_next_c = '0; + automatic logic [1:0] next_c = field_storage.DOE_CTRL.CMD.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DOE_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.DOE_CTRL.CMD.value & ~decoded_wr_biten[1:0]) | (decoded_wr_data[1:0] & decoded_wr_biten[1:0]); load_next_c = '1; @@ -552,10 +548,8 @@ module doe_reg ( assign hwif_out.DOE_CTRL.CMD.swmod = decoded_reg_strb.DOE_CTRL && decoded_req_is_wr; // Field: doe_reg.DOE_CTRL.DEST always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DOE_CTRL.DEST.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.DOE_CTRL.DEST.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DOE_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.DOE_CTRL.DEST.value & ~decoded_wr_biten[6:2]) | (decoded_wr_data[6:2] & decoded_wr_biten[6:2]); load_next_c = '1; @@ -573,10 +567,8 @@ module doe_reg ( assign hwif_out.DOE_CTRL.DEST.value = field_storage.DOE_CTRL.DEST.value; // Field: doe_reg.DOE_STATUS.READY always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DOE_STATUS.READY.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.DOE_STATUS.READY.value; + automatic logic load_next_c = '0; if(hwif_in.DOE_STATUS.READY.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -596,10 +588,8 @@ module doe_reg ( end // Field: doe_reg.DOE_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DOE_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.DOE_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.DOE_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -619,10 +609,8 @@ module doe_reg ( end // Field: doe_reg.DOE_STATUS.DEOBF_SECRETS_CLEARED always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DOE_STATUS.DEOBF_SECRETS_CLEARED.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.DOE_STATUS.DEOBF_SECRETS_CLEARED.value; + automatic logic load_next_c = '0; if(hwif_in.DOE_STATUS.DEOBF_SECRETS_CLEARED.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -639,10 +627,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -659,10 +645,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -679,10 +663,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_en_r.error0_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error0_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -699,10 +681,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_en_r.error1_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error1_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -719,10 +699,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_en_r.error2_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error2_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -739,10 +717,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_en_r.error3_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error3_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -759,10 +735,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.notif_intr_en_r.notif_cmd_done_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -779,10 +753,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -801,10 +773,8 @@ module doe_reg ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: doe_reg.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -823,10 +793,8 @@ module doe_reg ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: doe_reg.intr_block_rf.error_internal_intr_r.error0_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -849,10 +817,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_internal_intr_r.error1_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -875,10 +841,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_internal_intr_r.error2_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -901,10 +865,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_internal_intr_r.error3_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -932,10 +894,8 @@ module doe_reg ( || |(field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value & field_storage.intr_block_rf.error_intr_en_r.error3_en.value); // Field: doe_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -960,10 +920,8 @@ module doe_reg ( |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); // Field: doe_reg.intr_block_rf.error_intr_trig_r.error0_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -983,10 +941,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_trig_r.error1_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1006,10 +962,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_trig_r.error2_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1029,10 +983,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error_intr_trig_r.error3_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1052,10 +1004,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1075,10 +1025,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error0_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error0_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error0_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1109,10 +1057,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error1_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error1_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error1_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1143,10 +1089,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error2_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error2_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error2_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1177,10 +1121,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error3_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error3_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error3_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1211,10 +1153,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.notif_cmd_done_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1245,10 +1185,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error0_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1276,10 +1214,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error1_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1307,10 +1243,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error2_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1338,10 +1272,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.error3_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1369,10 +1301,8 @@ module doe_reg ( end // Field: doe_reg.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1413,7 +1343,7 @@ module doe_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [25-1:0][31:0] readback_array; for(genvar i0=0; i0<4; i0++) begin @@ -1488,4 +1418,4 @@ module doe_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.cptra_pwrgood) -endmodule +endmodule \ No newline at end of file diff --git a/src/ecc/rtl/ecc_reg.sv b/src/ecc/rtl/ecc_reg.sv index b09ff831e..ebbbc6f12 100644 --- a/src/ecc/rtl/ecc_reg.sv +++ b/src/ecc/rtl/ecc_reg.sv @@ -656,10 +656,8 @@ module ecc_reg ( // Field: ecc_reg.ECC_CTRL.CTRL always_comb begin - automatic logic [1:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_CTRL.CTRL.value; - load_next_c = '0; + automatic logic [1:0] next_c = field_storage.ECC_CTRL.CTRL.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_CTRL && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_CTRL.CTRL.value & ~decoded_wr_biten[1:0]) | (decoded_wr_data[1:0] & decoded_wr_biten[1:0]); load_next_c = '1; @@ -680,10 +678,8 @@ module ecc_reg ( assign hwif_out.ECC_CTRL.CTRL.value = field_storage.ECC_CTRL.CTRL.value; // Field: ecc_reg.ECC_CTRL.ZEROIZE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_CTRL.ZEROIZE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ECC_CTRL.ZEROIZE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.ECC_CTRL.ZEROIZE.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -704,10 +700,8 @@ module ecc_reg ( assign hwif_out.ECC_CTRL.ZEROIZE.value = field_storage.ECC_CTRL.ZEROIZE.value; // Field: ecc_reg.ECC_CTRL.PCR_SIGN always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_CTRL.PCR_SIGN.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ECC_CTRL.PCR_SIGN.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_CTRL && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_CTRL.PCR_SIGN.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -729,10 +723,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_SEED[].SEED always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_SEED[i0].SEED.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_SEED[i0].SEED.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_SEED[i0] && decoded_req_is_wr && hwif_in.ECC_SEED[i0].SEED.swwe) begin // SW write next_c = (field_storage.ECC_SEED[i0].SEED.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -758,10 +750,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_MSG[].MSG always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_MSG[i0].MSG.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_MSG[i0].MSG.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_MSG[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_MSG[i0].MSG.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -787,10 +777,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_PRIVKEY_OUT[].PRIVKEY_OUT always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_PRIVKEY_OUT[i0].PRIVKEY_OUT.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_PRIVKEY_OUT[i0].PRIVKEY_OUT.value; + automatic logic load_next_c = '0; if(hwif_in.ECC_PRIVKEY_OUT[i0].PRIVKEY_OUT.we) begin // HW Write - we next_c = hwif_in.ECC_PRIVKEY_OUT[i0].PRIVKEY_OUT.next; load_next_c = '1; @@ -812,10 +800,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_PUBKEY_X[].PUBKEY_X always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_PUBKEY_X[i0].PUBKEY_X.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_PUBKEY_X[i0].PUBKEY_X.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_PUBKEY_X[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_PUBKEY_X[i0].PUBKEY_X.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -841,10 +827,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_PUBKEY_Y[].PUBKEY_Y always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_PUBKEY_Y[i0].PUBKEY_Y.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_PUBKEY_Y[i0].PUBKEY_Y.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_PUBKEY_Y[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_PUBKEY_Y[i0].PUBKEY_Y.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -870,10 +854,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_SIGN_R[].SIGN_R always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_SIGN_R[i0].SIGN_R.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_SIGN_R[i0].SIGN_R.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_SIGN_R[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_SIGN_R[i0].SIGN_R.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -899,10 +881,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_SIGN_S[].SIGN_S always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_SIGN_S[i0].SIGN_S.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_SIGN_S[i0].SIGN_S.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_SIGN_S[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_SIGN_S[i0].SIGN_S.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -928,10 +908,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_VERIFY_R[].VERIFY_R always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_VERIFY_R[i0].VERIFY_R.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_VERIFY_R[i0].VERIFY_R.value; + automatic logic load_next_c = '0; if(hwif_in.ECC_VERIFY_R[i0].VERIFY_R.we) begin // HW Write - we next_c = hwif_in.ECC_VERIFY_R[i0].VERIFY_R.next; load_next_c = '1; @@ -954,10 +932,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_IV[].IV always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_IV[i0].IV.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_IV[i0].IV.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_IV[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_IV[i0].IV.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -980,10 +956,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_NONCE[].NONCE always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_NONCE[i0].NONCE.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_NONCE[i0].NONCE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_NONCE[i0] && decoded_req_is_wr && hwif_in.ecc_ready) begin // SW write next_c = (field_storage.ECC_NONCE[i0].NONCE.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1006,10 +980,8 @@ module ecc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: ecc_reg.ECC_PRIVKEY_IN[].PRIVKEY_IN always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ECC_PRIVKEY_IN[i0].PRIVKEY_IN.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.ECC_PRIVKEY_IN[i0].PRIVKEY_IN.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ECC_PRIVKEY_IN[i0] && decoded_req_is_wr && hwif_in.ECC_PRIVKEY_IN[i0].PRIVKEY_IN.swwe) begin // SW write next_c = (field_storage.ECC_PRIVKEY_IN[i0].PRIVKEY_IN.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1034,10 +1006,8 @@ module ecc_reg ( end // Field: ecc_reg.ecc_kv_rd_pkey_ctrl.read_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_pkey_ctrl.read_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_rd_pkey_ctrl.read_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_pkey_ctrl.read_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1058,10 +1028,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_pkey_ctrl.read_en.value = field_storage.ecc_kv_rd_pkey_ctrl.read_en.value; // Field: ecc_reg.ecc_kv_rd_pkey_ctrl.read_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_pkey_ctrl.read_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.ecc_kv_rd_pkey_ctrl.read_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_pkey_ctrl.read_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -1079,10 +1047,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_pkey_ctrl.read_entry.value = field_storage.ecc_kv_rd_pkey_ctrl.read_entry.value; // Field: ecc_reg.ecc_kv_rd_pkey_ctrl.pcr_hash_extend always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_pkey_ctrl.pcr_hash_extend.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_rd_pkey_ctrl.pcr_hash_extend.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_pkey_ctrl.pcr_hash_extend.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -1100,10 +1066,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_pkey_ctrl.pcr_hash_extend.value = field_storage.ecc_kv_rd_pkey_ctrl.pcr_hash_extend.value; // Field: ecc_reg.ecc_kv_rd_pkey_ctrl.rsvd always_comb begin - automatic logic [24:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_pkey_ctrl.rsvd.value; - load_next_c = '0; + automatic logic [24:0] next_c = field_storage.ecc_kv_rd_pkey_ctrl.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_pkey_ctrl.rsvd.value & ~decoded_wr_biten[31:7]) | (decoded_wr_data[31:7] & decoded_wr_biten[31:7]); load_next_c = '1; @@ -1121,10 +1085,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_pkey_ctrl.rsvd.value = field_storage.ecc_kv_rd_pkey_ctrl.rsvd.value; // Field: ecc_reg.ecc_kv_rd_pkey_status.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_pkey_status.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_rd_pkey_status.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.ecc_kv_rd_pkey_status.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1144,10 +1106,8 @@ module ecc_reg ( end // Field: ecc_reg.ecc_kv_rd_seed_ctrl.read_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_seed_ctrl.read_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_rd_seed_ctrl.read_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_seed_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_seed_ctrl.read_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1168,10 +1128,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_seed_ctrl.read_en.value = field_storage.ecc_kv_rd_seed_ctrl.read_en.value; // Field: ecc_reg.ecc_kv_rd_seed_ctrl.read_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_seed_ctrl.read_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.ecc_kv_rd_seed_ctrl.read_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_seed_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_seed_ctrl.read_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -1189,10 +1147,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_seed_ctrl.read_entry.value = field_storage.ecc_kv_rd_seed_ctrl.read_entry.value; // Field: ecc_reg.ecc_kv_rd_seed_ctrl.pcr_hash_extend always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_seed_ctrl.pcr_hash_extend.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_rd_seed_ctrl.pcr_hash_extend.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_seed_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_seed_ctrl.pcr_hash_extend.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -1210,10 +1166,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_seed_ctrl.pcr_hash_extend.value = field_storage.ecc_kv_rd_seed_ctrl.pcr_hash_extend.value; // Field: ecc_reg.ecc_kv_rd_seed_ctrl.rsvd always_comb begin - automatic logic [24:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_seed_ctrl.rsvd.value; - load_next_c = '0; + automatic logic [24:0] next_c = field_storage.ecc_kv_rd_seed_ctrl.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_rd_seed_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_rd_seed_ctrl.rsvd.value & ~decoded_wr_biten[31:7]) | (decoded_wr_data[31:7] & decoded_wr_biten[31:7]); load_next_c = '1; @@ -1231,10 +1185,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_rd_seed_ctrl.rsvd.value = field_storage.ecc_kv_rd_seed_ctrl.rsvd.value; // Field: ecc_reg.ecc_kv_rd_seed_status.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_rd_seed_status.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_rd_seed_status.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.ecc_kv_rd_seed_status.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1254,10 +1206,8 @@ module ecc_reg ( end // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.write_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.write_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.write_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.write_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1278,10 +1228,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.write_en.value = field_storage.ecc_kv_wr_pkey_ctrl.write_en.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.write_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.write_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.write_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.write_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -1299,10 +1247,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.write_entry.value = field_storage.ecc_kv_wr_pkey_ctrl.write_entry.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.hmac_key_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.hmac_key_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.hmac_key_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.hmac_key_dest_valid.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -1320,10 +1266,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.hmac_key_dest_valid.value = field_storage.ecc_kv_wr_pkey_ctrl.hmac_key_dest_valid.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.hmac_block_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.hmac_block_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.hmac_block_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.hmac_block_dest_valid.value & ~decoded_wr_biten[7:7]) | (decoded_wr_data[7:7] & decoded_wr_biten[7:7]); load_next_c = '1; @@ -1341,10 +1285,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.hmac_block_dest_valid.value = field_storage.ecc_kv_wr_pkey_ctrl.hmac_block_dest_valid.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.sha_block_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.sha_block_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.sha_block_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.sha_block_dest_valid.value & ~decoded_wr_biten[8:8]) | (decoded_wr_data[8:8] & decoded_wr_biten[8:8]); load_next_c = '1; @@ -1362,10 +1304,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.sha_block_dest_valid.value = field_storage.ecc_kv_wr_pkey_ctrl.sha_block_dest_valid.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.ecc_pkey_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.ecc_pkey_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.ecc_pkey_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.ecc_pkey_dest_valid.value & ~decoded_wr_biten[9:9]) | (decoded_wr_data[9:9] & decoded_wr_biten[9:9]); load_next_c = '1; @@ -1383,10 +1323,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.ecc_pkey_dest_valid.value = field_storage.ecc_kv_wr_pkey_ctrl.ecc_pkey_dest_valid.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.ecc_seed_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.ecc_seed_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.ecc_seed_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.ecc_seed_dest_valid.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]); load_next_c = '1; @@ -1404,10 +1342,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.ecc_seed_dest_valid.value = field_storage.ecc_kv_wr_pkey_ctrl.ecc_seed_dest_valid.value; // Field: ecc_reg.ecc_kv_wr_pkey_ctrl.rsvd always_comb begin - automatic logic [20:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_ctrl.rsvd.value; - load_next_c = '0; + automatic logic [20:0] next_c = field_storage.ecc_kv_wr_pkey_ctrl.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.ecc_kv_wr_pkey_ctrl && decoded_req_is_wr) begin // SW write next_c = (field_storage.ecc_kv_wr_pkey_ctrl.rsvd.value & ~decoded_wr_biten[31:11]) | (decoded_wr_data[31:11] & decoded_wr_biten[31:11]); load_next_c = '1; @@ -1425,10 +1361,8 @@ module ecc_reg ( assign hwif_out.ecc_kv_wr_pkey_ctrl.rsvd.value = field_storage.ecc_kv_wr_pkey_ctrl.rsvd.value; // Field: ecc_reg.ecc_kv_wr_pkey_status.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.ecc_kv_wr_pkey_status.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.ecc_kv_wr_pkey_status.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.ecc_kv_wr_pkey_status.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1448,10 +1382,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1468,10 +1400,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1488,10 +1418,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.error_intr_en_r.error_internal_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1508,10 +1436,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.notif_intr_en_r.notif_cmd_done_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1528,10 +1454,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -1550,10 +1474,8 @@ module ecc_reg ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: ecc_reg.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -1572,10 +1494,8 @@ module ecc_reg ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: ecc_reg.intr_block_rf.error_internal_intr_r.error_internal_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; load_next_c = '1; @@ -1600,10 +1520,8 @@ module ecc_reg ( |(field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value & field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value); // Field: ecc_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1628,10 +1546,8 @@ module ecc_reg ( |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); // Field: ecc_reg.intr_block_rf.error_intr_trig_r.error_internal_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1651,10 +1567,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1674,10 +1588,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.error_internal_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_internal_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1708,10 +1620,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.notif_cmd_done_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1742,10 +1652,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.error_internal_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; load_next_c = '1; @@ -1773,10 +1681,8 @@ module ecc_reg ( end // Field: ecc_reg.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1817,7 +1723,7 @@ module ecc_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [96-1:0][31:0] readback_array; for(genvar i0=0; i0<2; i0++) begin @@ -1917,4 +1823,4 @@ module ecc_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.hard_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/ecc/uvmf_ecc/config/uvmf_ecc.vf b/src/ecc/uvmf_ecc/config/uvmf_ecc.vf index f53355d1a..eb2dd5f09 100644 --- a/src/ecc/uvmf_ecc/config/uvmf_ecc.vf +++ b/src/ecc/uvmf_ecc/config/uvmf_ecc.vf @@ -139,15 +139,15 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv -${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv +${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv +${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv ${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg.sv -${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg_lfsr.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_reg_pkg.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_defines_pkg.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_params_pkg.sv diff --git a/src/entropy_src/config/entropy_src.vf b/src/entropy_src/config/entropy_src.vf index f8a916e71..3f94c116b 100644 --- a/src/entropy_src/config/entropy_src.vf +++ b/src/entropy_src/config/entropy_src.vf @@ -85,4 +85,4 @@ ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_adaptp_ht.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_core.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_repcnt_ht.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm.sv -${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src.sv +${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src.sv \ No newline at end of file diff --git a/src/entropy_src/config/entropy_src_tb.vf b/src/entropy_src/config/entropy_src_tb.vf index f0f720b91..2a3fc4067 100644 --- a/src/entropy_src/config/entropy_src_tb.vf +++ b/src/entropy_src/config/entropy_src_tb.vf @@ -86,4 +86,4 @@ ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_core.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_repcnt_ht.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src.sv -${CALIPTRA_ROOT}/src/entropy_src/tb/entropy_src_tb.sv +${CALIPTRA_ROOT}/src/entropy_src/tb/entropy_src_tb.sv \ No newline at end of file diff --git a/src/hmac/rtl/hmac_reg.sv b/src/hmac/rtl/hmac_reg.sv index e8d9093a0..d6dd9ad24 100644 --- a/src/hmac/rtl/hmac_reg.sv +++ b/src/hmac/rtl/hmac_reg.sv @@ -704,10 +704,8 @@ module hmac_reg ( // Field: hmac_reg.HMAC384_CTRL.INIT always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_CTRL.INIT.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_CTRL.INIT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_CTRL.INIT.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -728,10 +726,8 @@ module hmac_reg ( assign hwif_out.HMAC384_CTRL.INIT.value = field_storage.HMAC384_CTRL.INIT.value; // Field: hmac_reg.HMAC384_CTRL.NEXT always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_CTRL.NEXT.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_CTRL.NEXT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_CTRL.NEXT.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -752,10 +748,8 @@ module hmac_reg ( assign hwif_out.HMAC384_CTRL.NEXT.value = field_storage.HMAC384_CTRL.NEXT.value; // Field: hmac_reg.HMAC384_CTRL.ZEROIZE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_CTRL.ZEROIZE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_CTRL.ZEROIZE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_CTRL.ZEROIZE.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -777,10 +771,8 @@ module hmac_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: hmac_reg.HMAC384_KEY[].KEY always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KEY[i0].KEY.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.HMAC384_KEY[i0].KEY.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KEY[i0] && decoded_req_is_wr && !(hwif_in.HMAC384_KEY[i0].KEY.swwel)) begin // SW write next_c = (field_storage.HMAC384_KEY[i0].KEY.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -806,10 +798,8 @@ module hmac_reg ( for(genvar i0=0; i0<32; i0++) begin // Field: hmac_reg.HMAC384_BLOCK[].BLOCK always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_BLOCK[i0].BLOCK.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.HMAC384_BLOCK[i0].BLOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_BLOCK[i0] && decoded_req_is_wr && !(hwif_in.HMAC384_BLOCK[i0].BLOCK.swwel)) begin // SW write next_c = (field_storage.HMAC384_BLOCK[i0].BLOCK.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -835,10 +825,8 @@ module hmac_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: hmac_reg.HMAC384_TAG[].TAG always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_TAG[i0].TAG.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.HMAC384_TAG[i0].TAG.value; + automatic logic load_next_c = '0; if(hwif_in.HMAC384_TAG[i0].TAG.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -860,10 +848,8 @@ module hmac_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: hmac_reg.HMAC384_LFSR_SEED[].LFSR_SEED always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_LFSR_SEED[i0].LFSR_SEED.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.HMAC384_LFSR_SEED[i0].LFSR_SEED.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_LFSR_SEED[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_LFSR_SEED[i0].LFSR_SEED.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -882,10 +868,8 @@ module hmac_reg ( end // Field: hmac_reg.HMAC384_KV_RD_KEY_CTRL.read_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.read_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.read_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_KEY_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_KEY_CTRL.read_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -906,10 +890,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_KEY_CTRL.read_en.value = field_storage.HMAC384_KV_RD_KEY_CTRL.read_en.value; // Field: hmac_reg.HMAC384_KV_RD_KEY_CTRL.read_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.read_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.read_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_KEY_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_KEY_CTRL.read_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -927,10 +909,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_KEY_CTRL.read_entry.value = field_storage.HMAC384_KV_RD_KEY_CTRL.read_entry.value; // Field: hmac_reg.HMAC384_KV_RD_KEY_CTRL.pcr_hash_extend always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.pcr_hash_extend.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.pcr_hash_extend.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_KEY_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_KEY_CTRL.pcr_hash_extend.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -948,10 +928,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_KEY_CTRL.pcr_hash_extend.value = field_storage.HMAC384_KV_RD_KEY_CTRL.pcr_hash_extend.value; // Field: hmac_reg.HMAC384_KV_RD_KEY_CTRL.rsvd always_comb begin - automatic logic [24:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.rsvd.value; - load_next_c = '0; + automatic logic [24:0] next_c = field_storage.HMAC384_KV_RD_KEY_CTRL.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_KEY_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_KEY_CTRL.rsvd.value & ~decoded_wr_biten[31:7]) | (decoded_wr_data[31:7] & decoded_wr_biten[31:7]); load_next_c = '1; @@ -969,10 +947,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_KEY_CTRL.rsvd.value = field_storage.HMAC384_KV_RD_KEY_CTRL.rsvd.value; // Field: hmac_reg.HMAC384_KV_RD_KEY_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_KEY_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_RD_KEY_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.HMAC384_KV_RD_KEY_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -992,10 +968,8 @@ module hmac_reg ( end // Field: hmac_reg.HMAC384_KV_RD_BLOCK_CTRL.read_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_BLOCK_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1016,10 +990,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_BLOCK_CTRL.read_en.value = field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_en.value; // Field: hmac_reg.HMAC384_KV_RD_BLOCK_CTRL.read_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_BLOCK_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -1037,10 +1009,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_BLOCK_CTRL.read_entry.value = field_storage.HMAC384_KV_RD_BLOCK_CTRL.read_entry.value; // Field: hmac_reg.HMAC384_KV_RD_BLOCK_CTRL.pcr_hash_extend always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.pcr_hash_extend.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.pcr_hash_extend.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_BLOCK_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_BLOCK_CTRL.pcr_hash_extend.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -1058,10 +1028,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_BLOCK_CTRL.pcr_hash_extend.value = field_storage.HMAC384_KV_RD_BLOCK_CTRL.pcr_hash_extend.value; // Field: hmac_reg.HMAC384_KV_RD_BLOCK_CTRL.rsvd always_comb begin - automatic logic [24:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.rsvd.value; - load_next_c = '0; + automatic logic [24:0] next_c = field_storage.HMAC384_KV_RD_BLOCK_CTRL.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_RD_BLOCK_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_RD_BLOCK_CTRL.rsvd.value & ~decoded_wr_biten[31:7]) | (decoded_wr_data[31:7] & decoded_wr_biten[31:7]); load_next_c = '1; @@ -1079,10 +1047,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_RD_BLOCK_CTRL.rsvd.value = field_storage.HMAC384_KV_RD_BLOCK_CTRL.rsvd.value; // Field: hmac_reg.HMAC384_KV_RD_BLOCK_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_RD_BLOCK_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_RD_BLOCK_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.HMAC384_KV_RD_BLOCK_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1102,10 +1068,8 @@ module hmac_reg ( end // Field: hmac_reg.HMAC384_KV_WR_CTRL.write_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.write_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_CTRL.write_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.write_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1126,10 +1090,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.write_en.value = field_storage.HMAC384_KV_WR_CTRL.write_en.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.write_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.write_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.HMAC384_KV_WR_CTRL.write_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.write_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -1147,10 +1109,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.write_entry.value = field_storage.HMAC384_KV_WR_CTRL.write_entry.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.hmac_key_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.hmac_key_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_CTRL.hmac_key_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.hmac_key_dest_valid.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -1168,10 +1128,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.hmac_key_dest_valid.value = field_storage.HMAC384_KV_WR_CTRL.hmac_key_dest_valid.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.hmac_block_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.hmac_block_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_CTRL.hmac_block_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.hmac_block_dest_valid.value & ~decoded_wr_biten[7:7]) | (decoded_wr_data[7:7] & decoded_wr_biten[7:7]); load_next_c = '1; @@ -1189,10 +1147,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.hmac_block_dest_valid.value = field_storage.HMAC384_KV_WR_CTRL.hmac_block_dest_valid.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.sha_block_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.sha_block_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_CTRL.sha_block_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.sha_block_dest_valid.value & ~decoded_wr_biten[8:8]) | (decoded_wr_data[8:8] & decoded_wr_biten[8:8]); load_next_c = '1; @@ -1210,10 +1166,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.sha_block_dest_valid.value = field_storage.HMAC384_KV_WR_CTRL.sha_block_dest_valid.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.ecc_pkey_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.ecc_pkey_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_CTRL.ecc_pkey_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.ecc_pkey_dest_valid.value & ~decoded_wr_biten[9:9]) | (decoded_wr_data[9:9] & decoded_wr_biten[9:9]); load_next_c = '1; @@ -1231,10 +1185,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.ecc_pkey_dest_valid.value = field_storage.HMAC384_KV_WR_CTRL.ecc_pkey_dest_valid.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.ecc_seed_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.ecc_seed_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_CTRL.ecc_seed_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.ecc_seed_dest_valid.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]); load_next_c = '1; @@ -1252,10 +1204,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.ecc_seed_dest_valid.value = field_storage.HMAC384_KV_WR_CTRL.ecc_seed_dest_valid.value; // Field: hmac_reg.HMAC384_KV_WR_CTRL.rsvd always_comb begin - automatic logic [20:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_CTRL.rsvd.value; - load_next_c = '0; + automatic logic [20:0] next_c = field_storage.HMAC384_KV_WR_CTRL.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.HMAC384_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.HMAC384_KV_WR_CTRL.rsvd.value & ~decoded_wr_biten[31:11]) | (decoded_wr_data[31:11] & decoded_wr_biten[31:11]); load_next_c = '1; @@ -1273,10 +1223,8 @@ module hmac_reg ( assign hwif_out.HMAC384_KV_WR_CTRL.rsvd.value = field_storage.HMAC384_KV_WR_CTRL.rsvd.value; // Field: hmac_reg.HMAC384_KV_WR_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.HMAC384_KV_WR_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.HMAC384_KV_WR_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.HMAC384_KV_WR_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1296,10 +1244,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1316,10 +1262,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1336,10 +1280,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_en_r.error0_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error0_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1356,10 +1298,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_en_r.error1_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error1_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1376,10 +1316,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_en_r.error2_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error2_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1396,10 +1334,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_en_r.error3_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error3_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1416,10 +1352,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.notif_intr_en_r.notif_cmd_done_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1436,10 +1370,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -1458,10 +1390,8 @@ module hmac_reg ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: hmac_reg.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -1480,10 +1410,8 @@ module hmac_reg ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: hmac_reg.intr_block_rf.error_internal_intr_r.error0_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1506,10 +1434,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_internal_intr_r.error1_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1532,10 +1458,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_internal_intr_r.error2_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1558,10 +1482,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_internal_intr_r.error3_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1589,10 +1511,8 @@ module hmac_reg ( || |(field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value & field_storage.intr_block_rf.error_intr_en_r.error3_en.value); // Field: hmac_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1617,10 +1537,8 @@ module hmac_reg ( |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); // Field: hmac_reg.intr_block_rf.error_intr_trig_r.error0_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1640,10 +1558,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_trig_r.error1_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1663,10 +1579,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_trig_r.error2_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1686,10 +1600,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error_intr_trig_r.error3_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1709,10 +1621,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1732,10 +1642,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error0_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error0_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error0_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1766,10 +1674,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error1_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error1_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error1_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1800,10 +1706,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error2_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error2_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error2_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1834,10 +1738,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error3_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error3_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error3_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1868,10 +1770,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.notif_cmd_done_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1902,10 +1802,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error0_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1933,10 +1831,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error1_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1964,10 +1860,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error2_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1995,10 +1889,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.error3_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -2026,10 +1918,8 @@ module hmac_reg ( end // Field: hmac_reg.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -2070,7 +1960,7 @@ module hmac_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [42-1:0][31:0] readback_array; for(genvar i0=0; i0<2; i0++) begin @@ -2173,4 +2063,4 @@ module hmac_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.error_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/hmac/uvmf_2022/config/uvmf_hmac.vf b/src/hmac/uvmf_2022/config/uvmf_hmac.vf index a11f61ac2..ac4642c80 100644 --- a/src/hmac/uvmf_2022/config/uvmf_hmac.vf +++ b/src/hmac/uvmf_2022/config/uvmf_hmac.vf @@ -137,10 +137,11 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv -${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv +${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v -${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv \ No newline at end of file +${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv +${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv \ No newline at end of file diff --git a/src/integration/asserts/caliptra_top_sva.sv b/src/integration/asserts/caliptra_top_sva.sv index a9f39c59b..73c866dff 100644 --- a/src/integration/asserts/caliptra_top_sva.sv +++ b/src/integration/asserts/caliptra_top_sva.sv @@ -44,6 +44,7 @@ `define SHA512_MASKED_PATH `CPTRA_TOP_PATH.ecc_top1.ecc_dsa_ctrl_i.ecc_hmac_drbg_interface_i.hmac_drbg_i.HMAC_K.u_sha512_core_h1 `define SOC_IFC_TOP_PATH `CPTRA_TOP_PATH.soc_ifc_top1 `define WDT_PATH `SOC_IFC_TOP_PATH.i_wdt +`define MLDSA_PATH `CPTRA_TOP_PATH.mldsa `define SVA_RDC_CLK `CPTRA_TOP_PATH.rdc_clk_cg `define CPTRA_FW_UPD_RST_WINDOW `SOC_IFC_TOP_PATH.i_soc_ifc_boot_fsm.fw_update_rst_window diff --git a/src/integration/config/caliptra_top.vf b/src/integration/config/caliptra_top.vf index 244c4c989..d185917a1 100644 --- a/src/integration/config/caliptra_top.vf +++ b/src/integration/config/caliptra_top.vf @@ -6,6 +6,13 @@ +incdir+${CALIPTRA_ROOT}/src/soc_ifc/rtl +incdir+${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl +incdir+${CALIPTRA_ROOT}/src/doe/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl +incdir+${CALIPTRA_ROOT}/src/lc_ctrl/rtl @@ -20,6 +27,20 @@ +incdir+${CALIPTRA_ROOT}/src/hmac/rtl +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/rtl +incdir+${CALIPTRA_ROOT}/src/ecc/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl +incdir+${CALIPTRA_ROOT}/src/kmac/rtl +incdir+${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl +incdir+${CALIPTRA_ROOT}/src/edn/rtl @@ -48,6 +69,42 @@ ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/el2_pdef.vh ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/include/el2_def.sv ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/common_defines.sv ${CALIPTRA_ROOT}/src/doe/rtl/doe_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/config_defines.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_params_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sva.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_macros.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_1r1w_ram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ram_regout.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_icg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_2ff_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_piso.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_slv_sif.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_AND.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_full_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_A2B_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_Boolean_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_B2A_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_mult.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_add_sub_mod.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sib_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_util_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cipher_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_ram_tdp_file.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_wrapper.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_defines_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_main_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_reg_pkg.sv @@ -190,6 +247,105 @@ ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_pe_final.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_mult_dsp.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_add_sub_mod_alter.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_shuffler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cdc_rand_delay.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_2sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_lfsr.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi4_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_diff_decode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_slicer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_count.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_dom_and_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_reg_we_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_packer_fifo.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_max_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_arb.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_intr_hw.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_onehot_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi8_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync_cnt.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_receiver.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_sender.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_arbiter_ppc.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sum_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_ext.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_edge_detector.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_round.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3pad.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly2x2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_dsp.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_reduction.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_div2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_twiddle_lookup.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_r1_lut.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_mod_2gamma2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_encode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_usehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl/skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_s1s2_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_t0_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/hintgen.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl/pkdecode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_core.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_prim.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_sec.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_pkg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv.sv @@ -300,4 +456,4 @@ ${CALIPTRA_ROOT}/src/uart/rtl/uart_reg_top.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_rx.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_core.sv -${CALIPTRA_ROOT}/src/integration/rtl/caliptra_top.sv +${CALIPTRA_ROOT}/src/integration/rtl/caliptra_top.sv \ No newline at end of file diff --git a/src/integration/config/caliptra_top_tb.vf b/src/integration/config/caliptra_top_tb.vf index 4500df6bf..a6487bfc3 100644 --- a/src/integration/config/caliptra_top_tb.vf +++ b/src/integration/config/caliptra_top_tb.vf @@ -11,6 +11,13 @@ +incdir+${CALIPTRA_ROOT}/src/datavault/rtl +incdir+${CALIPTRA_ROOT}/src/soc_ifc/rtl +incdir+${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/tb +incdir+${CALIPTRA_ROOT}/src/csrng/rtl @@ -32,6 +39,20 @@ +incdir+${CALIPTRA_ROOT}/src/hmac/rtl +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/rtl +incdir+${CALIPTRA_ROOT}/src/ecc/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl +incdir+${CALIPTRA_ROOT}/src/kmac/rtl +incdir+${CALIPTRA_ROOT}/src/edn/rtl +incdir+${CALIPTRA_ROOT}/src/aes/rtl @@ -74,6 +95,42 @@ ${CALIPTRA_ROOT}/src/soc_ifc/rtl/soc_ifc_reg_pkg.sv ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/el2_pdef.vh ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/include/el2_def.sv ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/common_defines.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/config_defines.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_params_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sva.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_macros.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_1r1w_ram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ram_regout.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_icg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_2ff_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_piso.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_slv_sif.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_AND.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_full_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_A2B_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_Boolean_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_B2A_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_mult.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_add_sub_mod.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sib_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_util_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cipher_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_ram_tdp_file.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_wrapper.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_defines_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_main_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_reg_pkg.sv @@ -271,6 +328,105 @@ ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_pe_final.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_mult_dsp.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_add_sub_mod_alter.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_shuffler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cdc_rand_delay.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_2sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_lfsr.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi4_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_diff_decode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_slicer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_count.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_dom_and_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_reg_we_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_packer_fifo.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_max_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_arb.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_intr_hw.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_onehot_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi8_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync_cnt.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_receiver.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_sender.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_arbiter_ppc.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sum_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_ext.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_edge_detector.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_round.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3pad.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly2x2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_dsp.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_reduction.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_div2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_twiddle_lookup.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_r1_lut.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_mod_2gamma2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_encode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_usehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl/skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_s1s2_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_t0_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/hintgen.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl/pkdecode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_core.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_prim.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_sec.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_pkg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv.sv @@ -338,4 +494,4 @@ ${CALIPTRA_ROOT}/src/uart/rtl/uart_reg_top.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_rx.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_core.sv -${CALIPTRA_ROOT}/src/integration/rtl/caliptra_top.sv +${CALIPTRA_ROOT}/src/integration/rtl/caliptra_top.sv \ No newline at end of file diff --git a/src/integration/config/caliptra_top_trng_tb.vf b/src/integration/config/caliptra_top_trng_tb.vf index 75a9cde59..a6487bfc3 100644 --- a/src/integration/config/caliptra_top_trng_tb.vf +++ b/src/integration/config/caliptra_top_trng_tb.vf @@ -11,6 +11,13 @@ +incdir+${CALIPTRA_ROOT}/src/datavault/rtl +incdir+${CALIPTRA_ROOT}/src/soc_ifc/rtl +incdir+${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/tb +incdir+${CALIPTRA_ROOT}/src/csrng/rtl @@ -32,6 +39,20 @@ +incdir+${CALIPTRA_ROOT}/src/hmac/rtl +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/rtl +incdir+${CALIPTRA_ROOT}/src/ecc/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl +incdir+${CALIPTRA_ROOT}/src/kmac/rtl +incdir+${CALIPTRA_ROOT}/src/edn/rtl +incdir+${CALIPTRA_ROOT}/src/aes/rtl @@ -74,6 +95,42 @@ ${CALIPTRA_ROOT}/src/soc_ifc/rtl/soc_ifc_reg_pkg.sv ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/el2_pdef.vh ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/include/el2_def.sv ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/common_defines.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/config_defines.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_params_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sva.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_macros.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_1r1w_ram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ram_regout.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_icg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_2ff_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_piso.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_slv_sif.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_AND.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_full_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_A2B_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_Boolean_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_B2A_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_mult.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_add_sub_mod.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sib_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_util_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cipher_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_ram_tdp_file.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_wrapper.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_defines_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_main_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_reg_pkg.sv @@ -271,6 +328,105 @@ ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_pe_final.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_mult_dsp.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_add_sub_mod_alter.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_shuffler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cdc_rand_delay.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_2sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_lfsr.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi4_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_diff_decode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_slicer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_count.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_dom_and_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_reg_we_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_packer_fifo.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_max_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_arb.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_intr_hw.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_onehot_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi8_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync_cnt.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_receiver.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_sender.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_arbiter_ppc.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sum_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_ext.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_edge_detector.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_round.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3pad.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly2x2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_dsp.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_reduction.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_div2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_twiddle_lookup.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_r1_lut.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_mod_2gamma2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_encode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_usehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl/skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_s1s2_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_t0_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/hintgen.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl/pkdecode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_core.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_prim.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_sec.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_pkg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv.sv diff --git a/src/integration/config/compile.yml b/src/integration/config/compile.yml index d741bcb8f..f9759688e 100644 --- a/src/integration/config/compile.yml +++ b/src/integration/config/compile.yml @@ -29,6 +29,7 @@ requires: - doe_ctrl - hmac_ctrl - ecc_top + - mldsa_top - keyvault - pcrvault - datavault @@ -111,7 +112,9 @@ targets: sim: pre_exec: '$MSFT_SCRIPTS_DIR/run_test_makefile && echo "[PRE-EXEC] Copying ECC vector generator to ${pwd}" && cp $COMPILE_ROOT/../ecc/tb/ecdsa_secp384r1.exe . && echo "[PRE-EXEC] Copying DOE vector generator to ${pwd}" && cp $COMPILE_ROOT/../doe/tb/doe_test_gen.py . - && echo "[PRE-EXEC] Copying SHA256 wntz vector generator to ${pwd}" && cp $COMPILE_ROOT/../sha256/tb/sha256_wntz_test_gen.py .' + && echo "[PRE-EXEC] Copying SHA256 wntz vector generator to ${pwd}" && cp $COMPILE_ROOT/../sha256/tb/sha256_wntz_test_gen.py . + && echo "[PRE-EXEC] Copying MLDSA vector generator to ${pwd}" && cp $COMPILE_ROOT/../mldsa/tb/test_dilithium5 . + && echo "[PRE-EXEC] Copying mldsa directed vector to ${pwd}" && cp $COMPILE_ROOT/../mldsa/tb/smoke_test_mldsa_vector.hex .' global: tool: vcs: diff --git a/src/integration/rtl/caliptra_reg.h b/src/integration/rtl/caliptra_reg.h index 1354a0b6e..25e650045 100644 --- a/src/integration/rtl/caliptra_reg.h +++ b/src/integration/rtl/caliptra_reg.h @@ -4372,6 +4372,3820 @@ #define SHA256_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R (0xa10) #define SHA256_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_LOW (0) #define SHA256_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_MASK (0x1) +#define CLP_MLDSA_REG_BASE_ADDR (0x10030000) +#define CLP_MLDSA_REG_MLDSA_NAME_0 (0x10030000) +#define MLDSA_REG_MLDSA_NAME_0 (0x0) +#define CLP_MLDSA_REG_MLDSA_NAME_1 (0x10030004) +#define MLDSA_REG_MLDSA_NAME_1 (0x4) +#define CLP_MLDSA_REG_MLDSA_VERSION_0 (0x10030008) +#define MLDSA_REG_MLDSA_VERSION_0 (0x8) +#define CLP_MLDSA_REG_MLDSA_VERSION_1 (0x1003000c) +#define MLDSA_REG_MLDSA_VERSION_1 (0xc) +#define CLP_MLDSA_REG_MLDSA_CTRL (0x10030010) +#define MLDSA_REG_MLDSA_CTRL (0x10) +#define MLDSA_REG_MLDSA_CTRL_CTRL_LOW (0) +#define MLDSA_REG_MLDSA_CTRL_CTRL_MASK (0x7) +#define MLDSA_REG_MLDSA_CTRL_ZEROIZE_LOW (3) +#define MLDSA_REG_MLDSA_CTRL_ZEROIZE_MASK (0x8) +#define CLP_MLDSA_REG_MLDSA_STATUS (0x10030014) +#define MLDSA_REG_MLDSA_STATUS (0x14) +#define MLDSA_REG_MLDSA_STATUS_READY_LOW (0) +#define MLDSA_REG_MLDSA_STATUS_READY_MASK (0x1) +#define MLDSA_REG_MLDSA_STATUS_VALID_LOW (1) +#define MLDSA_REG_MLDSA_STATUS_VALID_MASK (0x2) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_0 (0x10030018) +#define MLDSA_REG_MLDSA_ENTROPY_0 (0x18) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_1 (0x1003001c) +#define MLDSA_REG_MLDSA_ENTROPY_1 (0x1c) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_2 (0x10030020) +#define MLDSA_REG_MLDSA_ENTROPY_2 (0x20) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_3 (0x10030024) +#define MLDSA_REG_MLDSA_ENTROPY_3 (0x24) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_4 (0x10030028) +#define MLDSA_REG_MLDSA_ENTROPY_4 (0x28) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_5 (0x1003002c) +#define MLDSA_REG_MLDSA_ENTROPY_5 (0x2c) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_6 (0x10030030) +#define MLDSA_REG_MLDSA_ENTROPY_6 (0x30) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_7 (0x10030034) +#define MLDSA_REG_MLDSA_ENTROPY_7 (0x34) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_8 (0x10030038) +#define MLDSA_REG_MLDSA_ENTROPY_8 (0x38) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_9 (0x1003003c) +#define MLDSA_REG_MLDSA_ENTROPY_9 (0x3c) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_10 (0x10030040) +#define MLDSA_REG_MLDSA_ENTROPY_10 (0x40) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_11 (0x10030044) +#define MLDSA_REG_MLDSA_ENTROPY_11 (0x44) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_12 (0x10030048) +#define MLDSA_REG_MLDSA_ENTROPY_12 (0x48) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_13 (0x1003004c) +#define MLDSA_REG_MLDSA_ENTROPY_13 (0x4c) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_14 (0x10030050) +#define MLDSA_REG_MLDSA_ENTROPY_14 (0x50) +#define CLP_MLDSA_REG_MLDSA_ENTROPY_15 (0x10030054) +#define MLDSA_REG_MLDSA_ENTROPY_15 (0x54) +#define CLP_MLDSA_REG_MLDSA_SEED_0 (0x10030058) +#define MLDSA_REG_MLDSA_SEED_0 (0x58) +#define CLP_MLDSA_REG_MLDSA_SEED_1 (0x1003005c) +#define MLDSA_REG_MLDSA_SEED_1 (0x5c) +#define CLP_MLDSA_REG_MLDSA_SEED_2 (0x10030060) +#define MLDSA_REG_MLDSA_SEED_2 (0x60) +#define CLP_MLDSA_REG_MLDSA_SEED_3 (0x10030064) +#define MLDSA_REG_MLDSA_SEED_3 (0x64) +#define CLP_MLDSA_REG_MLDSA_SEED_4 (0x10030068) +#define MLDSA_REG_MLDSA_SEED_4 (0x68) +#define CLP_MLDSA_REG_MLDSA_SEED_5 (0x1003006c) +#define MLDSA_REG_MLDSA_SEED_5 (0x6c) +#define CLP_MLDSA_REG_MLDSA_SEED_6 (0x10030070) +#define MLDSA_REG_MLDSA_SEED_6 (0x70) +#define CLP_MLDSA_REG_MLDSA_SEED_7 (0x10030074) +#define MLDSA_REG_MLDSA_SEED_7 (0x74) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_0 (0x10030078) +#define MLDSA_REG_MLDSA_SIGN_RND_0 (0x78) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_1 (0x1003007c) +#define MLDSA_REG_MLDSA_SIGN_RND_1 (0x7c) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_2 (0x10030080) +#define MLDSA_REG_MLDSA_SIGN_RND_2 (0x80) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_3 (0x10030084) +#define MLDSA_REG_MLDSA_SIGN_RND_3 (0x84) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_4 (0x10030088) +#define MLDSA_REG_MLDSA_SIGN_RND_4 (0x88) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_5 (0x1003008c) +#define MLDSA_REG_MLDSA_SIGN_RND_5 (0x8c) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_6 (0x10030090) +#define MLDSA_REG_MLDSA_SIGN_RND_6 (0x90) +#define CLP_MLDSA_REG_MLDSA_SIGN_RND_7 (0x10030094) +#define MLDSA_REG_MLDSA_SIGN_RND_7 (0x94) +#define CLP_MLDSA_REG_MLDSA_MSG_0 (0x10030098) +#define MLDSA_REG_MLDSA_MSG_0 (0x98) +#define CLP_MLDSA_REG_MLDSA_MSG_1 (0x1003009c) +#define MLDSA_REG_MLDSA_MSG_1 (0x9c) +#define CLP_MLDSA_REG_MLDSA_MSG_2 (0x100300a0) +#define MLDSA_REG_MLDSA_MSG_2 (0xa0) +#define CLP_MLDSA_REG_MLDSA_MSG_3 (0x100300a4) +#define MLDSA_REG_MLDSA_MSG_3 (0xa4) +#define CLP_MLDSA_REG_MLDSA_MSG_4 (0x100300a8) +#define MLDSA_REG_MLDSA_MSG_4 (0xa8) +#define CLP_MLDSA_REG_MLDSA_MSG_5 (0x100300ac) +#define MLDSA_REG_MLDSA_MSG_5 (0xac) +#define CLP_MLDSA_REG_MLDSA_MSG_6 (0x100300b0) +#define MLDSA_REG_MLDSA_MSG_6 (0xb0) +#define CLP_MLDSA_REG_MLDSA_MSG_7 (0x100300b4) +#define MLDSA_REG_MLDSA_MSG_7 (0xb4) +#define CLP_MLDSA_REG_MLDSA_MSG_8 (0x100300b8) +#define MLDSA_REG_MLDSA_MSG_8 (0xb8) +#define CLP_MLDSA_REG_MLDSA_MSG_9 (0x100300bc) +#define MLDSA_REG_MLDSA_MSG_9 (0xbc) +#define CLP_MLDSA_REG_MLDSA_MSG_10 (0x100300c0) +#define MLDSA_REG_MLDSA_MSG_10 (0xc0) +#define CLP_MLDSA_REG_MLDSA_MSG_11 (0x100300c4) +#define MLDSA_REG_MLDSA_MSG_11 (0xc4) +#define CLP_MLDSA_REG_MLDSA_MSG_12 (0x100300c8) +#define MLDSA_REG_MLDSA_MSG_12 (0xc8) +#define CLP_MLDSA_REG_MLDSA_MSG_13 (0x100300cc) +#define MLDSA_REG_MLDSA_MSG_13 (0xcc) +#define CLP_MLDSA_REG_MLDSA_MSG_14 (0x100300d0) +#define MLDSA_REG_MLDSA_MSG_14 (0xd0) +#define CLP_MLDSA_REG_MLDSA_MSG_15 (0x100300d4) +#define MLDSA_REG_MLDSA_MSG_15 (0xd4) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_0 (0x100300d8) +#define MLDSA_REG_MLDSA_VERIFY_RES_0 (0xd8) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_1 (0x100300dc) +#define MLDSA_REG_MLDSA_VERIFY_RES_1 (0xdc) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_2 (0x100300e0) +#define MLDSA_REG_MLDSA_VERIFY_RES_2 (0xe0) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_3 (0x100300e4) +#define MLDSA_REG_MLDSA_VERIFY_RES_3 (0xe4) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_4 (0x100300e8) +#define MLDSA_REG_MLDSA_VERIFY_RES_4 (0xe8) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_5 (0x100300ec) +#define MLDSA_REG_MLDSA_VERIFY_RES_5 (0xec) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_6 (0x100300f0) +#define MLDSA_REG_MLDSA_VERIFY_RES_6 (0xf0) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_7 (0x100300f4) +#define MLDSA_REG_MLDSA_VERIFY_RES_7 (0xf4) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_8 (0x100300f8) +#define MLDSA_REG_MLDSA_VERIFY_RES_8 (0xf8) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_9 (0x100300fc) +#define MLDSA_REG_MLDSA_VERIFY_RES_9 (0xfc) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_10 (0x10030100) +#define MLDSA_REG_MLDSA_VERIFY_RES_10 (0x100) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_11 (0x10030104) +#define MLDSA_REG_MLDSA_VERIFY_RES_11 (0x104) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_12 (0x10030108) +#define MLDSA_REG_MLDSA_VERIFY_RES_12 (0x108) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_13 (0x1003010c) +#define MLDSA_REG_MLDSA_VERIFY_RES_13 (0x10c) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_14 (0x10030110) +#define MLDSA_REG_MLDSA_VERIFY_RES_14 (0x110) +#define CLP_MLDSA_REG_MLDSA_VERIFY_RES_15 (0x10030114) +#define MLDSA_REG_MLDSA_VERIFY_RES_15 (0x114) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_0 (0x10030118) +#define MLDSA_REG_MLDSA_PUBKEY_0 (0x118) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_1 (0x1003011c) +#define MLDSA_REG_MLDSA_PUBKEY_1 (0x11c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_2 (0x10030120) +#define MLDSA_REG_MLDSA_PUBKEY_2 (0x120) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_3 (0x10030124) +#define MLDSA_REG_MLDSA_PUBKEY_3 (0x124) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_4 (0x10030128) +#define MLDSA_REG_MLDSA_PUBKEY_4 (0x128) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_5 (0x1003012c) +#define MLDSA_REG_MLDSA_PUBKEY_5 (0x12c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_6 (0x10030130) +#define MLDSA_REG_MLDSA_PUBKEY_6 (0x130) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_7 (0x10030134) +#define MLDSA_REG_MLDSA_PUBKEY_7 (0x134) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_8 (0x10030138) +#define MLDSA_REG_MLDSA_PUBKEY_8 (0x138) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_9 (0x1003013c) +#define MLDSA_REG_MLDSA_PUBKEY_9 (0x13c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_10 (0x10030140) +#define MLDSA_REG_MLDSA_PUBKEY_10 (0x140) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_11 (0x10030144) +#define MLDSA_REG_MLDSA_PUBKEY_11 (0x144) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_12 (0x10030148) +#define MLDSA_REG_MLDSA_PUBKEY_12 (0x148) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_13 (0x1003014c) +#define MLDSA_REG_MLDSA_PUBKEY_13 (0x14c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_14 (0x10030150) +#define MLDSA_REG_MLDSA_PUBKEY_14 (0x150) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_15 (0x10030154) +#define MLDSA_REG_MLDSA_PUBKEY_15 (0x154) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_16 (0x10030158) +#define MLDSA_REG_MLDSA_PUBKEY_16 (0x158) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_17 (0x1003015c) +#define MLDSA_REG_MLDSA_PUBKEY_17 (0x15c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_18 (0x10030160) +#define MLDSA_REG_MLDSA_PUBKEY_18 (0x160) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_19 (0x10030164) +#define MLDSA_REG_MLDSA_PUBKEY_19 (0x164) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_20 (0x10030168) +#define MLDSA_REG_MLDSA_PUBKEY_20 (0x168) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_21 (0x1003016c) +#define MLDSA_REG_MLDSA_PUBKEY_21 (0x16c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_22 (0x10030170) +#define MLDSA_REG_MLDSA_PUBKEY_22 (0x170) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_23 (0x10030174) +#define MLDSA_REG_MLDSA_PUBKEY_23 (0x174) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_24 (0x10030178) +#define MLDSA_REG_MLDSA_PUBKEY_24 (0x178) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_25 (0x1003017c) +#define MLDSA_REG_MLDSA_PUBKEY_25 (0x17c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_26 (0x10030180) +#define MLDSA_REG_MLDSA_PUBKEY_26 (0x180) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_27 (0x10030184) +#define MLDSA_REG_MLDSA_PUBKEY_27 (0x184) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_28 (0x10030188) +#define MLDSA_REG_MLDSA_PUBKEY_28 (0x188) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_29 (0x1003018c) +#define MLDSA_REG_MLDSA_PUBKEY_29 (0x18c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_30 (0x10030190) +#define MLDSA_REG_MLDSA_PUBKEY_30 (0x190) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_31 (0x10030194) +#define MLDSA_REG_MLDSA_PUBKEY_31 (0x194) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_32 (0x10030198) +#define MLDSA_REG_MLDSA_PUBKEY_32 (0x198) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_33 (0x1003019c) +#define MLDSA_REG_MLDSA_PUBKEY_33 (0x19c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_34 (0x100301a0) +#define MLDSA_REG_MLDSA_PUBKEY_34 (0x1a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_35 (0x100301a4) +#define MLDSA_REG_MLDSA_PUBKEY_35 (0x1a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_36 (0x100301a8) +#define MLDSA_REG_MLDSA_PUBKEY_36 (0x1a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_37 (0x100301ac) +#define MLDSA_REG_MLDSA_PUBKEY_37 (0x1ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_38 (0x100301b0) +#define MLDSA_REG_MLDSA_PUBKEY_38 (0x1b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_39 (0x100301b4) +#define MLDSA_REG_MLDSA_PUBKEY_39 (0x1b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_40 (0x100301b8) +#define MLDSA_REG_MLDSA_PUBKEY_40 (0x1b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_41 (0x100301bc) +#define MLDSA_REG_MLDSA_PUBKEY_41 (0x1bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_42 (0x100301c0) +#define MLDSA_REG_MLDSA_PUBKEY_42 (0x1c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_43 (0x100301c4) +#define MLDSA_REG_MLDSA_PUBKEY_43 (0x1c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_44 (0x100301c8) +#define MLDSA_REG_MLDSA_PUBKEY_44 (0x1c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_45 (0x100301cc) +#define MLDSA_REG_MLDSA_PUBKEY_45 (0x1cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_46 (0x100301d0) +#define MLDSA_REG_MLDSA_PUBKEY_46 (0x1d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_47 (0x100301d4) +#define MLDSA_REG_MLDSA_PUBKEY_47 (0x1d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_48 (0x100301d8) +#define MLDSA_REG_MLDSA_PUBKEY_48 (0x1d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_49 (0x100301dc) +#define MLDSA_REG_MLDSA_PUBKEY_49 (0x1dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_50 (0x100301e0) +#define MLDSA_REG_MLDSA_PUBKEY_50 (0x1e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_51 (0x100301e4) +#define MLDSA_REG_MLDSA_PUBKEY_51 (0x1e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_52 (0x100301e8) +#define MLDSA_REG_MLDSA_PUBKEY_52 (0x1e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_53 (0x100301ec) +#define MLDSA_REG_MLDSA_PUBKEY_53 (0x1ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_54 (0x100301f0) +#define MLDSA_REG_MLDSA_PUBKEY_54 (0x1f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_55 (0x100301f4) +#define MLDSA_REG_MLDSA_PUBKEY_55 (0x1f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_56 (0x100301f8) +#define MLDSA_REG_MLDSA_PUBKEY_56 (0x1f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_57 (0x100301fc) +#define MLDSA_REG_MLDSA_PUBKEY_57 (0x1fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_58 (0x10030200) +#define MLDSA_REG_MLDSA_PUBKEY_58 (0x200) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_59 (0x10030204) +#define MLDSA_REG_MLDSA_PUBKEY_59 (0x204) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_60 (0x10030208) +#define MLDSA_REG_MLDSA_PUBKEY_60 (0x208) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_61 (0x1003020c) +#define MLDSA_REG_MLDSA_PUBKEY_61 (0x20c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_62 (0x10030210) +#define MLDSA_REG_MLDSA_PUBKEY_62 (0x210) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_63 (0x10030214) +#define MLDSA_REG_MLDSA_PUBKEY_63 (0x214) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_64 (0x10030218) +#define MLDSA_REG_MLDSA_PUBKEY_64 (0x218) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_65 (0x1003021c) +#define MLDSA_REG_MLDSA_PUBKEY_65 (0x21c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_66 (0x10030220) +#define MLDSA_REG_MLDSA_PUBKEY_66 (0x220) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_67 (0x10030224) +#define MLDSA_REG_MLDSA_PUBKEY_67 (0x224) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_68 (0x10030228) +#define MLDSA_REG_MLDSA_PUBKEY_68 (0x228) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_69 (0x1003022c) +#define MLDSA_REG_MLDSA_PUBKEY_69 (0x22c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_70 (0x10030230) +#define MLDSA_REG_MLDSA_PUBKEY_70 (0x230) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_71 (0x10030234) +#define MLDSA_REG_MLDSA_PUBKEY_71 (0x234) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_72 (0x10030238) +#define MLDSA_REG_MLDSA_PUBKEY_72 (0x238) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_73 (0x1003023c) +#define MLDSA_REG_MLDSA_PUBKEY_73 (0x23c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_74 (0x10030240) +#define MLDSA_REG_MLDSA_PUBKEY_74 (0x240) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_75 (0x10030244) +#define MLDSA_REG_MLDSA_PUBKEY_75 (0x244) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_76 (0x10030248) +#define MLDSA_REG_MLDSA_PUBKEY_76 (0x248) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_77 (0x1003024c) +#define MLDSA_REG_MLDSA_PUBKEY_77 (0x24c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_78 (0x10030250) +#define MLDSA_REG_MLDSA_PUBKEY_78 (0x250) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_79 (0x10030254) +#define MLDSA_REG_MLDSA_PUBKEY_79 (0x254) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_80 (0x10030258) +#define MLDSA_REG_MLDSA_PUBKEY_80 (0x258) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_81 (0x1003025c) +#define MLDSA_REG_MLDSA_PUBKEY_81 (0x25c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_82 (0x10030260) +#define MLDSA_REG_MLDSA_PUBKEY_82 (0x260) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_83 (0x10030264) +#define MLDSA_REG_MLDSA_PUBKEY_83 (0x264) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_84 (0x10030268) +#define MLDSA_REG_MLDSA_PUBKEY_84 (0x268) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_85 (0x1003026c) +#define MLDSA_REG_MLDSA_PUBKEY_85 (0x26c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_86 (0x10030270) +#define MLDSA_REG_MLDSA_PUBKEY_86 (0x270) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_87 (0x10030274) +#define MLDSA_REG_MLDSA_PUBKEY_87 (0x274) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_88 (0x10030278) +#define MLDSA_REG_MLDSA_PUBKEY_88 (0x278) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_89 (0x1003027c) +#define MLDSA_REG_MLDSA_PUBKEY_89 (0x27c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_90 (0x10030280) +#define MLDSA_REG_MLDSA_PUBKEY_90 (0x280) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_91 (0x10030284) +#define MLDSA_REG_MLDSA_PUBKEY_91 (0x284) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_92 (0x10030288) +#define MLDSA_REG_MLDSA_PUBKEY_92 (0x288) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_93 (0x1003028c) +#define MLDSA_REG_MLDSA_PUBKEY_93 (0x28c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_94 (0x10030290) +#define MLDSA_REG_MLDSA_PUBKEY_94 (0x290) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_95 (0x10030294) +#define MLDSA_REG_MLDSA_PUBKEY_95 (0x294) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_96 (0x10030298) +#define MLDSA_REG_MLDSA_PUBKEY_96 (0x298) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_97 (0x1003029c) +#define MLDSA_REG_MLDSA_PUBKEY_97 (0x29c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_98 (0x100302a0) +#define MLDSA_REG_MLDSA_PUBKEY_98 (0x2a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_99 (0x100302a4) +#define MLDSA_REG_MLDSA_PUBKEY_99 (0x2a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_100 (0x100302a8) +#define MLDSA_REG_MLDSA_PUBKEY_100 (0x2a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_101 (0x100302ac) +#define MLDSA_REG_MLDSA_PUBKEY_101 (0x2ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_102 (0x100302b0) +#define MLDSA_REG_MLDSA_PUBKEY_102 (0x2b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_103 (0x100302b4) +#define MLDSA_REG_MLDSA_PUBKEY_103 (0x2b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_104 (0x100302b8) +#define MLDSA_REG_MLDSA_PUBKEY_104 (0x2b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_105 (0x100302bc) +#define MLDSA_REG_MLDSA_PUBKEY_105 (0x2bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_106 (0x100302c0) +#define MLDSA_REG_MLDSA_PUBKEY_106 (0x2c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_107 (0x100302c4) +#define MLDSA_REG_MLDSA_PUBKEY_107 (0x2c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_108 (0x100302c8) +#define MLDSA_REG_MLDSA_PUBKEY_108 (0x2c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_109 (0x100302cc) +#define MLDSA_REG_MLDSA_PUBKEY_109 (0x2cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_110 (0x100302d0) +#define MLDSA_REG_MLDSA_PUBKEY_110 (0x2d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_111 (0x100302d4) +#define MLDSA_REG_MLDSA_PUBKEY_111 (0x2d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_112 (0x100302d8) +#define MLDSA_REG_MLDSA_PUBKEY_112 (0x2d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_113 (0x100302dc) +#define MLDSA_REG_MLDSA_PUBKEY_113 (0x2dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_114 (0x100302e0) +#define MLDSA_REG_MLDSA_PUBKEY_114 (0x2e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_115 (0x100302e4) +#define MLDSA_REG_MLDSA_PUBKEY_115 (0x2e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_116 (0x100302e8) +#define MLDSA_REG_MLDSA_PUBKEY_116 (0x2e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_117 (0x100302ec) +#define MLDSA_REG_MLDSA_PUBKEY_117 (0x2ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_118 (0x100302f0) +#define MLDSA_REG_MLDSA_PUBKEY_118 (0x2f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_119 (0x100302f4) +#define MLDSA_REG_MLDSA_PUBKEY_119 (0x2f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_120 (0x100302f8) +#define MLDSA_REG_MLDSA_PUBKEY_120 (0x2f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_121 (0x100302fc) +#define MLDSA_REG_MLDSA_PUBKEY_121 (0x2fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_122 (0x10030300) +#define MLDSA_REG_MLDSA_PUBKEY_122 (0x300) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_123 (0x10030304) +#define MLDSA_REG_MLDSA_PUBKEY_123 (0x304) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_124 (0x10030308) +#define MLDSA_REG_MLDSA_PUBKEY_124 (0x308) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_125 (0x1003030c) +#define MLDSA_REG_MLDSA_PUBKEY_125 (0x30c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_126 (0x10030310) +#define MLDSA_REG_MLDSA_PUBKEY_126 (0x310) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_127 (0x10030314) +#define MLDSA_REG_MLDSA_PUBKEY_127 (0x314) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_128 (0x10030318) +#define MLDSA_REG_MLDSA_PUBKEY_128 (0x318) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_129 (0x1003031c) +#define MLDSA_REG_MLDSA_PUBKEY_129 (0x31c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_130 (0x10030320) +#define MLDSA_REG_MLDSA_PUBKEY_130 (0x320) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_131 (0x10030324) +#define MLDSA_REG_MLDSA_PUBKEY_131 (0x324) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_132 (0x10030328) +#define MLDSA_REG_MLDSA_PUBKEY_132 (0x328) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_133 (0x1003032c) +#define MLDSA_REG_MLDSA_PUBKEY_133 (0x32c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_134 (0x10030330) +#define MLDSA_REG_MLDSA_PUBKEY_134 (0x330) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_135 (0x10030334) +#define MLDSA_REG_MLDSA_PUBKEY_135 (0x334) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_136 (0x10030338) +#define MLDSA_REG_MLDSA_PUBKEY_136 (0x338) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_137 (0x1003033c) +#define MLDSA_REG_MLDSA_PUBKEY_137 (0x33c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_138 (0x10030340) +#define MLDSA_REG_MLDSA_PUBKEY_138 (0x340) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_139 (0x10030344) +#define MLDSA_REG_MLDSA_PUBKEY_139 (0x344) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_140 (0x10030348) +#define MLDSA_REG_MLDSA_PUBKEY_140 (0x348) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_141 (0x1003034c) +#define MLDSA_REG_MLDSA_PUBKEY_141 (0x34c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_142 (0x10030350) +#define MLDSA_REG_MLDSA_PUBKEY_142 (0x350) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_143 (0x10030354) +#define MLDSA_REG_MLDSA_PUBKEY_143 (0x354) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_144 (0x10030358) +#define MLDSA_REG_MLDSA_PUBKEY_144 (0x358) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_145 (0x1003035c) +#define MLDSA_REG_MLDSA_PUBKEY_145 (0x35c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_146 (0x10030360) +#define MLDSA_REG_MLDSA_PUBKEY_146 (0x360) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_147 (0x10030364) +#define MLDSA_REG_MLDSA_PUBKEY_147 (0x364) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_148 (0x10030368) +#define MLDSA_REG_MLDSA_PUBKEY_148 (0x368) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_149 (0x1003036c) +#define MLDSA_REG_MLDSA_PUBKEY_149 (0x36c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_150 (0x10030370) +#define MLDSA_REG_MLDSA_PUBKEY_150 (0x370) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_151 (0x10030374) +#define MLDSA_REG_MLDSA_PUBKEY_151 (0x374) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_152 (0x10030378) +#define MLDSA_REG_MLDSA_PUBKEY_152 (0x378) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_153 (0x1003037c) +#define MLDSA_REG_MLDSA_PUBKEY_153 (0x37c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_154 (0x10030380) +#define MLDSA_REG_MLDSA_PUBKEY_154 (0x380) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_155 (0x10030384) +#define MLDSA_REG_MLDSA_PUBKEY_155 (0x384) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_156 (0x10030388) +#define MLDSA_REG_MLDSA_PUBKEY_156 (0x388) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_157 (0x1003038c) +#define MLDSA_REG_MLDSA_PUBKEY_157 (0x38c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_158 (0x10030390) +#define MLDSA_REG_MLDSA_PUBKEY_158 (0x390) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_159 (0x10030394) +#define MLDSA_REG_MLDSA_PUBKEY_159 (0x394) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_160 (0x10030398) +#define MLDSA_REG_MLDSA_PUBKEY_160 (0x398) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_161 (0x1003039c) +#define MLDSA_REG_MLDSA_PUBKEY_161 (0x39c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_162 (0x100303a0) +#define MLDSA_REG_MLDSA_PUBKEY_162 (0x3a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_163 (0x100303a4) +#define MLDSA_REG_MLDSA_PUBKEY_163 (0x3a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_164 (0x100303a8) +#define MLDSA_REG_MLDSA_PUBKEY_164 (0x3a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_165 (0x100303ac) +#define MLDSA_REG_MLDSA_PUBKEY_165 (0x3ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_166 (0x100303b0) +#define MLDSA_REG_MLDSA_PUBKEY_166 (0x3b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_167 (0x100303b4) +#define MLDSA_REG_MLDSA_PUBKEY_167 (0x3b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_168 (0x100303b8) +#define MLDSA_REG_MLDSA_PUBKEY_168 (0x3b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_169 (0x100303bc) +#define MLDSA_REG_MLDSA_PUBKEY_169 (0x3bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_170 (0x100303c0) +#define MLDSA_REG_MLDSA_PUBKEY_170 (0x3c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_171 (0x100303c4) +#define MLDSA_REG_MLDSA_PUBKEY_171 (0x3c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_172 (0x100303c8) +#define MLDSA_REG_MLDSA_PUBKEY_172 (0x3c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_173 (0x100303cc) +#define MLDSA_REG_MLDSA_PUBKEY_173 (0x3cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_174 (0x100303d0) +#define MLDSA_REG_MLDSA_PUBKEY_174 (0x3d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_175 (0x100303d4) +#define MLDSA_REG_MLDSA_PUBKEY_175 (0x3d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_176 (0x100303d8) +#define MLDSA_REG_MLDSA_PUBKEY_176 (0x3d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_177 (0x100303dc) +#define MLDSA_REG_MLDSA_PUBKEY_177 (0x3dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_178 (0x100303e0) +#define MLDSA_REG_MLDSA_PUBKEY_178 (0x3e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_179 (0x100303e4) +#define MLDSA_REG_MLDSA_PUBKEY_179 (0x3e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_180 (0x100303e8) +#define MLDSA_REG_MLDSA_PUBKEY_180 (0x3e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_181 (0x100303ec) +#define MLDSA_REG_MLDSA_PUBKEY_181 (0x3ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_182 (0x100303f0) +#define MLDSA_REG_MLDSA_PUBKEY_182 (0x3f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_183 (0x100303f4) +#define MLDSA_REG_MLDSA_PUBKEY_183 (0x3f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_184 (0x100303f8) +#define MLDSA_REG_MLDSA_PUBKEY_184 (0x3f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_185 (0x100303fc) +#define MLDSA_REG_MLDSA_PUBKEY_185 (0x3fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_186 (0x10030400) +#define MLDSA_REG_MLDSA_PUBKEY_186 (0x400) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_187 (0x10030404) +#define MLDSA_REG_MLDSA_PUBKEY_187 (0x404) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_188 (0x10030408) +#define MLDSA_REG_MLDSA_PUBKEY_188 (0x408) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_189 (0x1003040c) +#define MLDSA_REG_MLDSA_PUBKEY_189 (0x40c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_190 (0x10030410) +#define MLDSA_REG_MLDSA_PUBKEY_190 (0x410) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_191 (0x10030414) +#define MLDSA_REG_MLDSA_PUBKEY_191 (0x414) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_192 (0x10030418) +#define MLDSA_REG_MLDSA_PUBKEY_192 (0x418) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_193 (0x1003041c) +#define MLDSA_REG_MLDSA_PUBKEY_193 (0x41c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_194 (0x10030420) +#define MLDSA_REG_MLDSA_PUBKEY_194 (0x420) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_195 (0x10030424) +#define MLDSA_REG_MLDSA_PUBKEY_195 (0x424) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_196 (0x10030428) +#define MLDSA_REG_MLDSA_PUBKEY_196 (0x428) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_197 (0x1003042c) +#define MLDSA_REG_MLDSA_PUBKEY_197 (0x42c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_198 (0x10030430) +#define MLDSA_REG_MLDSA_PUBKEY_198 (0x430) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_199 (0x10030434) +#define MLDSA_REG_MLDSA_PUBKEY_199 (0x434) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_200 (0x10030438) +#define MLDSA_REG_MLDSA_PUBKEY_200 (0x438) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_201 (0x1003043c) +#define MLDSA_REG_MLDSA_PUBKEY_201 (0x43c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_202 (0x10030440) +#define MLDSA_REG_MLDSA_PUBKEY_202 (0x440) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_203 (0x10030444) +#define MLDSA_REG_MLDSA_PUBKEY_203 (0x444) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_204 (0x10030448) +#define MLDSA_REG_MLDSA_PUBKEY_204 (0x448) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_205 (0x1003044c) +#define MLDSA_REG_MLDSA_PUBKEY_205 (0x44c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_206 (0x10030450) +#define MLDSA_REG_MLDSA_PUBKEY_206 (0x450) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_207 (0x10030454) +#define MLDSA_REG_MLDSA_PUBKEY_207 (0x454) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_208 (0x10030458) +#define MLDSA_REG_MLDSA_PUBKEY_208 (0x458) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_209 (0x1003045c) +#define MLDSA_REG_MLDSA_PUBKEY_209 (0x45c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_210 (0x10030460) +#define MLDSA_REG_MLDSA_PUBKEY_210 (0x460) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_211 (0x10030464) +#define MLDSA_REG_MLDSA_PUBKEY_211 (0x464) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_212 (0x10030468) +#define MLDSA_REG_MLDSA_PUBKEY_212 (0x468) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_213 (0x1003046c) +#define MLDSA_REG_MLDSA_PUBKEY_213 (0x46c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_214 (0x10030470) +#define MLDSA_REG_MLDSA_PUBKEY_214 (0x470) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_215 (0x10030474) +#define MLDSA_REG_MLDSA_PUBKEY_215 (0x474) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_216 (0x10030478) +#define MLDSA_REG_MLDSA_PUBKEY_216 (0x478) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_217 (0x1003047c) +#define MLDSA_REG_MLDSA_PUBKEY_217 (0x47c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_218 (0x10030480) +#define MLDSA_REG_MLDSA_PUBKEY_218 (0x480) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_219 (0x10030484) +#define MLDSA_REG_MLDSA_PUBKEY_219 (0x484) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_220 (0x10030488) +#define MLDSA_REG_MLDSA_PUBKEY_220 (0x488) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_221 (0x1003048c) +#define MLDSA_REG_MLDSA_PUBKEY_221 (0x48c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_222 (0x10030490) +#define MLDSA_REG_MLDSA_PUBKEY_222 (0x490) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_223 (0x10030494) +#define MLDSA_REG_MLDSA_PUBKEY_223 (0x494) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_224 (0x10030498) +#define MLDSA_REG_MLDSA_PUBKEY_224 (0x498) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_225 (0x1003049c) +#define MLDSA_REG_MLDSA_PUBKEY_225 (0x49c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_226 (0x100304a0) +#define MLDSA_REG_MLDSA_PUBKEY_226 (0x4a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_227 (0x100304a4) +#define MLDSA_REG_MLDSA_PUBKEY_227 (0x4a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_228 (0x100304a8) +#define MLDSA_REG_MLDSA_PUBKEY_228 (0x4a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_229 (0x100304ac) +#define MLDSA_REG_MLDSA_PUBKEY_229 (0x4ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_230 (0x100304b0) +#define MLDSA_REG_MLDSA_PUBKEY_230 (0x4b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_231 (0x100304b4) +#define MLDSA_REG_MLDSA_PUBKEY_231 (0x4b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_232 (0x100304b8) +#define MLDSA_REG_MLDSA_PUBKEY_232 (0x4b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_233 (0x100304bc) +#define MLDSA_REG_MLDSA_PUBKEY_233 (0x4bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_234 (0x100304c0) +#define MLDSA_REG_MLDSA_PUBKEY_234 (0x4c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_235 (0x100304c4) +#define MLDSA_REG_MLDSA_PUBKEY_235 (0x4c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_236 (0x100304c8) +#define MLDSA_REG_MLDSA_PUBKEY_236 (0x4c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_237 (0x100304cc) +#define MLDSA_REG_MLDSA_PUBKEY_237 (0x4cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_238 (0x100304d0) +#define MLDSA_REG_MLDSA_PUBKEY_238 (0x4d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_239 (0x100304d4) +#define MLDSA_REG_MLDSA_PUBKEY_239 (0x4d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_240 (0x100304d8) +#define MLDSA_REG_MLDSA_PUBKEY_240 (0x4d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_241 (0x100304dc) +#define MLDSA_REG_MLDSA_PUBKEY_241 (0x4dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_242 (0x100304e0) +#define MLDSA_REG_MLDSA_PUBKEY_242 (0x4e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_243 (0x100304e4) +#define MLDSA_REG_MLDSA_PUBKEY_243 (0x4e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_244 (0x100304e8) +#define MLDSA_REG_MLDSA_PUBKEY_244 (0x4e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_245 (0x100304ec) +#define MLDSA_REG_MLDSA_PUBKEY_245 (0x4ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_246 (0x100304f0) +#define MLDSA_REG_MLDSA_PUBKEY_246 (0x4f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_247 (0x100304f4) +#define MLDSA_REG_MLDSA_PUBKEY_247 (0x4f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_248 (0x100304f8) +#define MLDSA_REG_MLDSA_PUBKEY_248 (0x4f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_249 (0x100304fc) +#define MLDSA_REG_MLDSA_PUBKEY_249 (0x4fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_250 (0x10030500) +#define MLDSA_REG_MLDSA_PUBKEY_250 (0x500) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_251 (0x10030504) +#define MLDSA_REG_MLDSA_PUBKEY_251 (0x504) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_252 (0x10030508) +#define MLDSA_REG_MLDSA_PUBKEY_252 (0x508) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_253 (0x1003050c) +#define MLDSA_REG_MLDSA_PUBKEY_253 (0x50c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_254 (0x10030510) +#define MLDSA_REG_MLDSA_PUBKEY_254 (0x510) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_255 (0x10030514) +#define MLDSA_REG_MLDSA_PUBKEY_255 (0x514) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_256 (0x10030518) +#define MLDSA_REG_MLDSA_PUBKEY_256 (0x518) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_257 (0x1003051c) +#define MLDSA_REG_MLDSA_PUBKEY_257 (0x51c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_258 (0x10030520) +#define MLDSA_REG_MLDSA_PUBKEY_258 (0x520) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_259 (0x10030524) +#define MLDSA_REG_MLDSA_PUBKEY_259 (0x524) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_260 (0x10030528) +#define MLDSA_REG_MLDSA_PUBKEY_260 (0x528) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_261 (0x1003052c) +#define MLDSA_REG_MLDSA_PUBKEY_261 (0x52c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_262 (0x10030530) +#define MLDSA_REG_MLDSA_PUBKEY_262 (0x530) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_263 (0x10030534) +#define MLDSA_REG_MLDSA_PUBKEY_263 (0x534) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_264 (0x10030538) +#define MLDSA_REG_MLDSA_PUBKEY_264 (0x538) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_265 (0x1003053c) +#define MLDSA_REG_MLDSA_PUBKEY_265 (0x53c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_266 (0x10030540) +#define MLDSA_REG_MLDSA_PUBKEY_266 (0x540) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_267 (0x10030544) +#define MLDSA_REG_MLDSA_PUBKEY_267 (0x544) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_268 (0x10030548) +#define MLDSA_REG_MLDSA_PUBKEY_268 (0x548) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_269 (0x1003054c) +#define MLDSA_REG_MLDSA_PUBKEY_269 (0x54c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_270 (0x10030550) +#define MLDSA_REG_MLDSA_PUBKEY_270 (0x550) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_271 (0x10030554) +#define MLDSA_REG_MLDSA_PUBKEY_271 (0x554) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_272 (0x10030558) +#define MLDSA_REG_MLDSA_PUBKEY_272 (0x558) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_273 (0x1003055c) +#define MLDSA_REG_MLDSA_PUBKEY_273 (0x55c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_274 (0x10030560) +#define MLDSA_REG_MLDSA_PUBKEY_274 (0x560) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_275 (0x10030564) +#define MLDSA_REG_MLDSA_PUBKEY_275 (0x564) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_276 (0x10030568) +#define MLDSA_REG_MLDSA_PUBKEY_276 (0x568) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_277 (0x1003056c) +#define MLDSA_REG_MLDSA_PUBKEY_277 (0x56c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_278 (0x10030570) +#define MLDSA_REG_MLDSA_PUBKEY_278 (0x570) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_279 (0x10030574) +#define MLDSA_REG_MLDSA_PUBKEY_279 (0x574) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_280 (0x10030578) +#define MLDSA_REG_MLDSA_PUBKEY_280 (0x578) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_281 (0x1003057c) +#define MLDSA_REG_MLDSA_PUBKEY_281 (0x57c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_282 (0x10030580) +#define MLDSA_REG_MLDSA_PUBKEY_282 (0x580) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_283 (0x10030584) +#define MLDSA_REG_MLDSA_PUBKEY_283 (0x584) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_284 (0x10030588) +#define MLDSA_REG_MLDSA_PUBKEY_284 (0x588) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_285 (0x1003058c) +#define MLDSA_REG_MLDSA_PUBKEY_285 (0x58c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_286 (0x10030590) +#define MLDSA_REG_MLDSA_PUBKEY_286 (0x590) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_287 (0x10030594) +#define MLDSA_REG_MLDSA_PUBKEY_287 (0x594) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_288 (0x10030598) +#define MLDSA_REG_MLDSA_PUBKEY_288 (0x598) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_289 (0x1003059c) +#define MLDSA_REG_MLDSA_PUBKEY_289 (0x59c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_290 (0x100305a0) +#define MLDSA_REG_MLDSA_PUBKEY_290 (0x5a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_291 (0x100305a4) +#define MLDSA_REG_MLDSA_PUBKEY_291 (0x5a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_292 (0x100305a8) +#define MLDSA_REG_MLDSA_PUBKEY_292 (0x5a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_293 (0x100305ac) +#define MLDSA_REG_MLDSA_PUBKEY_293 (0x5ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_294 (0x100305b0) +#define MLDSA_REG_MLDSA_PUBKEY_294 (0x5b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_295 (0x100305b4) +#define MLDSA_REG_MLDSA_PUBKEY_295 (0x5b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_296 (0x100305b8) +#define MLDSA_REG_MLDSA_PUBKEY_296 (0x5b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_297 (0x100305bc) +#define MLDSA_REG_MLDSA_PUBKEY_297 (0x5bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_298 (0x100305c0) +#define MLDSA_REG_MLDSA_PUBKEY_298 (0x5c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_299 (0x100305c4) +#define MLDSA_REG_MLDSA_PUBKEY_299 (0x5c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_300 (0x100305c8) +#define MLDSA_REG_MLDSA_PUBKEY_300 (0x5c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_301 (0x100305cc) +#define MLDSA_REG_MLDSA_PUBKEY_301 (0x5cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_302 (0x100305d0) +#define MLDSA_REG_MLDSA_PUBKEY_302 (0x5d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_303 (0x100305d4) +#define MLDSA_REG_MLDSA_PUBKEY_303 (0x5d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_304 (0x100305d8) +#define MLDSA_REG_MLDSA_PUBKEY_304 (0x5d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_305 (0x100305dc) +#define MLDSA_REG_MLDSA_PUBKEY_305 (0x5dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_306 (0x100305e0) +#define MLDSA_REG_MLDSA_PUBKEY_306 (0x5e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_307 (0x100305e4) +#define MLDSA_REG_MLDSA_PUBKEY_307 (0x5e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_308 (0x100305e8) +#define MLDSA_REG_MLDSA_PUBKEY_308 (0x5e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_309 (0x100305ec) +#define MLDSA_REG_MLDSA_PUBKEY_309 (0x5ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_310 (0x100305f0) +#define MLDSA_REG_MLDSA_PUBKEY_310 (0x5f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_311 (0x100305f4) +#define MLDSA_REG_MLDSA_PUBKEY_311 (0x5f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_312 (0x100305f8) +#define MLDSA_REG_MLDSA_PUBKEY_312 (0x5f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_313 (0x100305fc) +#define MLDSA_REG_MLDSA_PUBKEY_313 (0x5fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_314 (0x10030600) +#define MLDSA_REG_MLDSA_PUBKEY_314 (0x600) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_315 (0x10030604) +#define MLDSA_REG_MLDSA_PUBKEY_315 (0x604) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_316 (0x10030608) +#define MLDSA_REG_MLDSA_PUBKEY_316 (0x608) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_317 (0x1003060c) +#define MLDSA_REG_MLDSA_PUBKEY_317 (0x60c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_318 (0x10030610) +#define MLDSA_REG_MLDSA_PUBKEY_318 (0x610) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_319 (0x10030614) +#define MLDSA_REG_MLDSA_PUBKEY_319 (0x614) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_320 (0x10030618) +#define MLDSA_REG_MLDSA_PUBKEY_320 (0x618) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_321 (0x1003061c) +#define MLDSA_REG_MLDSA_PUBKEY_321 (0x61c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_322 (0x10030620) +#define MLDSA_REG_MLDSA_PUBKEY_322 (0x620) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_323 (0x10030624) +#define MLDSA_REG_MLDSA_PUBKEY_323 (0x624) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_324 (0x10030628) +#define MLDSA_REG_MLDSA_PUBKEY_324 (0x628) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_325 (0x1003062c) +#define MLDSA_REG_MLDSA_PUBKEY_325 (0x62c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_326 (0x10030630) +#define MLDSA_REG_MLDSA_PUBKEY_326 (0x630) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_327 (0x10030634) +#define MLDSA_REG_MLDSA_PUBKEY_327 (0x634) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_328 (0x10030638) +#define MLDSA_REG_MLDSA_PUBKEY_328 (0x638) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_329 (0x1003063c) +#define MLDSA_REG_MLDSA_PUBKEY_329 (0x63c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_330 (0x10030640) +#define MLDSA_REG_MLDSA_PUBKEY_330 (0x640) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_331 (0x10030644) +#define MLDSA_REG_MLDSA_PUBKEY_331 (0x644) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_332 (0x10030648) +#define MLDSA_REG_MLDSA_PUBKEY_332 (0x648) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_333 (0x1003064c) +#define MLDSA_REG_MLDSA_PUBKEY_333 (0x64c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_334 (0x10030650) +#define MLDSA_REG_MLDSA_PUBKEY_334 (0x650) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_335 (0x10030654) +#define MLDSA_REG_MLDSA_PUBKEY_335 (0x654) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_336 (0x10030658) +#define MLDSA_REG_MLDSA_PUBKEY_336 (0x658) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_337 (0x1003065c) +#define MLDSA_REG_MLDSA_PUBKEY_337 (0x65c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_338 (0x10030660) +#define MLDSA_REG_MLDSA_PUBKEY_338 (0x660) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_339 (0x10030664) +#define MLDSA_REG_MLDSA_PUBKEY_339 (0x664) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_340 (0x10030668) +#define MLDSA_REG_MLDSA_PUBKEY_340 (0x668) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_341 (0x1003066c) +#define MLDSA_REG_MLDSA_PUBKEY_341 (0x66c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_342 (0x10030670) +#define MLDSA_REG_MLDSA_PUBKEY_342 (0x670) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_343 (0x10030674) +#define MLDSA_REG_MLDSA_PUBKEY_343 (0x674) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_344 (0x10030678) +#define MLDSA_REG_MLDSA_PUBKEY_344 (0x678) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_345 (0x1003067c) +#define MLDSA_REG_MLDSA_PUBKEY_345 (0x67c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_346 (0x10030680) +#define MLDSA_REG_MLDSA_PUBKEY_346 (0x680) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_347 (0x10030684) +#define MLDSA_REG_MLDSA_PUBKEY_347 (0x684) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_348 (0x10030688) +#define MLDSA_REG_MLDSA_PUBKEY_348 (0x688) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_349 (0x1003068c) +#define MLDSA_REG_MLDSA_PUBKEY_349 (0x68c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_350 (0x10030690) +#define MLDSA_REG_MLDSA_PUBKEY_350 (0x690) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_351 (0x10030694) +#define MLDSA_REG_MLDSA_PUBKEY_351 (0x694) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_352 (0x10030698) +#define MLDSA_REG_MLDSA_PUBKEY_352 (0x698) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_353 (0x1003069c) +#define MLDSA_REG_MLDSA_PUBKEY_353 (0x69c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_354 (0x100306a0) +#define MLDSA_REG_MLDSA_PUBKEY_354 (0x6a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_355 (0x100306a4) +#define MLDSA_REG_MLDSA_PUBKEY_355 (0x6a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_356 (0x100306a8) +#define MLDSA_REG_MLDSA_PUBKEY_356 (0x6a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_357 (0x100306ac) +#define MLDSA_REG_MLDSA_PUBKEY_357 (0x6ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_358 (0x100306b0) +#define MLDSA_REG_MLDSA_PUBKEY_358 (0x6b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_359 (0x100306b4) +#define MLDSA_REG_MLDSA_PUBKEY_359 (0x6b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_360 (0x100306b8) +#define MLDSA_REG_MLDSA_PUBKEY_360 (0x6b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_361 (0x100306bc) +#define MLDSA_REG_MLDSA_PUBKEY_361 (0x6bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_362 (0x100306c0) +#define MLDSA_REG_MLDSA_PUBKEY_362 (0x6c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_363 (0x100306c4) +#define MLDSA_REG_MLDSA_PUBKEY_363 (0x6c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_364 (0x100306c8) +#define MLDSA_REG_MLDSA_PUBKEY_364 (0x6c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_365 (0x100306cc) +#define MLDSA_REG_MLDSA_PUBKEY_365 (0x6cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_366 (0x100306d0) +#define MLDSA_REG_MLDSA_PUBKEY_366 (0x6d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_367 (0x100306d4) +#define MLDSA_REG_MLDSA_PUBKEY_367 (0x6d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_368 (0x100306d8) +#define MLDSA_REG_MLDSA_PUBKEY_368 (0x6d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_369 (0x100306dc) +#define MLDSA_REG_MLDSA_PUBKEY_369 (0x6dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_370 (0x100306e0) +#define MLDSA_REG_MLDSA_PUBKEY_370 (0x6e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_371 (0x100306e4) +#define MLDSA_REG_MLDSA_PUBKEY_371 (0x6e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_372 (0x100306e8) +#define MLDSA_REG_MLDSA_PUBKEY_372 (0x6e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_373 (0x100306ec) +#define MLDSA_REG_MLDSA_PUBKEY_373 (0x6ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_374 (0x100306f0) +#define MLDSA_REG_MLDSA_PUBKEY_374 (0x6f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_375 (0x100306f4) +#define MLDSA_REG_MLDSA_PUBKEY_375 (0x6f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_376 (0x100306f8) +#define MLDSA_REG_MLDSA_PUBKEY_376 (0x6f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_377 (0x100306fc) +#define MLDSA_REG_MLDSA_PUBKEY_377 (0x6fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_378 (0x10030700) +#define MLDSA_REG_MLDSA_PUBKEY_378 (0x700) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_379 (0x10030704) +#define MLDSA_REG_MLDSA_PUBKEY_379 (0x704) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_380 (0x10030708) +#define MLDSA_REG_MLDSA_PUBKEY_380 (0x708) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_381 (0x1003070c) +#define MLDSA_REG_MLDSA_PUBKEY_381 (0x70c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_382 (0x10030710) +#define MLDSA_REG_MLDSA_PUBKEY_382 (0x710) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_383 (0x10030714) +#define MLDSA_REG_MLDSA_PUBKEY_383 (0x714) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_384 (0x10030718) +#define MLDSA_REG_MLDSA_PUBKEY_384 (0x718) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_385 (0x1003071c) +#define MLDSA_REG_MLDSA_PUBKEY_385 (0x71c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_386 (0x10030720) +#define MLDSA_REG_MLDSA_PUBKEY_386 (0x720) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_387 (0x10030724) +#define MLDSA_REG_MLDSA_PUBKEY_387 (0x724) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_388 (0x10030728) +#define MLDSA_REG_MLDSA_PUBKEY_388 (0x728) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_389 (0x1003072c) +#define MLDSA_REG_MLDSA_PUBKEY_389 (0x72c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_390 (0x10030730) +#define MLDSA_REG_MLDSA_PUBKEY_390 (0x730) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_391 (0x10030734) +#define MLDSA_REG_MLDSA_PUBKEY_391 (0x734) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_392 (0x10030738) +#define MLDSA_REG_MLDSA_PUBKEY_392 (0x738) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_393 (0x1003073c) +#define MLDSA_REG_MLDSA_PUBKEY_393 (0x73c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_394 (0x10030740) +#define MLDSA_REG_MLDSA_PUBKEY_394 (0x740) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_395 (0x10030744) +#define MLDSA_REG_MLDSA_PUBKEY_395 (0x744) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_396 (0x10030748) +#define MLDSA_REG_MLDSA_PUBKEY_396 (0x748) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_397 (0x1003074c) +#define MLDSA_REG_MLDSA_PUBKEY_397 (0x74c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_398 (0x10030750) +#define MLDSA_REG_MLDSA_PUBKEY_398 (0x750) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_399 (0x10030754) +#define MLDSA_REG_MLDSA_PUBKEY_399 (0x754) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_400 (0x10030758) +#define MLDSA_REG_MLDSA_PUBKEY_400 (0x758) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_401 (0x1003075c) +#define MLDSA_REG_MLDSA_PUBKEY_401 (0x75c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_402 (0x10030760) +#define MLDSA_REG_MLDSA_PUBKEY_402 (0x760) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_403 (0x10030764) +#define MLDSA_REG_MLDSA_PUBKEY_403 (0x764) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_404 (0x10030768) +#define MLDSA_REG_MLDSA_PUBKEY_404 (0x768) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_405 (0x1003076c) +#define MLDSA_REG_MLDSA_PUBKEY_405 (0x76c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_406 (0x10030770) +#define MLDSA_REG_MLDSA_PUBKEY_406 (0x770) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_407 (0x10030774) +#define MLDSA_REG_MLDSA_PUBKEY_407 (0x774) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_408 (0x10030778) +#define MLDSA_REG_MLDSA_PUBKEY_408 (0x778) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_409 (0x1003077c) +#define MLDSA_REG_MLDSA_PUBKEY_409 (0x77c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_410 (0x10030780) +#define MLDSA_REG_MLDSA_PUBKEY_410 (0x780) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_411 (0x10030784) +#define MLDSA_REG_MLDSA_PUBKEY_411 (0x784) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_412 (0x10030788) +#define MLDSA_REG_MLDSA_PUBKEY_412 (0x788) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_413 (0x1003078c) +#define MLDSA_REG_MLDSA_PUBKEY_413 (0x78c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_414 (0x10030790) +#define MLDSA_REG_MLDSA_PUBKEY_414 (0x790) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_415 (0x10030794) +#define MLDSA_REG_MLDSA_PUBKEY_415 (0x794) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_416 (0x10030798) +#define MLDSA_REG_MLDSA_PUBKEY_416 (0x798) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_417 (0x1003079c) +#define MLDSA_REG_MLDSA_PUBKEY_417 (0x79c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_418 (0x100307a0) +#define MLDSA_REG_MLDSA_PUBKEY_418 (0x7a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_419 (0x100307a4) +#define MLDSA_REG_MLDSA_PUBKEY_419 (0x7a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_420 (0x100307a8) +#define MLDSA_REG_MLDSA_PUBKEY_420 (0x7a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_421 (0x100307ac) +#define MLDSA_REG_MLDSA_PUBKEY_421 (0x7ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_422 (0x100307b0) +#define MLDSA_REG_MLDSA_PUBKEY_422 (0x7b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_423 (0x100307b4) +#define MLDSA_REG_MLDSA_PUBKEY_423 (0x7b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_424 (0x100307b8) +#define MLDSA_REG_MLDSA_PUBKEY_424 (0x7b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_425 (0x100307bc) +#define MLDSA_REG_MLDSA_PUBKEY_425 (0x7bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_426 (0x100307c0) +#define MLDSA_REG_MLDSA_PUBKEY_426 (0x7c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_427 (0x100307c4) +#define MLDSA_REG_MLDSA_PUBKEY_427 (0x7c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_428 (0x100307c8) +#define MLDSA_REG_MLDSA_PUBKEY_428 (0x7c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_429 (0x100307cc) +#define MLDSA_REG_MLDSA_PUBKEY_429 (0x7cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_430 (0x100307d0) +#define MLDSA_REG_MLDSA_PUBKEY_430 (0x7d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_431 (0x100307d4) +#define MLDSA_REG_MLDSA_PUBKEY_431 (0x7d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_432 (0x100307d8) +#define MLDSA_REG_MLDSA_PUBKEY_432 (0x7d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_433 (0x100307dc) +#define MLDSA_REG_MLDSA_PUBKEY_433 (0x7dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_434 (0x100307e0) +#define MLDSA_REG_MLDSA_PUBKEY_434 (0x7e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_435 (0x100307e4) +#define MLDSA_REG_MLDSA_PUBKEY_435 (0x7e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_436 (0x100307e8) +#define MLDSA_REG_MLDSA_PUBKEY_436 (0x7e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_437 (0x100307ec) +#define MLDSA_REG_MLDSA_PUBKEY_437 (0x7ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_438 (0x100307f0) +#define MLDSA_REG_MLDSA_PUBKEY_438 (0x7f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_439 (0x100307f4) +#define MLDSA_REG_MLDSA_PUBKEY_439 (0x7f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_440 (0x100307f8) +#define MLDSA_REG_MLDSA_PUBKEY_440 (0x7f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_441 (0x100307fc) +#define MLDSA_REG_MLDSA_PUBKEY_441 (0x7fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_442 (0x10030800) +#define MLDSA_REG_MLDSA_PUBKEY_442 (0x800) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_443 (0x10030804) +#define MLDSA_REG_MLDSA_PUBKEY_443 (0x804) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_444 (0x10030808) +#define MLDSA_REG_MLDSA_PUBKEY_444 (0x808) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_445 (0x1003080c) +#define MLDSA_REG_MLDSA_PUBKEY_445 (0x80c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_446 (0x10030810) +#define MLDSA_REG_MLDSA_PUBKEY_446 (0x810) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_447 (0x10030814) +#define MLDSA_REG_MLDSA_PUBKEY_447 (0x814) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_448 (0x10030818) +#define MLDSA_REG_MLDSA_PUBKEY_448 (0x818) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_449 (0x1003081c) +#define MLDSA_REG_MLDSA_PUBKEY_449 (0x81c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_450 (0x10030820) +#define MLDSA_REG_MLDSA_PUBKEY_450 (0x820) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_451 (0x10030824) +#define MLDSA_REG_MLDSA_PUBKEY_451 (0x824) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_452 (0x10030828) +#define MLDSA_REG_MLDSA_PUBKEY_452 (0x828) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_453 (0x1003082c) +#define MLDSA_REG_MLDSA_PUBKEY_453 (0x82c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_454 (0x10030830) +#define MLDSA_REG_MLDSA_PUBKEY_454 (0x830) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_455 (0x10030834) +#define MLDSA_REG_MLDSA_PUBKEY_455 (0x834) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_456 (0x10030838) +#define MLDSA_REG_MLDSA_PUBKEY_456 (0x838) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_457 (0x1003083c) +#define MLDSA_REG_MLDSA_PUBKEY_457 (0x83c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_458 (0x10030840) +#define MLDSA_REG_MLDSA_PUBKEY_458 (0x840) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_459 (0x10030844) +#define MLDSA_REG_MLDSA_PUBKEY_459 (0x844) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_460 (0x10030848) +#define MLDSA_REG_MLDSA_PUBKEY_460 (0x848) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_461 (0x1003084c) +#define MLDSA_REG_MLDSA_PUBKEY_461 (0x84c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_462 (0x10030850) +#define MLDSA_REG_MLDSA_PUBKEY_462 (0x850) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_463 (0x10030854) +#define MLDSA_REG_MLDSA_PUBKEY_463 (0x854) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_464 (0x10030858) +#define MLDSA_REG_MLDSA_PUBKEY_464 (0x858) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_465 (0x1003085c) +#define MLDSA_REG_MLDSA_PUBKEY_465 (0x85c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_466 (0x10030860) +#define MLDSA_REG_MLDSA_PUBKEY_466 (0x860) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_467 (0x10030864) +#define MLDSA_REG_MLDSA_PUBKEY_467 (0x864) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_468 (0x10030868) +#define MLDSA_REG_MLDSA_PUBKEY_468 (0x868) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_469 (0x1003086c) +#define MLDSA_REG_MLDSA_PUBKEY_469 (0x86c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_470 (0x10030870) +#define MLDSA_REG_MLDSA_PUBKEY_470 (0x870) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_471 (0x10030874) +#define MLDSA_REG_MLDSA_PUBKEY_471 (0x874) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_472 (0x10030878) +#define MLDSA_REG_MLDSA_PUBKEY_472 (0x878) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_473 (0x1003087c) +#define MLDSA_REG_MLDSA_PUBKEY_473 (0x87c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_474 (0x10030880) +#define MLDSA_REG_MLDSA_PUBKEY_474 (0x880) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_475 (0x10030884) +#define MLDSA_REG_MLDSA_PUBKEY_475 (0x884) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_476 (0x10030888) +#define MLDSA_REG_MLDSA_PUBKEY_476 (0x888) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_477 (0x1003088c) +#define MLDSA_REG_MLDSA_PUBKEY_477 (0x88c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_478 (0x10030890) +#define MLDSA_REG_MLDSA_PUBKEY_478 (0x890) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_479 (0x10030894) +#define MLDSA_REG_MLDSA_PUBKEY_479 (0x894) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_480 (0x10030898) +#define MLDSA_REG_MLDSA_PUBKEY_480 (0x898) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_481 (0x1003089c) +#define MLDSA_REG_MLDSA_PUBKEY_481 (0x89c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_482 (0x100308a0) +#define MLDSA_REG_MLDSA_PUBKEY_482 (0x8a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_483 (0x100308a4) +#define MLDSA_REG_MLDSA_PUBKEY_483 (0x8a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_484 (0x100308a8) +#define MLDSA_REG_MLDSA_PUBKEY_484 (0x8a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_485 (0x100308ac) +#define MLDSA_REG_MLDSA_PUBKEY_485 (0x8ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_486 (0x100308b0) +#define MLDSA_REG_MLDSA_PUBKEY_486 (0x8b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_487 (0x100308b4) +#define MLDSA_REG_MLDSA_PUBKEY_487 (0x8b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_488 (0x100308b8) +#define MLDSA_REG_MLDSA_PUBKEY_488 (0x8b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_489 (0x100308bc) +#define MLDSA_REG_MLDSA_PUBKEY_489 (0x8bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_490 (0x100308c0) +#define MLDSA_REG_MLDSA_PUBKEY_490 (0x8c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_491 (0x100308c4) +#define MLDSA_REG_MLDSA_PUBKEY_491 (0x8c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_492 (0x100308c8) +#define MLDSA_REG_MLDSA_PUBKEY_492 (0x8c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_493 (0x100308cc) +#define MLDSA_REG_MLDSA_PUBKEY_493 (0x8cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_494 (0x100308d0) +#define MLDSA_REG_MLDSA_PUBKEY_494 (0x8d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_495 (0x100308d4) +#define MLDSA_REG_MLDSA_PUBKEY_495 (0x8d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_496 (0x100308d8) +#define MLDSA_REG_MLDSA_PUBKEY_496 (0x8d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_497 (0x100308dc) +#define MLDSA_REG_MLDSA_PUBKEY_497 (0x8dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_498 (0x100308e0) +#define MLDSA_REG_MLDSA_PUBKEY_498 (0x8e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_499 (0x100308e4) +#define MLDSA_REG_MLDSA_PUBKEY_499 (0x8e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_500 (0x100308e8) +#define MLDSA_REG_MLDSA_PUBKEY_500 (0x8e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_501 (0x100308ec) +#define MLDSA_REG_MLDSA_PUBKEY_501 (0x8ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_502 (0x100308f0) +#define MLDSA_REG_MLDSA_PUBKEY_502 (0x8f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_503 (0x100308f4) +#define MLDSA_REG_MLDSA_PUBKEY_503 (0x8f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_504 (0x100308f8) +#define MLDSA_REG_MLDSA_PUBKEY_504 (0x8f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_505 (0x100308fc) +#define MLDSA_REG_MLDSA_PUBKEY_505 (0x8fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_506 (0x10030900) +#define MLDSA_REG_MLDSA_PUBKEY_506 (0x900) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_507 (0x10030904) +#define MLDSA_REG_MLDSA_PUBKEY_507 (0x904) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_508 (0x10030908) +#define MLDSA_REG_MLDSA_PUBKEY_508 (0x908) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_509 (0x1003090c) +#define MLDSA_REG_MLDSA_PUBKEY_509 (0x90c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_510 (0x10030910) +#define MLDSA_REG_MLDSA_PUBKEY_510 (0x910) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_511 (0x10030914) +#define MLDSA_REG_MLDSA_PUBKEY_511 (0x914) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_512 (0x10030918) +#define MLDSA_REG_MLDSA_PUBKEY_512 (0x918) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_513 (0x1003091c) +#define MLDSA_REG_MLDSA_PUBKEY_513 (0x91c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_514 (0x10030920) +#define MLDSA_REG_MLDSA_PUBKEY_514 (0x920) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_515 (0x10030924) +#define MLDSA_REG_MLDSA_PUBKEY_515 (0x924) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_516 (0x10030928) +#define MLDSA_REG_MLDSA_PUBKEY_516 (0x928) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_517 (0x1003092c) +#define MLDSA_REG_MLDSA_PUBKEY_517 (0x92c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_518 (0x10030930) +#define MLDSA_REG_MLDSA_PUBKEY_518 (0x930) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_519 (0x10030934) +#define MLDSA_REG_MLDSA_PUBKEY_519 (0x934) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_520 (0x10030938) +#define MLDSA_REG_MLDSA_PUBKEY_520 (0x938) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_521 (0x1003093c) +#define MLDSA_REG_MLDSA_PUBKEY_521 (0x93c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_522 (0x10030940) +#define MLDSA_REG_MLDSA_PUBKEY_522 (0x940) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_523 (0x10030944) +#define MLDSA_REG_MLDSA_PUBKEY_523 (0x944) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_524 (0x10030948) +#define MLDSA_REG_MLDSA_PUBKEY_524 (0x948) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_525 (0x1003094c) +#define MLDSA_REG_MLDSA_PUBKEY_525 (0x94c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_526 (0x10030950) +#define MLDSA_REG_MLDSA_PUBKEY_526 (0x950) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_527 (0x10030954) +#define MLDSA_REG_MLDSA_PUBKEY_527 (0x954) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_528 (0x10030958) +#define MLDSA_REG_MLDSA_PUBKEY_528 (0x958) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_529 (0x1003095c) +#define MLDSA_REG_MLDSA_PUBKEY_529 (0x95c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_530 (0x10030960) +#define MLDSA_REG_MLDSA_PUBKEY_530 (0x960) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_531 (0x10030964) +#define MLDSA_REG_MLDSA_PUBKEY_531 (0x964) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_532 (0x10030968) +#define MLDSA_REG_MLDSA_PUBKEY_532 (0x968) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_533 (0x1003096c) +#define MLDSA_REG_MLDSA_PUBKEY_533 (0x96c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_534 (0x10030970) +#define MLDSA_REG_MLDSA_PUBKEY_534 (0x970) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_535 (0x10030974) +#define MLDSA_REG_MLDSA_PUBKEY_535 (0x974) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_536 (0x10030978) +#define MLDSA_REG_MLDSA_PUBKEY_536 (0x978) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_537 (0x1003097c) +#define MLDSA_REG_MLDSA_PUBKEY_537 (0x97c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_538 (0x10030980) +#define MLDSA_REG_MLDSA_PUBKEY_538 (0x980) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_539 (0x10030984) +#define MLDSA_REG_MLDSA_PUBKEY_539 (0x984) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_540 (0x10030988) +#define MLDSA_REG_MLDSA_PUBKEY_540 (0x988) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_541 (0x1003098c) +#define MLDSA_REG_MLDSA_PUBKEY_541 (0x98c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_542 (0x10030990) +#define MLDSA_REG_MLDSA_PUBKEY_542 (0x990) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_543 (0x10030994) +#define MLDSA_REG_MLDSA_PUBKEY_543 (0x994) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_544 (0x10030998) +#define MLDSA_REG_MLDSA_PUBKEY_544 (0x998) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_545 (0x1003099c) +#define MLDSA_REG_MLDSA_PUBKEY_545 (0x99c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_546 (0x100309a0) +#define MLDSA_REG_MLDSA_PUBKEY_546 (0x9a0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_547 (0x100309a4) +#define MLDSA_REG_MLDSA_PUBKEY_547 (0x9a4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_548 (0x100309a8) +#define MLDSA_REG_MLDSA_PUBKEY_548 (0x9a8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_549 (0x100309ac) +#define MLDSA_REG_MLDSA_PUBKEY_549 (0x9ac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_550 (0x100309b0) +#define MLDSA_REG_MLDSA_PUBKEY_550 (0x9b0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_551 (0x100309b4) +#define MLDSA_REG_MLDSA_PUBKEY_551 (0x9b4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_552 (0x100309b8) +#define MLDSA_REG_MLDSA_PUBKEY_552 (0x9b8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_553 (0x100309bc) +#define MLDSA_REG_MLDSA_PUBKEY_553 (0x9bc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_554 (0x100309c0) +#define MLDSA_REG_MLDSA_PUBKEY_554 (0x9c0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_555 (0x100309c4) +#define MLDSA_REG_MLDSA_PUBKEY_555 (0x9c4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_556 (0x100309c8) +#define MLDSA_REG_MLDSA_PUBKEY_556 (0x9c8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_557 (0x100309cc) +#define MLDSA_REG_MLDSA_PUBKEY_557 (0x9cc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_558 (0x100309d0) +#define MLDSA_REG_MLDSA_PUBKEY_558 (0x9d0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_559 (0x100309d4) +#define MLDSA_REG_MLDSA_PUBKEY_559 (0x9d4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_560 (0x100309d8) +#define MLDSA_REG_MLDSA_PUBKEY_560 (0x9d8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_561 (0x100309dc) +#define MLDSA_REG_MLDSA_PUBKEY_561 (0x9dc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_562 (0x100309e0) +#define MLDSA_REG_MLDSA_PUBKEY_562 (0x9e0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_563 (0x100309e4) +#define MLDSA_REG_MLDSA_PUBKEY_563 (0x9e4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_564 (0x100309e8) +#define MLDSA_REG_MLDSA_PUBKEY_564 (0x9e8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_565 (0x100309ec) +#define MLDSA_REG_MLDSA_PUBKEY_565 (0x9ec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_566 (0x100309f0) +#define MLDSA_REG_MLDSA_PUBKEY_566 (0x9f0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_567 (0x100309f4) +#define MLDSA_REG_MLDSA_PUBKEY_567 (0x9f4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_568 (0x100309f8) +#define MLDSA_REG_MLDSA_PUBKEY_568 (0x9f8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_569 (0x100309fc) +#define MLDSA_REG_MLDSA_PUBKEY_569 (0x9fc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_570 (0x10030a00) +#define MLDSA_REG_MLDSA_PUBKEY_570 (0xa00) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_571 (0x10030a04) +#define MLDSA_REG_MLDSA_PUBKEY_571 (0xa04) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_572 (0x10030a08) +#define MLDSA_REG_MLDSA_PUBKEY_572 (0xa08) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_573 (0x10030a0c) +#define MLDSA_REG_MLDSA_PUBKEY_573 (0xa0c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_574 (0x10030a10) +#define MLDSA_REG_MLDSA_PUBKEY_574 (0xa10) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_575 (0x10030a14) +#define MLDSA_REG_MLDSA_PUBKEY_575 (0xa14) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_576 (0x10030a18) +#define MLDSA_REG_MLDSA_PUBKEY_576 (0xa18) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_577 (0x10030a1c) +#define MLDSA_REG_MLDSA_PUBKEY_577 (0xa1c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_578 (0x10030a20) +#define MLDSA_REG_MLDSA_PUBKEY_578 (0xa20) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_579 (0x10030a24) +#define MLDSA_REG_MLDSA_PUBKEY_579 (0xa24) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_580 (0x10030a28) +#define MLDSA_REG_MLDSA_PUBKEY_580 (0xa28) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_581 (0x10030a2c) +#define MLDSA_REG_MLDSA_PUBKEY_581 (0xa2c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_582 (0x10030a30) +#define MLDSA_REG_MLDSA_PUBKEY_582 (0xa30) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_583 (0x10030a34) +#define MLDSA_REG_MLDSA_PUBKEY_583 (0xa34) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_584 (0x10030a38) +#define MLDSA_REG_MLDSA_PUBKEY_584 (0xa38) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_585 (0x10030a3c) +#define MLDSA_REG_MLDSA_PUBKEY_585 (0xa3c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_586 (0x10030a40) +#define MLDSA_REG_MLDSA_PUBKEY_586 (0xa40) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_587 (0x10030a44) +#define MLDSA_REG_MLDSA_PUBKEY_587 (0xa44) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_588 (0x10030a48) +#define MLDSA_REG_MLDSA_PUBKEY_588 (0xa48) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_589 (0x10030a4c) +#define MLDSA_REG_MLDSA_PUBKEY_589 (0xa4c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_590 (0x10030a50) +#define MLDSA_REG_MLDSA_PUBKEY_590 (0xa50) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_591 (0x10030a54) +#define MLDSA_REG_MLDSA_PUBKEY_591 (0xa54) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_592 (0x10030a58) +#define MLDSA_REG_MLDSA_PUBKEY_592 (0xa58) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_593 (0x10030a5c) +#define MLDSA_REG_MLDSA_PUBKEY_593 (0xa5c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_594 (0x10030a60) +#define MLDSA_REG_MLDSA_PUBKEY_594 (0xa60) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_595 (0x10030a64) +#define MLDSA_REG_MLDSA_PUBKEY_595 (0xa64) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_596 (0x10030a68) +#define MLDSA_REG_MLDSA_PUBKEY_596 (0xa68) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_597 (0x10030a6c) +#define MLDSA_REG_MLDSA_PUBKEY_597 (0xa6c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_598 (0x10030a70) +#define MLDSA_REG_MLDSA_PUBKEY_598 (0xa70) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_599 (0x10030a74) +#define MLDSA_REG_MLDSA_PUBKEY_599 (0xa74) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_600 (0x10030a78) +#define MLDSA_REG_MLDSA_PUBKEY_600 (0xa78) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_601 (0x10030a7c) +#define MLDSA_REG_MLDSA_PUBKEY_601 (0xa7c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_602 (0x10030a80) +#define MLDSA_REG_MLDSA_PUBKEY_602 (0xa80) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_603 (0x10030a84) +#define MLDSA_REG_MLDSA_PUBKEY_603 (0xa84) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_604 (0x10030a88) +#define MLDSA_REG_MLDSA_PUBKEY_604 (0xa88) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_605 (0x10030a8c) +#define MLDSA_REG_MLDSA_PUBKEY_605 (0xa8c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_606 (0x10030a90) +#define MLDSA_REG_MLDSA_PUBKEY_606 (0xa90) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_607 (0x10030a94) +#define MLDSA_REG_MLDSA_PUBKEY_607 (0xa94) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_608 (0x10030a98) +#define MLDSA_REG_MLDSA_PUBKEY_608 (0xa98) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_609 (0x10030a9c) +#define MLDSA_REG_MLDSA_PUBKEY_609 (0xa9c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_610 (0x10030aa0) +#define MLDSA_REG_MLDSA_PUBKEY_610 (0xaa0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_611 (0x10030aa4) +#define MLDSA_REG_MLDSA_PUBKEY_611 (0xaa4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_612 (0x10030aa8) +#define MLDSA_REG_MLDSA_PUBKEY_612 (0xaa8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_613 (0x10030aac) +#define MLDSA_REG_MLDSA_PUBKEY_613 (0xaac) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_614 (0x10030ab0) +#define MLDSA_REG_MLDSA_PUBKEY_614 (0xab0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_615 (0x10030ab4) +#define MLDSA_REG_MLDSA_PUBKEY_615 (0xab4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_616 (0x10030ab8) +#define MLDSA_REG_MLDSA_PUBKEY_616 (0xab8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_617 (0x10030abc) +#define MLDSA_REG_MLDSA_PUBKEY_617 (0xabc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_618 (0x10030ac0) +#define MLDSA_REG_MLDSA_PUBKEY_618 (0xac0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_619 (0x10030ac4) +#define MLDSA_REG_MLDSA_PUBKEY_619 (0xac4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_620 (0x10030ac8) +#define MLDSA_REG_MLDSA_PUBKEY_620 (0xac8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_621 (0x10030acc) +#define MLDSA_REG_MLDSA_PUBKEY_621 (0xacc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_622 (0x10030ad0) +#define MLDSA_REG_MLDSA_PUBKEY_622 (0xad0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_623 (0x10030ad4) +#define MLDSA_REG_MLDSA_PUBKEY_623 (0xad4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_624 (0x10030ad8) +#define MLDSA_REG_MLDSA_PUBKEY_624 (0xad8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_625 (0x10030adc) +#define MLDSA_REG_MLDSA_PUBKEY_625 (0xadc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_626 (0x10030ae0) +#define MLDSA_REG_MLDSA_PUBKEY_626 (0xae0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_627 (0x10030ae4) +#define MLDSA_REG_MLDSA_PUBKEY_627 (0xae4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_628 (0x10030ae8) +#define MLDSA_REG_MLDSA_PUBKEY_628 (0xae8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_629 (0x10030aec) +#define MLDSA_REG_MLDSA_PUBKEY_629 (0xaec) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_630 (0x10030af0) +#define MLDSA_REG_MLDSA_PUBKEY_630 (0xaf0) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_631 (0x10030af4) +#define MLDSA_REG_MLDSA_PUBKEY_631 (0xaf4) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_632 (0x10030af8) +#define MLDSA_REG_MLDSA_PUBKEY_632 (0xaf8) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_633 (0x10030afc) +#define MLDSA_REG_MLDSA_PUBKEY_633 (0xafc) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_634 (0x10030b00) +#define MLDSA_REG_MLDSA_PUBKEY_634 (0xb00) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_635 (0x10030b04) +#define MLDSA_REG_MLDSA_PUBKEY_635 (0xb04) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_636 (0x10030b08) +#define MLDSA_REG_MLDSA_PUBKEY_636 (0xb08) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_637 (0x10030b0c) +#define MLDSA_REG_MLDSA_PUBKEY_637 (0xb0c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_638 (0x10030b10) +#define MLDSA_REG_MLDSA_PUBKEY_638 (0xb10) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_639 (0x10030b14) +#define MLDSA_REG_MLDSA_PUBKEY_639 (0xb14) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_640 (0x10030b18) +#define MLDSA_REG_MLDSA_PUBKEY_640 (0xb18) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_641 (0x10030b1c) +#define MLDSA_REG_MLDSA_PUBKEY_641 (0xb1c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_642 (0x10030b20) +#define MLDSA_REG_MLDSA_PUBKEY_642 (0xb20) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_643 (0x10030b24) +#define MLDSA_REG_MLDSA_PUBKEY_643 (0xb24) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_644 (0x10030b28) +#define MLDSA_REG_MLDSA_PUBKEY_644 (0xb28) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_645 (0x10030b2c) +#define MLDSA_REG_MLDSA_PUBKEY_645 (0xb2c) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_646 (0x10030b30) +#define MLDSA_REG_MLDSA_PUBKEY_646 (0xb30) +#define CLP_MLDSA_REG_MLDSA_PUBKEY_647 (0x10030b34) +#define MLDSA_REG_MLDSA_PUBKEY_647 (0xb34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_0 (0x10030b38) +#define MLDSA_REG_MLDSA_SIGNATURE_0 (0xb38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1 (0x10030b3c) +#define MLDSA_REG_MLDSA_SIGNATURE_1 (0xb3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_2 (0x10030b40) +#define MLDSA_REG_MLDSA_SIGNATURE_2 (0xb40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_3 (0x10030b44) +#define MLDSA_REG_MLDSA_SIGNATURE_3 (0xb44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_4 (0x10030b48) +#define MLDSA_REG_MLDSA_SIGNATURE_4 (0xb48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_5 (0x10030b4c) +#define MLDSA_REG_MLDSA_SIGNATURE_5 (0xb4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_6 (0x10030b50) +#define MLDSA_REG_MLDSA_SIGNATURE_6 (0xb50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_7 (0x10030b54) +#define MLDSA_REG_MLDSA_SIGNATURE_7 (0xb54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_8 (0x10030b58) +#define MLDSA_REG_MLDSA_SIGNATURE_8 (0xb58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_9 (0x10030b5c) +#define MLDSA_REG_MLDSA_SIGNATURE_9 (0xb5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_10 (0x10030b60) +#define MLDSA_REG_MLDSA_SIGNATURE_10 (0xb60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_11 (0x10030b64) +#define MLDSA_REG_MLDSA_SIGNATURE_11 (0xb64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_12 (0x10030b68) +#define MLDSA_REG_MLDSA_SIGNATURE_12 (0xb68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_13 (0x10030b6c) +#define MLDSA_REG_MLDSA_SIGNATURE_13 (0xb6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_14 (0x10030b70) +#define MLDSA_REG_MLDSA_SIGNATURE_14 (0xb70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_15 (0x10030b74) +#define MLDSA_REG_MLDSA_SIGNATURE_15 (0xb74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_16 (0x10030b78) +#define MLDSA_REG_MLDSA_SIGNATURE_16 (0xb78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_17 (0x10030b7c) +#define MLDSA_REG_MLDSA_SIGNATURE_17 (0xb7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_18 (0x10030b80) +#define MLDSA_REG_MLDSA_SIGNATURE_18 (0xb80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_19 (0x10030b84) +#define MLDSA_REG_MLDSA_SIGNATURE_19 (0xb84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_20 (0x10030b88) +#define MLDSA_REG_MLDSA_SIGNATURE_20 (0xb88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_21 (0x10030b8c) +#define MLDSA_REG_MLDSA_SIGNATURE_21 (0xb8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_22 (0x10030b90) +#define MLDSA_REG_MLDSA_SIGNATURE_22 (0xb90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_23 (0x10030b94) +#define MLDSA_REG_MLDSA_SIGNATURE_23 (0xb94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_24 (0x10030b98) +#define MLDSA_REG_MLDSA_SIGNATURE_24 (0xb98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_25 (0x10030b9c) +#define MLDSA_REG_MLDSA_SIGNATURE_25 (0xb9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_26 (0x10030ba0) +#define MLDSA_REG_MLDSA_SIGNATURE_26 (0xba0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_27 (0x10030ba4) +#define MLDSA_REG_MLDSA_SIGNATURE_27 (0xba4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_28 (0x10030ba8) +#define MLDSA_REG_MLDSA_SIGNATURE_28 (0xba8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_29 (0x10030bac) +#define MLDSA_REG_MLDSA_SIGNATURE_29 (0xbac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_30 (0x10030bb0) +#define MLDSA_REG_MLDSA_SIGNATURE_30 (0xbb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_31 (0x10030bb4) +#define MLDSA_REG_MLDSA_SIGNATURE_31 (0xbb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_32 (0x10030bb8) +#define MLDSA_REG_MLDSA_SIGNATURE_32 (0xbb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_33 (0x10030bbc) +#define MLDSA_REG_MLDSA_SIGNATURE_33 (0xbbc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_34 (0x10030bc0) +#define MLDSA_REG_MLDSA_SIGNATURE_34 (0xbc0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_35 (0x10030bc4) +#define MLDSA_REG_MLDSA_SIGNATURE_35 (0xbc4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_36 (0x10030bc8) +#define MLDSA_REG_MLDSA_SIGNATURE_36 (0xbc8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_37 (0x10030bcc) +#define MLDSA_REG_MLDSA_SIGNATURE_37 (0xbcc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_38 (0x10030bd0) +#define MLDSA_REG_MLDSA_SIGNATURE_38 (0xbd0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_39 (0x10030bd4) +#define MLDSA_REG_MLDSA_SIGNATURE_39 (0xbd4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_40 (0x10030bd8) +#define MLDSA_REG_MLDSA_SIGNATURE_40 (0xbd8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_41 (0x10030bdc) +#define MLDSA_REG_MLDSA_SIGNATURE_41 (0xbdc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_42 (0x10030be0) +#define MLDSA_REG_MLDSA_SIGNATURE_42 (0xbe0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_43 (0x10030be4) +#define MLDSA_REG_MLDSA_SIGNATURE_43 (0xbe4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_44 (0x10030be8) +#define MLDSA_REG_MLDSA_SIGNATURE_44 (0xbe8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_45 (0x10030bec) +#define MLDSA_REG_MLDSA_SIGNATURE_45 (0xbec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_46 (0x10030bf0) +#define MLDSA_REG_MLDSA_SIGNATURE_46 (0xbf0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_47 (0x10030bf4) +#define MLDSA_REG_MLDSA_SIGNATURE_47 (0xbf4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_48 (0x10030bf8) +#define MLDSA_REG_MLDSA_SIGNATURE_48 (0xbf8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_49 (0x10030bfc) +#define MLDSA_REG_MLDSA_SIGNATURE_49 (0xbfc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_50 (0x10030c00) +#define MLDSA_REG_MLDSA_SIGNATURE_50 (0xc00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_51 (0x10030c04) +#define MLDSA_REG_MLDSA_SIGNATURE_51 (0xc04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_52 (0x10030c08) +#define MLDSA_REG_MLDSA_SIGNATURE_52 (0xc08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_53 (0x10030c0c) +#define MLDSA_REG_MLDSA_SIGNATURE_53 (0xc0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_54 (0x10030c10) +#define MLDSA_REG_MLDSA_SIGNATURE_54 (0xc10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_55 (0x10030c14) +#define MLDSA_REG_MLDSA_SIGNATURE_55 (0xc14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_56 (0x10030c18) +#define MLDSA_REG_MLDSA_SIGNATURE_56 (0xc18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_57 (0x10030c1c) +#define MLDSA_REG_MLDSA_SIGNATURE_57 (0xc1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_58 (0x10030c20) +#define MLDSA_REG_MLDSA_SIGNATURE_58 (0xc20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_59 (0x10030c24) +#define MLDSA_REG_MLDSA_SIGNATURE_59 (0xc24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_60 (0x10030c28) +#define MLDSA_REG_MLDSA_SIGNATURE_60 (0xc28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_61 (0x10030c2c) +#define MLDSA_REG_MLDSA_SIGNATURE_61 (0xc2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_62 (0x10030c30) +#define MLDSA_REG_MLDSA_SIGNATURE_62 (0xc30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_63 (0x10030c34) +#define MLDSA_REG_MLDSA_SIGNATURE_63 (0xc34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_64 (0x10030c38) +#define MLDSA_REG_MLDSA_SIGNATURE_64 (0xc38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_65 (0x10030c3c) +#define MLDSA_REG_MLDSA_SIGNATURE_65 (0xc3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_66 (0x10030c40) +#define MLDSA_REG_MLDSA_SIGNATURE_66 (0xc40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_67 (0x10030c44) +#define MLDSA_REG_MLDSA_SIGNATURE_67 (0xc44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_68 (0x10030c48) +#define MLDSA_REG_MLDSA_SIGNATURE_68 (0xc48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_69 (0x10030c4c) +#define MLDSA_REG_MLDSA_SIGNATURE_69 (0xc4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_70 (0x10030c50) +#define MLDSA_REG_MLDSA_SIGNATURE_70 (0xc50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_71 (0x10030c54) +#define MLDSA_REG_MLDSA_SIGNATURE_71 (0xc54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_72 (0x10030c58) +#define MLDSA_REG_MLDSA_SIGNATURE_72 (0xc58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_73 (0x10030c5c) +#define MLDSA_REG_MLDSA_SIGNATURE_73 (0xc5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_74 (0x10030c60) +#define MLDSA_REG_MLDSA_SIGNATURE_74 (0xc60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_75 (0x10030c64) +#define MLDSA_REG_MLDSA_SIGNATURE_75 (0xc64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_76 (0x10030c68) +#define MLDSA_REG_MLDSA_SIGNATURE_76 (0xc68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_77 (0x10030c6c) +#define MLDSA_REG_MLDSA_SIGNATURE_77 (0xc6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_78 (0x10030c70) +#define MLDSA_REG_MLDSA_SIGNATURE_78 (0xc70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_79 (0x10030c74) +#define MLDSA_REG_MLDSA_SIGNATURE_79 (0xc74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_80 (0x10030c78) +#define MLDSA_REG_MLDSA_SIGNATURE_80 (0xc78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_81 (0x10030c7c) +#define MLDSA_REG_MLDSA_SIGNATURE_81 (0xc7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_82 (0x10030c80) +#define MLDSA_REG_MLDSA_SIGNATURE_82 (0xc80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_83 (0x10030c84) +#define MLDSA_REG_MLDSA_SIGNATURE_83 (0xc84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_84 (0x10030c88) +#define MLDSA_REG_MLDSA_SIGNATURE_84 (0xc88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_85 (0x10030c8c) +#define MLDSA_REG_MLDSA_SIGNATURE_85 (0xc8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_86 (0x10030c90) +#define MLDSA_REG_MLDSA_SIGNATURE_86 (0xc90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_87 (0x10030c94) +#define MLDSA_REG_MLDSA_SIGNATURE_87 (0xc94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_88 (0x10030c98) +#define MLDSA_REG_MLDSA_SIGNATURE_88 (0xc98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_89 (0x10030c9c) +#define MLDSA_REG_MLDSA_SIGNATURE_89 (0xc9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_90 (0x10030ca0) +#define MLDSA_REG_MLDSA_SIGNATURE_90 (0xca0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_91 (0x10030ca4) +#define MLDSA_REG_MLDSA_SIGNATURE_91 (0xca4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_92 (0x10030ca8) +#define MLDSA_REG_MLDSA_SIGNATURE_92 (0xca8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_93 (0x10030cac) +#define MLDSA_REG_MLDSA_SIGNATURE_93 (0xcac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_94 (0x10030cb0) +#define MLDSA_REG_MLDSA_SIGNATURE_94 (0xcb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_95 (0x10030cb4) +#define MLDSA_REG_MLDSA_SIGNATURE_95 (0xcb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_96 (0x10030cb8) +#define MLDSA_REG_MLDSA_SIGNATURE_96 (0xcb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_97 (0x10030cbc) +#define MLDSA_REG_MLDSA_SIGNATURE_97 (0xcbc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_98 (0x10030cc0) +#define MLDSA_REG_MLDSA_SIGNATURE_98 (0xcc0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_99 (0x10030cc4) +#define MLDSA_REG_MLDSA_SIGNATURE_99 (0xcc4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_100 (0x10030cc8) +#define MLDSA_REG_MLDSA_SIGNATURE_100 (0xcc8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_101 (0x10030ccc) +#define MLDSA_REG_MLDSA_SIGNATURE_101 (0xccc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_102 (0x10030cd0) +#define MLDSA_REG_MLDSA_SIGNATURE_102 (0xcd0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_103 (0x10030cd4) +#define MLDSA_REG_MLDSA_SIGNATURE_103 (0xcd4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_104 (0x10030cd8) +#define MLDSA_REG_MLDSA_SIGNATURE_104 (0xcd8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_105 (0x10030cdc) +#define MLDSA_REG_MLDSA_SIGNATURE_105 (0xcdc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_106 (0x10030ce0) +#define MLDSA_REG_MLDSA_SIGNATURE_106 (0xce0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_107 (0x10030ce4) +#define MLDSA_REG_MLDSA_SIGNATURE_107 (0xce4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_108 (0x10030ce8) +#define MLDSA_REG_MLDSA_SIGNATURE_108 (0xce8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_109 (0x10030cec) +#define MLDSA_REG_MLDSA_SIGNATURE_109 (0xcec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_110 (0x10030cf0) +#define MLDSA_REG_MLDSA_SIGNATURE_110 (0xcf0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_111 (0x10030cf4) +#define MLDSA_REG_MLDSA_SIGNATURE_111 (0xcf4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_112 (0x10030cf8) +#define MLDSA_REG_MLDSA_SIGNATURE_112 (0xcf8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_113 (0x10030cfc) +#define MLDSA_REG_MLDSA_SIGNATURE_113 (0xcfc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_114 (0x10030d00) +#define MLDSA_REG_MLDSA_SIGNATURE_114 (0xd00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_115 (0x10030d04) +#define MLDSA_REG_MLDSA_SIGNATURE_115 (0xd04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_116 (0x10030d08) +#define MLDSA_REG_MLDSA_SIGNATURE_116 (0xd08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_117 (0x10030d0c) +#define MLDSA_REG_MLDSA_SIGNATURE_117 (0xd0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_118 (0x10030d10) +#define MLDSA_REG_MLDSA_SIGNATURE_118 (0xd10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_119 (0x10030d14) +#define MLDSA_REG_MLDSA_SIGNATURE_119 (0xd14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_120 (0x10030d18) +#define MLDSA_REG_MLDSA_SIGNATURE_120 (0xd18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_121 (0x10030d1c) +#define MLDSA_REG_MLDSA_SIGNATURE_121 (0xd1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_122 (0x10030d20) +#define MLDSA_REG_MLDSA_SIGNATURE_122 (0xd20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_123 (0x10030d24) +#define MLDSA_REG_MLDSA_SIGNATURE_123 (0xd24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_124 (0x10030d28) +#define MLDSA_REG_MLDSA_SIGNATURE_124 (0xd28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_125 (0x10030d2c) +#define MLDSA_REG_MLDSA_SIGNATURE_125 (0xd2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_126 (0x10030d30) +#define MLDSA_REG_MLDSA_SIGNATURE_126 (0xd30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_127 (0x10030d34) +#define MLDSA_REG_MLDSA_SIGNATURE_127 (0xd34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_128 (0x10030d38) +#define MLDSA_REG_MLDSA_SIGNATURE_128 (0xd38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_129 (0x10030d3c) +#define MLDSA_REG_MLDSA_SIGNATURE_129 (0xd3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_130 (0x10030d40) +#define MLDSA_REG_MLDSA_SIGNATURE_130 (0xd40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_131 (0x10030d44) +#define MLDSA_REG_MLDSA_SIGNATURE_131 (0xd44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_132 (0x10030d48) +#define MLDSA_REG_MLDSA_SIGNATURE_132 (0xd48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_133 (0x10030d4c) +#define MLDSA_REG_MLDSA_SIGNATURE_133 (0xd4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_134 (0x10030d50) +#define MLDSA_REG_MLDSA_SIGNATURE_134 (0xd50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_135 (0x10030d54) +#define MLDSA_REG_MLDSA_SIGNATURE_135 (0xd54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_136 (0x10030d58) +#define MLDSA_REG_MLDSA_SIGNATURE_136 (0xd58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_137 (0x10030d5c) +#define MLDSA_REG_MLDSA_SIGNATURE_137 (0xd5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_138 (0x10030d60) +#define MLDSA_REG_MLDSA_SIGNATURE_138 (0xd60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_139 (0x10030d64) +#define MLDSA_REG_MLDSA_SIGNATURE_139 (0xd64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_140 (0x10030d68) +#define MLDSA_REG_MLDSA_SIGNATURE_140 (0xd68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_141 (0x10030d6c) +#define MLDSA_REG_MLDSA_SIGNATURE_141 (0xd6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_142 (0x10030d70) +#define MLDSA_REG_MLDSA_SIGNATURE_142 (0xd70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_143 (0x10030d74) +#define MLDSA_REG_MLDSA_SIGNATURE_143 (0xd74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_144 (0x10030d78) +#define MLDSA_REG_MLDSA_SIGNATURE_144 (0xd78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_145 (0x10030d7c) +#define MLDSA_REG_MLDSA_SIGNATURE_145 (0xd7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_146 (0x10030d80) +#define MLDSA_REG_MLDSA_SIGNATURE_146 (0xd80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_147 (0x10030d84) +#define MLDSA_REG_MLDSA_SIGNATURE_147 (0xd84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_148 (0x10030d88) +#define MLDSA_REG_MLDSA_SIGNATURE_148 (0xd88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_149 (0x10030d8c) +#define MLDSA_REG_MLDSA_SIGNATURE_149 (0xd8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_150 (0x10030d90) +#define MLDSA_REG_MLDSA_SIGNATURE_150 (0xd90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_151 (0x10030d94) +#define MLDSA_REG_MLDSA_SIGNATURE_151 (0xd94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_152 (0x10030d98) +#define MLDSA_REG_MLDSA_SIGNATURE_152 (0xd98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_153 (0x10030d9c) +#define MLDSA_REG_MLDSA_SIGNATURE_153 (0xd9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_154 (0x10030da0) +#define MLDSA_REG_MLDSA_SIGNATURE_154 (0xda0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_155 (0x10030da4) +#define MLDSA_REG_MLDSA_SIGNATURE_155 (0xda4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_156 (0x10030da8) +#define MLDSA_REG_MLDSA_SIGNATURE_156 (0xda8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_157 (0x10030dac) +#define MLDSA_REG_MLDSA_SIGNATURE_157 (0xdac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_158 (0x10030db0) +#define MLDSA_REG_MLDSA_SIGNATURE_158 (0xdb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_159 (0x10030db4) +#define MLDSA_REG_MLDSA_SIGNATURE_159 (0xdb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_160 (0x10030db8) +#define MLDSA_REG_MLDSA_SIGNATURE_160 (0xdb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_161 (0x10030dbc) +#define MLDSA_REG_MLDSA_SIGNATURE_161 (0xdbc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_162 (0x10030dc0) +#define MLDSA_REG_MLDSA_SIGNATURE_162 (0xdc0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_163 (0x10030dc4) +#define MLDSA_REG_MLDSA_SIGNATURE_163 (0xdc4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_164 (0x10030dc8) +#define MLDSA_REG_MLDSA_SIGNATURE_164 (0xdc8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_165 (0x10030dcc) +#define MLDSA_REG_MLDSA_SIGNATURE_165 (0xdcc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_166 (0x10030dd0) +#define MLDSA_REG_MLDSA_SIGNATURE_166 (0xdd0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_167 (0x10030dd4) +#define MLDSA_REG_MLDSA_SIGNATURE_167 (0xdd4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_168 (0x10030dd8) +#define MLDSA_REG_MLDSA_SIGNATURE_168 (0xdd8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_169 (0x10030ddc) +#define MLDSA_REG_MLDSA_SIGNATURE_169 (0xddc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_170 (0x10030de0) +#define MLDSA_REG_MLDSA_SIGNATURE_170 (0xde0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_171 (0x10030de4) +#define MLDSA_REG_MLDSA_SIGNATURE_171 (0xde4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_172 (0x10030de8) +#define MLDSA_REG_MLDSA_SIGNATURE_172 (0xde8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_173 (0x10030dec) +#define MLDSA_REG_MLDSA_SIGNATURE_173 (0xdec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_174 (0x10030df0) +#define MLDSA_REG_MLDSA_SIGNATURE_174 (0xdf0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_175 (0x10030df4) +#define MLDSA_REG_MLDSA_SIGNATURE_175 (0xdf4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_176 (0x10030df8) +#define MLDSA_REG_MLDSA_SIGNATURE_176 (0xdf8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_177 (0x10030dfc) +#define MLDSA_REG_MLDSA_SIGNATURE_177 (0xdfc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_178 (0x10030e00) +#define MLDSA_REG_MLDSA_SIGNATURE_178 (0xe00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_179 (0x10030e04) +#define MLDSA_REG_MLDSA_SIGNATURE_179 (0xe04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_180 (0x10030e08) +#define MLDSA_REG_MLDSA_SIGNATURE_180 (0xe08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_181 (0x10030e0c) +#define MLDSA_REG_MLDSA_SIGNATURE_181 (0xe0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_182 (0x10030e10) +#define MLDSA_REG_MLDSA_SIGNATURE_182 (0xe10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_183 (0x10030e14) +#define MLDSA_REG_MLDSA_SIGNATURE_183 (0xe14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_184 (0x10030e18) +#define MLDSA_REG_MLDSA_SIGNATURE_184 (0xe18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_185 (0x10030e1c) +#define MLDSA_REG_MLDSA_SIGNATURE_185 (0xe1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_186 (0x10030e20) +#define MLDSA_REG_MLDSA_SIGNATURE_186 (0xe20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_187 (0x10030e24) +#define MLDSA_REG_MLDSA_SIGNATURE_187 (0xe24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_188 (0x10030e28) +#define MLDSA_REG_MLDSA_SIGNATURE_188 (0xe28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_189 (0x10030e2c) +#define MLDSA_REG_MLDSA_SIGNATURE_189 (0xe2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_190 (0x10030e30) +#define MLDSA_REG_MLDSA_SIGNATURE_190 (0xe30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_191 (0x10030e34) +#define MLDSA_REG_MLDSA_SIGNATURE_191 (0xe34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_192 (0x10030e38) +#define MLDSA_REG_MLDSA_SIGNATURE_192 (0xe38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_193 (0x10030e3c) +#define MLDSA_REG_MLDSA_SIGNATURE_193 (0xe3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_194 (0x10030e40) +#define MLDSA_REG_MLDSA_SIGNATURE_194 (0xe40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_195 (0x10030e44) +#define MLDSA_REG_MLDSA_SIGNATURE_195 (0xe44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_196 (0x10030e48) +#define MLDSA_REG_MLDSA_SIGNATURE_196 (0xe48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_197 (0x10030e4c) +#define MLDSA_REG_MLDSA_SIGNATURE_197 (0xe4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_198 (0x10030e50) +#define MLDSA_REG_MLDSA_SIGNATURE_198 (0xe50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_199 (0x10030e54) +#define MLDSA_REG_MLDSA_SIGNATURE_199 (0xe54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_200 (0x10030e58) +#define MLDSA_REG_MLDSA_SIGNATURE_200 (0xe58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_201 (0x10030e5c) +#define MLDSA_REG_MLDSA_SIGNATURE_201 (0xe5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_202 (0x10030e60) +#define MLDSA_REG_MLDSA_SIGNATURE_202 (0xe60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_203 (0x10030e64) +#define MLDSA_REG_MLDSA_SIGNATURE_203 (0xe64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_204 (0x10030e68) +#define MLDSA_REG_MLDSA_SIGNATURE_204 (0xe68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_205 (0x10030e6c) +#define MLDSA_REG_MLDSA_SIGNATURE_205 (0xe6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_206 (0x10030e70) +#define MLDSA_REG_MLDSA_SIGNATURE_206 (0xe70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_207 (0x10030e74) +#define MLDSA_REG_MLDSA_SIGNATURE_207 (0xe74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_208 (0x10030e78) +#define MLDSA_REG_MLDSA_SIGNATURE_208 (0xe78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_209 (0x10030e7c) +#define MLDSA_REG_MLDSA_SIGNATURE_209 (0xe7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_210 (0x10030e80) +#define MLDSA_REG_MLDSA_SIGNATURE_210 (0xe80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_211 (0x10030e84) +#define MLDSA_REG_MLDSA_SIGNATURE_211 (0xe84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_212 (0x10030e88) +#define MLDSA_REG_MLDSA_SIGNATURE_212 (0xe88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_213 (0x10030e8c) +#define MLDSA_REG_MLDSA_SIGNATURE_213 (0xe8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_214 (0x10030e90) +#define MLDSA_REG_MLDSA_SIGNATURE_214 (0xe90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_215 (0x10030e94) +#define MLDSA_REG_MLDSA_SIGNATURE_215 (0xe94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_216 (0x10030e98) +#define MLDSA_REG_MLDSA_SIGNATURE_216 (0xe98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_217 (0x10030e9c) +#define MLDSA_REG_MLDSA_SIGNATURE_217 (0xe9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_218 (0x10030ea0) +#define MLDSA_REG_MLDSA_SIGNATURE_218 (0xea0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_219 (0x10030ea4) +#define MLDSA_REG_MLDSA_SIGNATURE_219 (0xea4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_220 (0x10030ea8) +#define MLDSA_REG_MLDSA_SIGNATURE_220 (0xea8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_221 (0x10030eac) +#define MLDSA_REG_MLDSA_SIGNATURE_221 (0xeac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_222 (0x10030eb0) +#define MLDSA_REG_MLDSA_SIGNATURE_222 (0xeb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_223 (0x10030eb4) +#define MLDSA_REG_MLDSA_SIGNATURE_223 (0xeb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_224 (0x10030eb8) +#define MLDSA_REG_MLDSA_SIGNATURE_224 (0xeb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_225 (0x10030ebc) +#define MLDSA_REG_MLDSA_SIGNATURE_225 (0xebc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_226 (0x10030ec0) +#define MLDSA_REG_MLDSA_SIGNATURE_226 (0xec0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_227 (0x10030ec4) +#define MLDSA_REG_MLDSA_SIGNATURE_227 (0xec4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_228 (0x10030ec8) +#define MLDSA_REG_MLDSA_SIGNATURE_228 (0xec8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_229 (0x10030ecc) +#define MLDSA_REG_MLDSA_SIGNATURE_229 (0xecc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_230 (0x10030ed0) +#define MLDSA_REG_MLDSA_SIGNATURE_230 (0xed0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_231 (0x10030ed4) +#define MLDSA_REG_MLDSA_SIGNATURE_231 (0xed4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_232 (0x10030ed8) +#define MLDSA_REG_MLDSA_SIGNATURE_232 (0xed8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_233 (0x10030edc) +#define MLDSA_REG_MLDSA_SIGNATURE_233 (0xedc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_234 (0x10030ee0) +#define MLDSA_REG_MLDSA_SIGNATURE_234 (0xee0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_235 (0x10030ee4) +#define MLDSA_REG_MLDSA_SIGNATURE_235 (0xee4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_236 (0x10030ee8) +#define MLDSA_REG_MLDSA_SIGNATURE_236 (0xee8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_237 (0x10030eec) +#define MLDSA_REG_MLDSA_SIGNATURE_237 (0xeec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_238 (0x10030ef0) +#define MLDSA_REG_MLDSA_SIGNATURE_238 (0xef0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_239 (0x10030ef4) +#define MLDSA_REG_MLDSA_SIGNATURE_239 (0xef4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_240 (0x10030ef8) +#define MLDSA_REG_MLDSA_SIGNATURE_240 (0xef8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_241 (0x10030efc) +#define MLDSA_REG_MLDSA_SIGNATURE_241 (0xefc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_242 (0x10030f00) +#define MLDSA_REG_MLDSA_SIGNATURE_242 (0xf00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_243 (0x10030f04) +#define MLDSA_REG_MLDSA_SIGNATURE_243 (0xf04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_244 (0x10030f08) +#define MLDSA_REG_MLDSA_SIGNATURE_244 (0xf08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_245 (0x10030f0c) +#define MLDSA_REG_MLDSA_SIGNATURE_245 (0xf0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_246 (0x10030f10) +#define MLDSA_REG_MLDSA_SIGNATURE_246 (0xf10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_247 (0x10030f14) +#define MLDSA_REG_MLDSA_SIGNATURE_247 (0xf14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_248 (0x10030f18) +#define MLDSA_REG_MLDSA_SIGNATURE_248 (0xf18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_249 (0x10030f1c) +#define MLDSA_REG_MLDSA_SIGNATURE_249 (0xf1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_250 (0x10030f20) +#define MLDSA_REG_MLDSA_SIGNATURE_250 (0xf20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_251 (0x10030f24) +#define MLDSA_REG_MLDSA_SIGNATURE_251 (0xf24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_252 (0x10030f28) +#define MLDSA_REG_MLDSA_SIGNATURE_252 (0xf28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_253 (0x10030f2c) +#define MLDSA_REG_MLDSA_SIGNATURE_253 (0xf2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_254 (0x10030f30) +#define MLDSA_REG_MLDSA_SIGNATURE_254 (0xf30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_255 (0x10030f34) +#define MLDSA_REG_MLDSA_SIGNATURE_255 (0xf34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_256 (0x10030f38) +#define MLDSA_REG_MLDSA_SIGNATURE_256 (0xf38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_257 (0x10030f3c) +#define MLDSA_REG_MLDSA_SIGNATURE_257 (0xf3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_258 (0x10030f40) +#define MLDSA_REG_MLDSA_SIGNATURE_258 (0xf40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_259 (0x10030f44) +#define MLDSA_REG_MLDSA_SIGNATURE_259 (0xf44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_260 (0x10030f48) +#define MLDSA_REG_MLDSA_SIGNATURE_260 (0xf48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_261 (0x10030f4c) +#define MLDSA_REG_MLDSA_SIGNATURE_261 (0xf4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_262 (0x10030f50) +#define MLDSA_REG_MLDSA_SIGNATURE_262 (0xf50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_263 (0x10030f54) +#define MLDSA_REG_MLDSA_SIGNATURE_263 (0xf54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_264 (0x10030f58) +#define MLDSA_REG_MLDSA_SIGNATURE_264 (0xf58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_265 (0x10030f5c) +#define MLDSA_REG_MLDSA_SIGNATURE_265 (0xf5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_266 (0x10030f60) +#define MLDSA_REG_MLDSA_SIGNATURE_266 (0xf60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_267 (0x10030f64) +#define MLDSA_REG_MLDSA_SIGNATURE_267 (0xf64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_268 (0x10030f68) +#define MLDSA_REG_MLDSA_SIGNATURE_268 (0xf68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_269 (0x10030f6c) +#define MLDSA_REG_MLDSA_SIGNATURE_269 (0xf6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_270 (0x10030f70) +#define MLDSA_REG_MLDSA_SIGNATURE_270 (0xf70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_271 (0x10030f74) +#define MLDSA_REG_MLDSA_SIGNATURE_271 (0xf74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_272 (0x10030f78) +#define MLDSA_REG_MLDSA_SIGNATURE_272 (0xf78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_273 (0x10030f7c) +#define MLDSA_REG_MLDSA_SIGNATURE_273 (0xf7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_274 (0x10030f80) +#define MLDSA_REG_MLDSA_SIGNATURE_274 (0xf80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_275 (0x10030f84) +#define MLDSA_REG_MLDSA_SIGNATURE_275 (0xf84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_276 (0x10030f88) +#define MLDSA_REG_MLDSA_SIGNATURE_276 (0xf88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_277 (0x10030f8c) +#define MLDSA_REG_MLDSA_SIGNATURE_277 (0xf8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_278 (0x10030f90) +#define MLDSA_REG_MLDSA_SIGNATURE_278 (0xf90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_279 (0x10030f94) +#define MLDSA_REG_MLDSA_SIGNATURE_279 (0xf94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_280 (0x10030f98) +#define MLDSA_REG_MLDSA_SIGNATURE_280 (0xf98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_281 (0x10030f9c) +#define MLDSA_REG_MLDSA_SIGNATURE_281 (0xf9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_282 (0x10030fa0) +#define MLDSA_REG_MLDSA_SIGNATURE_282 (0xfa0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_283 (0x10030fa4) +#define MLDSA_REG_MLDSA_SIGNATURE_283 (0xfa4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_284 (0x10030fa8) +#define MLDSA_REG_MLDSA_SIGNATURE_284 (0xfa8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_285 (0x10030fac) +#define MLDSA_REG_MLDSA_SIGNATURE_285 (0xfac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_286 (0x10030fb0) +#define MLDSA_REG_MLDSA_SIGNATURE_286 (0xfb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_287 (0x10030fb4) +#define MLDSA_REG_MLDSA_SIGNATURE_287 (0xfb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_288 (0x10030fb8) +#define MLDSA_REG_MLDSA_SIGNATURE_288 (0xfb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_289 (0x10030fbc) +#define MLDSA_REG_MLDSA_SIGNATURE_289 (0xfbc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_290 (0x10030fc0) +#define MLDSA_REG_MLDSA_SIGNATURE_290 (0xfc0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_291 (0x10030fc4) +#define MLDSA_REG_MLDSA_SIGNATURE_291 (0xfc4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_292 (0x10030fc8) +#define MLDSA_REG_MLDSA_SIGNATURE_292 (0xfc8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_293 (0x10030fcc) +#define MLDSA_REG_MLDSA_SIGNATURE_293 (0xfcc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_294 (0x10030fd0) +#define MLDSA_REG_MLDSA_SIGNATURE_294 (0xfd0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_295 (0x10030fd4) +#define MLDSA_REG_MLDSA_SIGNATURE_295 (0xfd4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_296 (0x10030fd8) +#define MLDSA_REG_MLDSA_SIGNATURE_296 (0xfd8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_297 (0x10030fdc) +#define MLDSA_REG_MLDSA_SIGNATURE_297 (0xfdc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_298 (0x10030fe0) +#define MLDSA_REG_MLDSA_SIGNATURE_298 (0xfe0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_299 (0x10030fe4) +#define MLDSA_REG_MLDSA_SIGNATURE_299 (0xfe4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_300 (0x10030fe8) +#define MLDSA_REG_MLDSA_SIGNATURE_300 (0xfe8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_301 (0x10030fec) +#define MLDSA_REG_MLDSA_SIGNATURE_301 (0xfec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_302 (0x10030ff0) +#define MLDSA_REG_MLDSA_SIGNATURE_302 (0xff0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_303 (0x10030ff4) +#define MLDSA_REG_MLDSA_SIGNATURE_303 (0xff4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_304 (0x10030ff8) +#define MLDSA_REG_MLDSA_SIGNATURE_304 (0xff8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_305 (0x10030ffc) +#define MLDSA_REG_MLDSA_SIGNATURE_305 (0xffc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_306 (0x10031000) +#define MLDSA_REG_MLDSA_SIGNATURE_306 (0x1000) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_307 (0x10031004) +#define MLDSA_REG_MLDSA_SIGNATURE_307 (0x1004) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_308 (0x10031008) +#define MLDSA_REG_MLDSA_SIGNATURE_308 (0x1008) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_309 (0x1003100c) +#define MLDSA_REG_MLDSA_SIGNATURE_309 (0x100c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_310 (0x10031010) +#define MLDSA_REG_MLDSA_SIGNATURE_310 (0x1010) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_311 (0x10031014) +#define MLDSA_REG_MLDSA_SIGNATURE_311 (0x1014) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_312 (0x10031018) +#define MLDSA_REG_MLDSA_SIGNATURE_312 (0x1018) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_313 (0x1003101c) +#define MLDSA_REG_MLDSA_SIGNATURE_313 (0x101c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_314 (0x10031020) +#define MLDSA_REG_MLDSA_SIGNATURE_314 (0x1020) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_315 (0x10031024) +#define MLDSA_REG_MLDSA_SIGNATURE_315 (0x1024) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_316 (0x10031028) +#define MLDSA_REG_MLDSA_SIGNATURE_316 (0x1028) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_317 (0x1003102c) +#define MLDSA_REG_MLDSA_SIGNATURE_317 (0x102c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_318 (0x10031030) +#define MLDSA_REG_MLDSA_SIGNATURE_318 (0x1030) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_319 (0x10031034) +#define MLDSA_REG_MLDSA_SIGNATURE_319 (0x1034) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_320 (0x10031038) +#define MLDSA_REG_MLDSA_SIGNATURE_320 (0x1038) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_321 (0x1003103c) +#define MLDSA_REG_MLDSA_SIGNATURE_321 (0x103c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_322 (0x10031040) +#define MLDSA_REG_MLDSA_SIGNATURE_322 (0x1040) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_323 (0x10031044) +#define MLDSA_REG_MLDSA_SIGNATURE_323 (0x1044) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_324 (0x10031048) +#define MLDSA_REG_MLDSA_SIGNATURE_324 (0x1048) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_325 (0x1003104c) +#define MLDSA_REG_MLDSA_SIGNATURE_325 (0x104c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_326 (0x10031050) +#define MLDSA_REG_MLDSA_SIGNATURE_326 (0x1050) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_327 (0x10031054) +#define MLDSA_REG_MLDSA_SIGNATURE_327 (0x1054) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_328 (0x10031058) +#define MLDSA_REG_MLDSA_SIGNATURE_328 (0x1058) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_329 (0x1003105c) +#define MLDSA_REG_MLDSA_SIGNATURE_329 (0x105c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_330 (0x10031060) +#define MLDSA_REG_MLDSA_SIGNATURE_330 (0x1060) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_331 (0x10031064) +#define MLDSA_REG_MLDSA_SIGNATURE_331 (0x1064) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_332 (0x10031068) +#define MLDSA_REG_MLDSA_SIGNATURE_332 (0x1068) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_333 (0x1003106c) +#define MLDSA_REG_MLDSA_SIGNATURE_333 (0x106c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_334 (0x10031070) +#define MLDSA_REG_MLDSA_SIGNATURE_334 (0x1070) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_335 (0x10031074) +#define MLDSA_REG_MLDSA_SIGNATURE_335 (0x1074) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_336 (0x10031078) +#define MLDSA_REG_MLDSA_SIGNATURE_336 (0x1078) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_337 (0x1003107c) +#define MLDSA_REG_MLDSA_SIGNATURE_337 (0x107c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_338 (0x10031080) +#define MLDSA_REG_MLDSA_SIGNATURE_338 (0x1080) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_339 (0x10031084) +#define MLDSA_REG_MLDSA_SIGNATURE_339 (0x1084) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_340 (0x10031088) +#define MLDSA_REG_MLDSA_SIGNATURE_340 (0x1088) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_341 (0x1003108c) +#define MLDSA_REG_MLDSA_SIGNATURE_341 (0x108c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_342 (0x10031090) +#define MLDSA_REG_MLDSA_SIGNATURE_342 (0x1090) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_343 (0x10031094) +#define MLDSA_REG_MLDSA_SIGNATURE_343 (0x1094) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_344 (0x10031098) +#define MLDSA_REG_MLDSA_SIGNATURE_344 (0x1098) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_345 (0x1003109c) +#define MLDSA_REG_MLDSA_SIGNATURE_345 (0x109c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_346 (0x100310a0) +#define MLDSA_REG_MLDSA_SIGNATURE_346 (0x10a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_347 (0x100310a4) +#define MLDSA_REG_MLDSA_SIGNATURE_347 (0x10a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_348 (0x100310a8) +#define MLDSA_REG_MLDSA_SIGNATURE_348 (0x10a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_349 (0x100310ac) +#define MLDSA_REG_MLDSA_SIGNATURE_349 (0x10ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_350 (0x100310b0) +#define MLDSA_REG_MLDSA_SIGNATURE_350 (0x10b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_351 (0x100310b4) +#define MLDSA_REG_MLDSA_SIGNATURE_351 (0x10b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_352 (0x100310b8) +#define MLDSA_REG_MLDSA_SIGNATURE_352 (0x10b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_353 (0x100310bc) +#define MLDSA_REG_MLDSA_SIGNATURE_353 (0x10bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_354 (0x100310c0) +#define MLDSA_REG_MLDSA_SIGNATURE_354 (0x10c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_355 (0x100310c4) +#define MLDSA_REG_MLDSA_SIGNATURE_355 (0x10c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_356 (0x100310c8) +#define MLDSA_REG_MLDSA_SIGNATURE_356 (0x10c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_357 (0x100310cc) +#define MLDSA_REG_MLDSA_SIGNATURE_357 (0x10cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_358 (0x100310d0) +#define MLDSA_REG_MLDSA_SIGNATURE_358 (0x10d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_359 (0x100310d4) +#define MLDSA_REG_MLDSA_SIGNATURE_359 (0x10d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_360 (0x100310d8) +#define MLDSA_REG_MLDSA_SIGNATURE_360 (0x10d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_361 (0x100310dc) +#define MLDSA_REG_MLDSA_SIGNATURE_361 (0x10dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_362 (0x100310e0) +#define MLDSA_REG_MLDSA_SIGNATURE_362 (0x10e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_363 (0x100310e4) +#define MLDSA_REG_MLDSA_SIGNATURE_363 (0x10e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_364 (0x100310e8) +#define MLDSA_REG_MLDSA_SIGNATURE_364 (0x10e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_365 (0x100310ec) +#define MLDSA_REG_MLDSA_SIGNATURE_365 (0x10ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_366 (0x100310f0) +#define MLDSA_REG_MLDSA_SIGNATURE_366 (0x10f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_367 (0x100310f4) +#define MLDSA_REG_MLDSA_SIGNATURE_367 (0x10f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_368 (0x100310f8) +#define MLDSA_REG_MLDSA_SIGNATURE_368 (0x10f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_369 (0x100310fc) +#define MLDSA_REG_MLDSA_SIGNATURE_369 (0x10fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_370 (0x10031100) +#define MLDSA_REG_MLDSA_SIGNATURE_370 (0x1100) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_371 (0x10031104) +#define MLDSA_REG_MLDSA_SIGNATURE_371 (0x1104) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_372 (0x10031108) +#define MLDSA_REG_MLDSA_SIGNATURE_372 (0x1108) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_373 (0x1003110c) +#define MLDSA_REG_MLDSA_SIGNATURE_373 (0x110c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_374 (0x10031110) +#define MLDSA_REG_MLDSA_SIGNATURE_374 (0x1110) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_375 (0x10031114) +#define MLDSA_REG_MLDSA_SIGNATURE_375 (0x1114) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_376 (0x10031118) +#define MLDSA_REG_MLDSA_SIGNATURE_376 (0x1118) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_377 (0x1003111c) +#define MLDSA_REG_MLDSA_SIGNATURE_377 (0x111c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_378 (0x10031120) +#define MLDSA_REG_MLDSA_SIGNATURE_378 (0x1120) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_379 (0x10031124) +#define MLDSA_REG_MLDSA_SIGNATURE_379 (0x1124) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_380 (0x10031128) +#define MLDSA_REG_MLDSA_SIGNATURE_380 (0x1128) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_381 (0x1003112c) +#define MLDSA_REG_MLDSA_SIGNATURE_381 (0x112c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_382 (0x10031130) +#define MLDSA_REG_MLDSA_SIGNATURE_382 (0x1130) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_383 (0x10031134) +#define MLDSA_REG_MLDSA_SIGNATURE_383 (0x1134) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_384 (0x10031138) +#define MLDSA_REG_MLDSA_SIGNATURE_384 (0x1138) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_385 (0x1003113c) +#define MLDSA_REG_MLDSA_SIGNATURE_385 (0x113c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_386 (0x10031140) +#define MLDSA_REG_MLDSA_SIGNATURE_386 (0x1140) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_387 (0x10031144) +#define MLDSA_REG_MLDSA_SIGNATURE_387 (0x1144) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_388 (0x10031148) +#define MLDSA_REG_MLDSA_SIGNATURE_388 (0x1148) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_389 (0x1003114c) +#define MLDSA_REG_MLDSA_SIGNATURE_389 (0x114c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_390 (0x10031150) +#define MLDSA_REG_MLDSA_SIGNATURE_390 (0x1150) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_391 (0x10031154) +#define MLDSA_REG_MLDSA_SIGNATURE_391 (0x1154) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_392 (0x10031158) +#define MLDSA_REG_MLDSA_SIGNATURE_392 (0x1158) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_393 (0x1003115c) +#define MLDSA_REG_MLDSA_SIGNATURE_393 (0x115c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_394 (0x10031160) +#define MLDSA_REG_MLDSA_SIGNATURE_394 (0x1160) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_395 (0x10031164) +#define MLDSA_REG_MLDSA_SIGNATURE_395 (0x1164) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_396 (0x10031168) +#define MLDSA_REG_MLDSA_SIGNATURE_396 (0x1168) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_397 (0x1003116c) +#define MLDSA_REG_MLDSA_SIGNATURE_397 (0x116c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_398 (0x10031170) +#define MLDSA_REG_MLDSA_SIGNATURE_398 (0x1170) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_399 (0x10031174) +#define MLDSA_REG_MLDSA_SIGNATURE_399 (0x1174) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_400 (0x10031178) +#define MLDSA_REG_MLDSA_SIGNATURE_400 (0x1178) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_401 (0x1003117c) +#define MLDSA_REG_MLDSA_SIGNATURE_401 (0x117c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_402 (0x10031180) +#define MLDSA_REG_MLDSA_SIGNATURE_402 (0x1180) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_403 (0x10031184) +#define MLDSA_REG_MLDSA_SIGNATURE_403 (0x1184) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_404 (0x10031188) +#define MLDSA_REG_MLDSA_SIGNATURE_404 (0x1188) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_405 (0x1003118c) +#define MLDSA_REG_MLDSA_SIGNATURE_405 (0x118c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_406 (0x10031190) +#define MLDSA_REG_MLDSA_SIGNATURE_406 (0x1190) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_407 (0x10031194) +#define MLDSA_REG_MLDSA_SIGNATURE_407 (0x1194) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_408 (0x10031198) +#define MLDSA_REG_MLDSA_SIGNATURE_408 (0x1198) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_409 (0x1003119c) +#define MLDSA_REG_MLDSA_SIGNATURE_409 (0x119c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_410 (0x100311a0) +#define MLDSA_REG_MLDSA_SIGNATURE_410 (0x11a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_411 (0x100311a4) +#define MLDSA_REG_MLDSA_SIGNATURE_411 (0x11a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_412 (0x100311a8) +#define MLDSA_REG_MLDSA_SIGNATURE_412 (0x11a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_413 (0x100311ac) +#define MLDSA_REG_MLDSA_SIGNATURE_413 (0x11ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_414 (0x100311b0) +#define MLDSA_REG_MLDSA_SIGNATURE_414 (0x11b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_415 (0x100311b4) +#define MLDSA_REG_MLDSA_SIGNATURE_415 (0x11b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_416 (0x100311b8) +#define MLDSA_REG_MLDSA_SIGNATURE_416 (0x11b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_417 (0x100311bc) +#define MLDSA_REG_MLDSA_SIGNATURE_417 (0x11bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_418 (0x100311c0) +#define MLDSA_REG_MLDSA_SIGNATURE_418 (0x11c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_419 (0x100311c4) +#define MLDSA_REG_MLDSA_SIGNATURE_419 (0x11c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_420 (0x100311c8) +#define MLDSA_REG_MLDSA_SIGNATURE_420 (0x11c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_421 (0x100311cc) +#define MLDSA_REG_MLDSA_SIGNATURE_421 (0x11cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_422 (0x100311d0) +#define MLDSA_REG_MLDSA_SIGNATURE_422 (0x11d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_423 (0x100311d4) +#define MLDSA_REG_MLDSA_SIGNATURE_423 (0x11d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_424 (0x100311d8) +#define MLDSA_REG_MLDSA_SIGNATURE_424 (0x11d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_425 (0x100311dc) +#define MLDSA_REG_MLDSA_SIGNATURE_425 (0x11dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_426 (0x100311e0) +#define MLDSA_REG_MLDSA_SIGNATURE_426 (0x11e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_427 (0x100311e4) +#define MLDSA_REG_MLDSA_SIGNATURE_427 (0x11e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_428 (0x100311e8) +#define MLDSA_REG_MLDSA_SIGNATURE_428 (0x11e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_429 (0x100311ec) +#define MLDSA_REG_MLDSA_SIGNATURE_429 (0x11ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_430 (0x100311f0) +#define MLDSA_REG_MLDSA_SIGNATURE_430 (0x11f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_431 (0x100311f4) +#define MLDSA_REG_MLDSA_SIGNATURE_431 (0x11f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_432 (0x100311f8) +#define MLDSA_REG_MLDSA_SIGNATURE_432 (0x11f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_433 (0x100311fc) +#define MLDSA_REG_MLDSA_SIGNATURE_433 (0x11fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_434 (0x10031200) +#define MLDSA_REG_MLDSA_SIGNATURE_434 (0x1200) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_435 (0x10031204) +#define MLDSA_REG_MLDSA_SIGNATURE_435 (0x1204) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_436 (0x10031208) +#define MLDSA_REG_MLDSA_SIGNATURE_436 (0x1208) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_437 (0x1003120c) +#define MLDSA_REG_MLDSA_SIGNATURE_437 (0x120c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_438 (0x10031210) +#define MLDSA_REG_MLDSA_SIGNATURE_438 (0x1210) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_439 (0x10031214) +#define MLDSA_REG_MLDSA_SIGNATURE_439 (0x1214) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_440 (0x10031218) +#define MLDSA_REG_MLDSA_SIGNATURE_440 (0x1218) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_441 (0x1003121c) +#define MLDSA_REG_MLDSA_SIGNATURE_441 (0x121c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_442 (0x10031220) +#define MLDSA_REG_MLDSA_SIGNATURE_442 (0x1220) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_443 (0x10031224) +#define MLDSA_REG_MLDSA_SIGNATURE_443 (0x1224) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_444 (0x10031228) +#define MLDSA_REG_MLDSA_SIGNATURE_444 (0x1228) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_445 (0x1003122c) +#define MLDSA_REG_MLDSA_SIGNATURE_445 (0x122c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_446 (0x10031230) +#define MLDSA_REG_MLDSA_SIGNATURE_446 (0x1230) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_447 (0x10031234) +#define MLDSA_REG_MLDSA_SIGNATURE_447 (0x1234) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_448 (0x10031238) +#define MLDSA_REG_MLDSA_SIGNATURE_448 (0x1238) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_449 (0x1003123c) +#define MLDSA_REG_MLDSA_SIGNATURE_449 (0x123c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_450 (0x10031240) +#define MLDSA_REG_MLDSA_SIGNATURE_450 (0x1240) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_451 (0x10031244) +#define MLDSA_REG_MLDSA_SIGNATURE_451 (0x1244) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_452 (0x10031248) +#define MLDSA_REG_MLDSA_SIGNATURE_452 (0x1248) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_453 (0x1003124c) +#define MLDSA_REG_MLDSA_SIGNATURE_453 (0x124c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_454 (0x10031250) +#define MLDSA_REG_MLDSA_SIGNATURE_454 (0x1250) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_455 (0x10031254) +#define MLDSA_REG_MLDSA_SIGNATURE_455 (0x1254) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_456 (0x10031258) +#define MLDSA_REG_MLDSA_SIGNATURE_456 (0x1258) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_457 (0x1003125c) +#define MLDSA_REG_MLDSA_SIGNATURE_457 (0x125c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_458 (0x10031260) +#define MLDSA_REG_MLDSA_SIGNATURE_458 (0x1260) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_459 (0x10031264) +#define MLDSA_REG_MLDSA_SIGNATURE_459 (0x1264) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_460 (0x10031268) +#define MLDSA_REG_MLDSA_SIGNATURE_460 (0x1268) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_461 (0x1003126c) +#define MLDSA_REG_MLDSA_SIGNATURE_461 (0x126c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_462 (0x10031270) +#define MLDSA_REG_MLDSA_SIGNATURE_462 (0x1270) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_463 (0x10031274) +#define MLDSA_REG_MLDSA_SIGNATURE_463 (0x1274) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_464 (0x10031278) +#define MLDSA_REG_MLDSA_SIGNATURE_464 (0x1278) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_465 (0x1003127c) +#define MLDSA_REG_MLDSA_SIGNATURE_465 (0x127c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_466 (0x10031280) +#define MLDSA_REG_MLDSA_SIGNATURE_466 (0x1280) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_467 (0x10031284) +#define MLDSA_REG_MLDSA_SIGNATURE_467 (0x1284) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_468 (0x10031288) +#define MLDSA_REG_MLDSA_SIGNATURE_468 (0x1288) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_469 (0x1003128c) +#define MLDSA_REG_MLDSA_SIGNATURE_469 (0x128c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_470 (0x10031290) +#define MLDSA_REG_MLDSA_SIGNATURE_470 (0x1290) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_471 (0x10031294) +#define MLDSA_REG_MLDSA_SIGNATURE_471 (0x1294) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_472 (0x10031298) +#define MLDSA_REG_MLDSA_SIGNATURE_472 (0x1298) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_473 (0x1003129c) +#define MLDSA_REG_MLDSA_SIGNATURE_473 (0x129c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_474 (0x100312a0) +#define MLDSA_REG_MLDSA_SIGNATURE_474 (0x12a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_475 (0x100312a4) +#define MLDSA_REG_MLDSA_SIGNATURE_475 (0x12a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_476 (0x100312a8) +#define MLDSA_REG_MLDSA_SIGNATURE_476 (0x12a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_477 (0x100312ac) +#define MLDSA_REG_MLDSA_SIGNATURE_477 (0x12ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_478 (0x100312b0) +#define MLDSA_REG_MLDSA_SIGNATURE_478 (0x12b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_479 (0x100312b4) +#define MLDSA_REG_MLDSA_SIGNATURE_479 (0x12b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_480 (0x100312b8) +#define MLDSA_REG_MLDSA_SIGNATURE_480 (0x12b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_481 (0x100312bc) +#define MLDSA_REG_MLDSA_SIGNATURE_481 (0x12bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_482 (0x100312c0) +#define MLDSA_REG_MLDSA_SIGNATURE_482 (0x12c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_483 (0x100312c4) +#define MLDSA_REG_MLDSA_SIGNATURE_483 (0x12c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_484 (0x100312c8) +#define MLDSA_REG_MLDSA_SIGNATURE_484 (0x12c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_485 (0x100312cc) +#define MLDSA_REG_MLDSA_SIGNATURE_485 (0x12cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_486 (0x100312d0) +#define MLDSA_REG_MLDSA_SIGNATURE_486 (0x12d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_487 (0x100312d4) +#define MLDSA_REG_MLDSA_SIGNATURE_487 (0x12d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_488 (0x100312d8) +#define MLDSA_REG_MLDSA_SIGNATURE_488 (0x12d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_489 (0x100312dc) +#define MLDSA_REG_MLDSA_SIGNATURE_489 (0x12dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_490 (0x100312e0) +#define MLDSA_REG_MLDSA_SIGNATURE_490 (0x12e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_491 (0x100312e4) +#define MLDSA_REG_MLDSA_SIGNATURE_491 (0x12e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_492 (0x100312e8) +#define MLDSA_REG_MLDSA_SIGNATURE_492 (0x12e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_493 (0x100312ec) +#define MLDSA_REG_MLDSA_SIGNATURE_493 (0x12ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_494 (0x100312f0) +#define MLDSA_REG_MLDSA_SIGNATURE_494 (0x12f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_495 (0x100312f4) +#define MLDSA_REG_MLDSA_SIGNATURE_495 (0x12f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_496 (0x100312f8) +#define MLDSA_REG_MLDSA_SIGNATURE_496 (0x12f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_497 (0x100312fc) +#define MLDSA_REG_MLDSA_SIGNATURE_497 (0x12fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_498 (0x10031300) +#define MLDSA_REG_MLDSA_SIGNATURE_498 (0x1300) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_499 (0x10031304) +#define MLDSA_REG_MLDSA_SIGNATURE_499 (0x1304) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_500 (0x10031308) +#define MLDSA_REG_MLDSA_SIGNATURE_500 (0x1308) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_501 (0x1003130c) +#define MLDSA_REG_MLDSA_SIGNATURE_501 (0x130c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_502 (0x10031310) +#define MLDSA_REG_MLDSA_SIGNATURE_502 (0x1310) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_503 (0x10031314) +#define MLDSA_REG_MLDSA_SIGNATURE_503 (0x1314) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_504 (0x10031318) +#define MLDSA_REG_MLDSA_SIGNATURE_504 (0x1318) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_505 (0x1003131c) +#define MLDSA_REG_MLDSA_SIGNATURE_505 (0x131c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_506 (0x10031320) +#define MLDSA_REG_MLDSA_SIGNATURE_506 (0x1320) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_507 (0x10031324) +#define MLDSA_REG_MLDSA_SIGNATURE_507 (0x1324) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_508 (0x10031328) +#define MLDSA_REG_MLDSA_SIGNATURE_508 (0x1328) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_509 (0x1003132c) +#define MLDSA_REG_MLDSA_SIGNATURE_509 (0x132c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_510 (0x10031330) +#define MLDSA_REG_MLDSA_SIGNATURE_510 (0x1330) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_511 (0x10031334) +#define MLDSA_REG_MLDSA_SIGNATURE_511 (0x1334) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_512 (0x10031338) +#define MLDSA_REG_MLDSA_SIGNATURE_512 (0x1338) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_513 (0x1003133c) +#define MLDSA_REG_MLDSA_SIGNATURE_513 (0x133c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_514 (0x10031340) +#define MLDSA_REG_MLDSA_SIGNATURE_514 (0x1340) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_515 (0x10031344) +#define MLDSA_REG_MLDSA_SIGNATURE_515 (0x1344) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_516 (0x10031348) +#define MLDSA_REG_MLDSA_SIGNATURE_516 (0x1348) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_517 (0x1003134c) +#define MLDSA_REG_MLDSA_SIGNATURE_517 (0x134c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_518 (0x10031350) +#define MLDSA_REG_MLDSA_SIGNATURE_518 (0x1350) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_519 (0x10031354) +#define MLDSA_REG_MLDSA_SIGNATURE_519 (0x1354) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_520 (0x10031358) +#define MLDSA_REG_MLDSA_SIGNATURE_520 (0x1358) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_521 (0x1003135c) +#define MLDSA_REG_MLDSA_SIGNATURE_521 (0x135c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_522 (0x10031360) +#define MLDSA_REG_MLDSA_SIGNATURE_522 (0x1360) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_523 (0x10031364) +#define MLDSA_REG_MLDSA_SIGNATURE_523 (0x1364) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_524 (0x10031368) +#define MLDSA_REG_MLDSA_SIGNATURE_524 (0x1368) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_525 (0x1003136c) +#define MLDSA_REG_MLDSA_SIGNATURE_525 (0x136c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_526 (0x10031370) +#define MLDSA_REG_MLDSA_SIGNATURE_526 (0x1370) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_527 (0x10031374) +#define MLDSA_REG_MLDSA_SIGNATURE_527 (0x1374) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_528 (0x10031378) +#define MLDSA_REG_MLDSA_SIGNATURE_528 (0x1378) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_529 (0x1003137c) +#define MLDSA_REG_MLDSA_SIGNATURE_529 (0x137c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_530 (0x10031380) +#define MLDSA_REG_MLDSA_SIGNATURE_530 (0x1380) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_531 (0x10031384) +#define MLDSA_REG_MLDSA_SIGNATURE_531 (0x1384) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_532 (0x10031388) +#define MLDSA_REG_MLDSA_SIGNATURE_532 (0x1388) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_533 (0x1003138c) +#define MLDSA_REG_MLDSA_SIGNATURE_533 (0x138c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_534 (0x10031390) +#define MLDSA_REG_MLDSA_SIGNATURE_534 (0x1390) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_535 (0x10031394) +#define MLDSA_REG_MLDSA_SIGNATURE_535 (0x1394) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_536 (0x10031398) +#define MLDSA_REG_MLDSA_SIGNATURE_536 (0x1398) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_537 (0x1003139c) +#define MLDSA_REG_MLDSA_SIGNATURE_537 (0x139c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_538 (0x100313a0) +#define MLDSA_REG_MLDSA_SIGNATURE_538 (0x13a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_539 (0x100313a4) +#define MLDSA_REG_MLDSA_SIGNATURE_539 (0x13a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_540 (0x100313a8) +#define MLDSA_REG_MLDSA_SIGNATURE_540 (0x13a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_541 (0x100313ac) +#define MLDSA_REG_MLDSA_SIGNATURE_541 (0x13ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_542 (0x100313b0) +#define MLDSA_REG_MLDSA_SIGNATURE_542 (0x13b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_543 (0x100313b4) +#define MLDSA_REG_MLDSA_SIGNATURE_543 (0x13b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_544 (0x100313b8) +#define MLDSA_REG_MLDSA_SIGNATURE_544 (0x13b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_545 (0x100313bc) +#define MLDSA_REG_MLDSA_SIGNATURE_545 (0x13bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_546 (0x100313c0) +#define MLDSA_REG_MLDSA_SIGNATURE_546 (0x13c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_547 (0x100313c4) +#define MLDSA_REG_MLDSA_SIGNATURE_547 (0x13c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_548 (0x100313c8) +#define MLDSA_REG_MLDSA_SIGNATURE_548 (0x13c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_549 (0x100313cc) +#define MLDSA_REG_MLDSA_SIGNATURE_549 (0x13cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_550 (0x100313d0) +#define MLDSA_REG_MLDSA_SIGNATURE_550 (0x13d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_551 (0x100313d4) +#define MLDSA_REG_MLDSA_SIGNATURE_551 (0x13d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_552 (0x100313d8) +#define MLDSA_REG_MLDSA_SIGNATURE_552 (0x13d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_553 (0x100313dc) +#define MLDSA_REG_MLDSA_SIGNATURE_553 (0x13dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_554 (0x100313e0) +#define MLDSA_REG_MLDSA_SIGNATURE_554 (0x13e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_555 (0x100313e4) +#define MLDSA_REG_MLDSA_SIGNATURE_555 (0x13e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_556 (0x100313e8) +#define MLDSA_REG_MLDSA_SIGNATURE_556 (0x13e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_557 (0x100313ec) +#define MLDSA_REG_MLDSA_SIGNATURE_557 (0x13ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_558 (0x100313f0) +#define MLDSA_REG_MLDSA_SIGNATURE_558 (0x13f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_559 (0x100313f4) +#define MLDSA_REG_MLDSA_SIGNATURE_559 (0x13f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_560 (0x100313f8) +#define MLDSA_REG_MLDSA_SIGNATURE_560 (0x13f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_561 (0x100313fc) +#define MLDSA_REG_MLDSA_SIGNATURE_561 (0x13fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_562 (0x10031400) +#define MLDSA_REG_MLDSA_SIGNATURE_562 (0x1400) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_563 (0x10031404) +#define MLDSA_REG_MLDSA_SIGNATURE_563 (0x1404) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_564 (0x10031408) +#define MLDSA_REG_MLDSA_SIGNATURE_564 (0x1408) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_565 (0x1003140c) +#define MLDSA_REG_MLDSA_SIGNATURE_565 (0x140c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_566 (0x10031410) +#define MLDSA_REG_MLDSA_SIGNATURE_566 (0x1410) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_567 (0x10031414) +#define MLDSA_REG_MLDSA_SIGNATURE_567 (0x1414) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_568 (0x10031418) +#define MLDSA_REG_MLDSA_SIGNATURE_568 (0x1418) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_569 (0x1003141c) +#define MLDSA_REG_MLDSA_SIGNATURE_569 (0x141c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_570 (0x10031420) +#define MLDSA_REG_MLDSA_SIGNATURE_570 (0x1420) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_571 (0x10031424) +#define MLDSA_REG_MLDSA_SIGNATURE_571 (0x1424) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_572 (0x10031428) +#define MLDSA_REG_MLDSA_SIGNATURE_572 (0x1428) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_573 (0x1003142c) +#define MLDSA_REG_MLDSA_SIGNATURE_573 (0x142c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_574 (0x10031430) +#define MLDSA_REG_MLDSA_SIGNATURE_574 (0x1430) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_575 (0x10031434) +#define MLDSA_REG_MLDSA_SIGNATURE_575 (0x1434) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_576 (0x10031438) +#define MLDSA_REG_MLDSA_SIGNATURE_576 (0x1438) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_577 (0x1003143c) +#define MLDSA_REG_MLDSA_SIGNATURE_577 (0x143c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_578 (0x10031440) +#define MLDSA_REG_MLDSA_SIGNATURE_578 (0x1440) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_579 (0x10031444) +#define MLDSA_REG_MLDSA_SIGNATURE_579 (0x1444) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_580 (0x10031448) +#define MLDSA_REG_MLDSA_SIGNATURE_580 (0x1448) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_581 (0x1003144c) +#define MLDSA_REG_MLDSA_SIGNATURE_581 (0x144c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_582 (0x10031450) +#define MLDSA_REG_MLDSA_SIGNATURE_582 (0x1450) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_583 (0x10031454) +#define MLDSA_REG_MLDSA_SIGNATURE_583 (0x1454) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_584 (0x10031458) +#define MLDSA_REG_MLDSA_SIGNATURE_584 (0x1458) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_585 (0x1003145c) +#define MLDSA_REG_MLDSA_SIGNATURE_585 (0x145c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_586 (0x10031460) +#define MLDSA_REG_MLDSA_SIGNATURE_586 (0x1460) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_587 (0x10031464) +#define MLDSA_REG_MLDSA_SIGNATURE_587 (0x1464) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_588 (0x10031468) +#define MLDSA_REG_MLDSA_SIGNATURE_588 (0x1468) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_589 (0x1003146c) +#define MLDSA_REG_MLDSA_SIGNATURE_589 (0x146c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_590 (0x10031470) +#define MLDSA_REG_MLDSA_SIGNATURE_590 (0x1470) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_591 (0x10031474) +#define MLDSA_REG_MLDSA_SIGNATURE_591 (0x1474) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_592 (0x10031478) +#define MLDSA_REG_MLDSA_SIGNATURE_592 (0x1478) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_593 (0x1003147c) +#define MLDSA_REG_MLDSA_SIGNATURE_593 (0x147c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_594 (0x10031480) +#define MLDSA_REG_MLDSA_SIGNATURE_594 (0x1480) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_595 (0x10031484) +#define MLDSA_REG_MLDSA_SIGNATURE_595 (0x1484) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_596 (0x10031488) +#define MLDSA_REG_MLDSA_SIGNATURE_596 (0x1488) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_597 (0x1003148c) +#define MLDSA_REG_MLDSA_SIGNATURE_597 (0x148c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_598 (0x10031490) +#define MLDSA_REG_MLDSA_SIGNATURE_598 (0x1490) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_599 (0x10031494) +#define MLDSA_REG_MLDSA_SIGNATURE_599 (0x1494) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_600 (0x10031498) +#define MLDSA_REG_MLDSA_SIGNATURE_600 (0x1498) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_601 (0x1003149c) +#define MLDSA_REG_MLDSA_SIGNATURE_601 (0x149c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_602 (0x100314a0) +#define MLDSA_REG_MLDSA_SIGNATURE_602 (0x14a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_603 (0x100314a4) +#define MLDSA_REG_MLDSA_SIGNATURE_603 (0x14a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_604 (0x100314a8) +#define MLDSA_REG_MLDSA_SIGNATURE_604 (0x14a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_605 (0x100314ac) +#define MLDSA_REG_MLDSA_SIGNATURE_605 (0x14ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_606 (0x100314b0) +#define MLDSA_REG_MLDSA_SIGNATURE_606 (0x14b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_607 (0x100314b4) +#define MLDSA_REG_MLDSA_SIGNATURE_607 (0x14b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_608 (0x100314b8) +#define MLDSA_REG_MLDSA_SIGNATURE_608 (0x14b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_609 (0x100314bc) +#define MLDSA_REG_MLDSA_SIGNATURE_609 (0x14bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_610 (0x100314c0) +#define MLDSA_REG_MLDSA_SIGNATURE_610 (0x14c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_611 (0x100314c4) +#define MLDSA_REG_MLDSA_SIGNATURE_611 (0x14c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_612 (0x100314c8) +#define MLDSA_REG_MLDSA_SIGNATURE_612 (0x14c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_613 (0x100314cc) +#define MLDSA_REG_MLDSA_SIGNATURE_613 (0x14cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_614 (0x100314d0) +#define MLDSA_REG_MLDSA_SIGNATURE_614 (0x14d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_615 (0x100314d4) +#define MLDSA_REG_MLDSA_SIGNATURE_615 (0x14d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_616 (0x100314d8) +#define MLDSA_REG_MLDSA_SIGNATURE_616 (0x14d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_617 (0x100314dc) +#define MLDSA_REG_MLDSA_SIGNATURE_617 (0x14dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_618 (0x100314e0) +#define MLDSA_REG_MLDSA_SIGNATURE_618 (0x14e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_619 (0x100314e4) +#define MLDSA_REG_MLDSA_SIGNATURE_619 (0x14e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_620 (0x100314e8) +#define MLDSA_REG_MLDSA_SIGNATURE_620 (0x14e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_621 (0x100314ec) +#define MLDSA_REG_MLDSA_SIGNATURE_621 (0x14ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_622 (0x100314f0) +#define MLDSA_REG_MLDSA_SIGNATURE_622 (0x14f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_623 (0x100314f4) +#define MLDSA_REG_MLDSA_SIGNATURE_623 (0x14f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_624 (0x100314f8) +#define MLDSA_REG_MLDSA_SIGNATURE_624 (0x14f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_625 (0x100314fc) +#define MLDSA_REG_MLDSA_SIGNATURE_625 (0x14fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_626 (0x10031500) +#define MLDSA_REG_MLDSA_SIGNATURE_626 (0x1500) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_627 (0x10031504) +#define MLDSA_REG_MLDSA_SIGNATURE_627 (0x1504) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_628 (0x10031508) +#define MLDSA_REG_MLDSA_SIGNATURE_628 (0x1508) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_629 (0x1003150c) +#define MLDSA_REG_MLDSA_SIGNATURE_629 (0x150c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_630 (0x10031510) +#define MLDSA_REG_MLDSA_SIGNATURE_630 (0x1510) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_631 (0x10031514) +#define MLDSA_REG_MLDSA_SIGNATURE_631 (0x1514) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_632 (0x10031518) +#define MLDSA_REG_MLDSA_SIGNATURE_632 (0x1518) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_633 (0x1003151c) +#define MLDSA_REG_MLDSA_SIGNATURE_633 (0x151c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_634 (0x10031520) +#define MLDSA_REG_MLDSA_SIGNATURE_634 (0x1520) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_635 (0x10031524) +#define MLDSA_REG_MLDSA_SIGNATURE_635 (0x1524) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_636 (0x10031528) +#define MLDSA_REG_MLDSA_SIGNATURE_636 (0x1528) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_637 (0x1003152c) +#define MLDSA_REG_MLDSA_SIGNATURE_637 (0x152c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_638 (0x10031530) +#define MLDSA_REG_MLDSA_SIGNATURE_638 (0x1530) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_639 (0x10031534) +#define MLDSA_REG_MLDSA_SIGNATURE_639 (0x1534) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_640 (0x10031538) +#define MLDSA_REG_MLDSA_SIGNATURE_640 (0x1538) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_641 (0x1003153c) +#define MLDSA_REG_MLDSA_SIGNATURE_641 (0x153c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_642 (0x10031540) +#define MLDSA_REG_MLDSA_SIGNATURE_642 (0x1540) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_643 (0x10031544) +#define MLDSA_REG_MLDSA_SIGNATURE_643 (0x1544) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_644 (0x10031548) +#define MLDSA_REG_MLDSA_SIGNATURE_644 (0x1548) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_645 (0x1003154c) +#define MLDSA_REG_MLDSA_SIGNATURE_645 (0x154c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_646 (0x10031550) +#define MLDSA_REG_MLDSA_SIGNATURE_646 (0x1550) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_647 (0x10031554) +#define MLDSA_REG_MLDSA_SIGNATURE_647 (0x1554) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_648 (0x10031558) +#define MLDSA_REG_MLDSA_SIGNATURE_648 (0x1558) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_649 (0x1003155c) +#define MLDSA_REG_MLDSA_SIGNATURE_649 (0x155c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_650 (0x10031560) +#define MLDSA_REG_MLDSA_SIGNATURE_650 (0x1560) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_651 (0x10031564) +#define MLDSA_REG_MLDSA_SIGNATURE_651 (0x1564) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_652 (0x10031568) +#define MLDSA_REG_MLDSA_SIGNATURE_652 (0x1568) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_653 (0x1003156c) +#define MLDSA_REG_MLDSA_SIGNATURE_653 (0x156c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_654 (0x10031570) +#define MLDSA_REG_MLDSA_SIGNATURE_654 (0x1570) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_655 (0x10031574) +#define MLDSA_REG_MLDSA_SIGNATURE_655 (0x1574) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_656 (0x10031578) +#define MLDSA_REG_MLDSA_SIGNATURE_656 (0x1578) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_657 (0x1003157c) +#define MLDSA_REG_MLDSA_SIGNATURE_657 (0x157c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_658 (0x10031580) +#define MLDSA_REG_MLDSA_SIGNATURE_658 (0x1580) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_659 (0x10031584) +#define MLDSA_REG_MLDSA_SIGNATURE_659 (0x1584) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_660 (0x10031588) +#define MLDSA_REG_MLDSA_SIGNATURE_660 (0x1588) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_661 (0x1003158c) +#define MLDSA_REG_MLDSA_SIGNATURE_661 (0x158c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_662 (0x10031590) +#define MLDSA_REG_MLDSA_SIGNATURE_662 (0x1590) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_663 (0x10031594) +#define MLDSA_REG_MLDSA_SIGNATURE_663 (0x1594) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_664 (0x10031598) +#define MLDSA_REG_MLDSA_SIGNATURE_664 (0x1598) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_665 (0x1003159c) +#define MLDSA_REG_MLDSA_SIGNATURE_665 (0x159c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_666 (0x100315a0) +#define MLDSA_REG_MLDSA_SIGNATURE_666 (0x15a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_667 (0x100315a4) +#define MLDSA_REG_MLDSA_SIGNATURE_667 (0x15a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_668 (0x100315a8) +#define MLDSA_REG_MLDSA_SIGNATURE_668 (0x15a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_669 (0x100315ac) +#define MLDSA_REG_MLDSA_SIGNATURE_669 (0x15ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_670 (0x100315b0) +#define MLDSA_REG_MLDSA_SIGNATURE_670 (0x15b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_671 (0x100315b4) +#define MLDSA_REG_MLDSA_SIGNATURE_671 (0x15b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_672 (0x100315b8) +#define MLDSA_REG_MLDSA_SIGNATURE_672 (0x15b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_673 (0x100315bc) +#define MLDSA_REG_MLDSA_SIGNATURE_673 (0x15bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_674 (0x100315c0) +#define MLDSA_REG_MLDSA_SIGNATURE_674 (0x15c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_675 (0x100315c4) +#define MLDSA_REG_MLDSA_SIGNATURE_675 (0x15c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_676 (0x100315c8) +#define MLDSA_REG_MLDSA_SIGNATURE_676 (0x15c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_677 (0x100315cc) +#define MLDSA_REG_MLDSA_SIGNATURE_677 (0x15cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_678 (0x100315d0) +#define MLDSA_REG_MLDSA_SIGNATURE_678 (0x15d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_679 (0x100315d4) +#define MLDSA_REG_MLDSA_SIGNATURE_679 (0x15d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_680 (0x100315d8) +#define MLDSA_REG_MLDSA_SIGNATURE_680 (0x15d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_681 (0x100315dc) +#define MLDSA_REG_MLDSA_SIGNATURE_681 (0x15dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_682 (0x100315e0) +#define MLDSA_REG_MLDSA_SIGNATURE_682 (0x15e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_683 (0x100315e4) +#define MLDSA_REG_MLDSA_SIGNATURE_683 (0x15e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_684 (0x100315e8) +#define MLDSA_REG_MLDSA_SIGNATURE_684 (0x15e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_685 (0x100315ec) +#define MLDSA_REG_MLDSA_SIGNATURE_685 (0x15ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_686 (0x100315f0) +#define MLDSA_REG_MLDSA_SIGNATURE_686 (0x15f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_687 (0x100315f4) +#define MLDSA_REG_MLDSA_SIGNATURE_687 (0x15f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_688 (0x100315f8) +#define MLDSA_REG_MLDSA_SIGNATURE_688 (0x15f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_689 (0x100315fc) +#define MLDSA_REG_MLDSA_SIGNATURE_689 (0x15fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_690 (0x10031600) +#define MLDSA_REG_MLDSA_SIGNATURE_690 (0x1600) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_691 (0x10031604) +#define MLDSA_REG_MLDSA_SIGNATURE_691 (0x1604) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_692 (0x10031608) +#define MLDSA_REG_MLDSA_SIGNATURE_692 (0x1608) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_693 (0x1003160c) +#define MLDSA_REG_MLDSA_SIGNATURE_693 (0x160c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_694 (0x10031610) +#define MLDSA_REG_MLDSA_SIGNATURE_694 (0x1610) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_695 (0x10031614) +#define MLDSA_REG_MLDSA_SIGNATURE_695 (0x1614) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_696 (0x10031618) +#define MLDSA_REG_MLDSA_SIGNATURE_696 (0x1618) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_697 (0x1003161c) +#define MLDSA_REG_MLDSA_SIGNATURE_697 (0x161c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_698 (0x10031620) +#define MLDSA_REG_MLDSA_SIGNATURE_698 (0x1620) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_699 (0x10031624) +#define MLDSA_REG_MLDSA_SIGNATURE_699 (0x1624) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_700 (0x10031628) +#define MLDSA_REG_MLDSA_SIGNATURE_700 (0x1628) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_701 (0x1003162c) +#define MLDSA_REG_MLDSA_SIGNATURE_701 (0x162c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_702 (0x10031630) +#define MLDSA_REG_MLDSA_SIGNATURE_702 (0x1630) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_703 (0x10031634) +#define MLDSA_REG_MLDSA_SIGNATURE_703 (0x1634) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_704 (0x10031638) +#define MLDSA_REG_MLDSA_SIGNATURE_704 (0x1638) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_705 (0x1003163c) +#define MLDSA_REG_MLDSA_SIGNATURE_705 (0x163c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_706 (0x10031640) +#define MLDSA_REG_MLDSA_SIGNATURE_706 (0x1640) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_707 (0x10031644) +#define MLDSA_REG_MLDSA_SIGNATURE_707 (0x1644) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_708 (0x10031648) +#define MLDSA_REG_MLDSA_SIGNATURE_708 (0x1648) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_709 (0x1003164c) +#define MLDSA_REG_MLDSA_SIGNATURE_709 (0x164c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_710 (0x10031650) +#define MLDSA_REG_MLDSA_SIGNATURE_710 (0x1650) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_711 (0x10031654) +#define MLDSA_REG_MLDSA_SIGNATURE_711 (0x1654) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_712 (0x10031658) +#define MLDSA_REG_MLDSA_SIGNATURE_712 (0x1658) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_713 (0x1003165c) +#define MLDSA_REG_MLDSA_SIGNATURE_713 (0x165c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_714 (0x10031660) +#define MLDSA_REG_MLDSA_SIGNATURE_714 (0x1660) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_715 (0x10031664) +#define MLDSA_REG_MLDSA_SIGNATURE_715 (0x1664) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_716 (0x10031668) +#define MLDSA_REG_MLDSA_SIGNATURE_716 (0x1668) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_717 (0x1003166c) +#define MLDSA_REG_MLDSA_SIGNATURE_717 (0x166c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_718 (0x10031670) +#define MLDSA_REG_MLDSA_SIGNATURE_718 (0x1670) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_719 (0x10031674) +#define MLDSA_REG_MLDSA_SIGNATURE_719 (0x1674) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_720 (0x10031678) +#define MLDSA_REG_MLDSA_SIGNATURE_720 (0x1678) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_721 (0x1003167c) +#define MLDSA_REG_MLDSA_SIGNATURE_721 (0x167c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_722 (0x10031680) +#define MLDSA_REG_MLDSA_SIGNATURE_722 (0x1680) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_723 (0x10031684) +#define MLDSA_REG_MLDSA_SIGNATURE_723 (0x1684) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_724 (0x10031688) +#define MLDSA_REG_MLDSA_SIGNATURE_724 (0x1688) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_725 (0x1003168c) +#define MLDSA_REG_MLDSA_SIGNATURE_725 (0x168c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_726 (0x10031690) +#define MLDSA_REG_MLDSA_SIGNATURE_726 (0x1690) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_727 (0x10031694) +#define MLDSA_REG_MLDSA_SIGNATURE_727 (0x1694) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_728 (0x10031698) +#define MLDSA_REG_MLDSA_SIGNATURE_728 (0x1698) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_729 (0x1003169c) +#define MLDSA_REG_MLDSA_SIGNATURE_729 (0x169c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_730 (0x100316a0) +#define MLDSA_REG_MLDSA_SIGNATURE_730 (0x16a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_731 (0x100316a4) +#define MLDSA_REG_MLDSA_SIGNATURE_731 (0x16a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_732 (0x100316a8) +#define MLDSA_REG_MLDSA_SIGNATURE_732 (0x16a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_733 (0x100316ac) +#define MLDSA_REG_MLDSA_SIGNATURE_733 (0x16ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_734 (0x100316b0) +#define MLDSA_REG_MLDSA_SIGNATURE_734 (0x16b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_735 (0x100316b4) +#define MLDSA_REG_MLDSA_SIGNATURE_735 (0x16b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_736 (0x100316b8) +#define MLDSA_REG_MLDSA_SIGNATURE_736 (0x16b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_737 (0x100316bc) +#define MLDSA_REG_MLDSA_SIGNATURE_737 (0x16bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_738 (0x100316c0) +#define MLDSA_REG_MLDSA_SIGNATURE_738 (0x16c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_739 (0x100316c4) +#define MLDSA_REG_MLDSA_SIGNATURE_739 (0x16c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_740 (0x100316c8) +#define MLDSA_REG_MLDSA_SIGNATURE_740 (0x16c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_741 (0x100316cc) +#define MLDSA_REG_MLDSA_SIGNATURE_741 (0x16cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_742 (0x100316d0) +#define MLDSA_REG_MLDSA_SIGNATURE_742 (0x16d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_743 (0x100316d4) +#define MLDSA_REG_MLDSA_SIGNATURE_743 (0x16d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_744 (0x100316d8) +#define MLDSA_REG_MLDSA_SIGNATURE_744 (0x16d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_745 (0x100316dc) +#define MLDSA_REG_MLDSA_SIGNATURE_745 (0x16dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_746 (0x100316e0) +#define MLDSA_REG_MLDSA_SIGNATURE_746 (0x16e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_747 (0x100316e4) +#define MLDSA_REG_MLDSA_SIGNATURE_747 (0x16e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_748 (0x100316e8) +#define MLDSA_REG_MLDSA_SIGNATURE_748 (0x16e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_749 (0x100316ec) +#define MLDSA_REG_MLDSA_SIGNATURE_749 (0x16ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_750 (0x100316f0) +#define MLDSA_REG_MLDSA_SIGNATURE_750 (0x16f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_751 (0x100316f4) +#define MLDSA_REG_MLDSA_SIGNATURE_751 (0x16f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_752 (0x100316f8) +#define MLDSA_REG_MLDSA_SIGNATURE_752 (0x16f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_753 (0x100316fc) +#define MLDSA_REG_MLDSA_SIGNATURE_753 (0x16fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_754 (0x10031700) +#define MLDSA_REG_MLDSA_SIGNATURE_754 (0x1700) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_755 (0x10031704) +#define MLDSA_REG_MLDSA_SIGNATURE_755 (0x1704) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_756 (0x10031708) +#define MLDSA_REG_MLDSA_SIGNATURE_756 (0x1708) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_757 (0x1003170c) +#define MLDSA_REG_MLDSA_SIGNATURE_757 (0x170c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_758 (0x10031710) +#define MLDSA_REG_MLDSA_SIGNATURE_758 (0x1710) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_759 (0x10031714) +#define MLDSA_REG_MLDSA_SIGNATURE_759 (0x1714) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_760 (0x10031718) +#define MLDSA_REG_MLDSA_SIGNATURE_760 (0x1718) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_761 (0x1003171c) +#define MLDSA_REG_MLDSA_SIGNATURE_761 (0x171c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_762 (0x10031720) +#define MLDSA_REG_MLDSA_SIGNATURE_762 (0x1720) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_763 (0x10031724) +#define MLDSA_REG_MLDSA_SIGNATURE_763 (0x1724) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_764 (0x10031728) +#define MLDSA_REG_MLDSA_SIGNATURE_764 (0x1728) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_765 (0x1003172c) +#define MLDSA_REG_MLDSA_SIGNATURE_765 (0x172c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_766 (0x10031730) +#define MLDSA_REG_MLDSA_SIGNATURE_766 (0x1730) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_767 (0x10031734) +#define MLDSA_REG_MLDSA_SIGNATURE_767 (0x1734) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_768 (0x10031738) +#define MLDSA_REG_MLDSA_SIGNATURE_768 (0x1738) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_769 (0x1003173c) +#define MLDSA_REG_MLDSA_SIGNATURE_769 (0x173c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_770 (0x10031740) +#define MLDSA_REG_MLDSA_SIGNATURE_770 (0x1740) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_771 (0x10031744) +#define MLDSA_REG_MLDSA_SIGNATURE_771 (0x1744) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_772 (0x10031748) +#define MLDSA_REG_MLDSA_SIGNATURE_772 (0x1748) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_773 (0x1003174c) +#define MLDSA_REG_MLDSA_SIGNATURE_773 (0x174c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_774 (0x10031750) +#define MLDSA_REG_MLDSA_SIGNATURE_774 (0x1750) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_775 (0x10031754) +#define MLDSA_REG_MLDSA_SIGNATURE_775 (0x1754) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_776 (0x10031758) +#define MLDSA_REG_MLDSA_SIGNATURE_776 (0x1758) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_777 (0x1003175c) +#define MLDSA_REG_MLDSA_SIGNATURE_777 (0x175c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_778 (0x10031760) +#define MLDSA_REG_MLDSA_SIGNATURE_778 (0x1760) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_779 (0x10031764) +#define MLDSA_REG_MLDSA_SIGNATURE_779 (0x1764) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_780 (0x10031768) +#define MLDSA_REG_MLDSA_SIGNATURE_780 (0x1768) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_781 (0x1003176c) +#define MLDSA_REG_MLDSA_SIGNATURE_781 (0x176c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_782 (0x10031770) +#define MLDSA_REG_MLDSA_SIGNATURE_782 (0x1770) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_783 (0x10031774) +#define MLDSA_REG_MLDSA_SIGNATURE_783 (0x1774) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_784 (0x10031778) +#define MLDSA_REG_MLDSA_SIGNATURE_784 (0x1778) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_785 (0x1003177c) +#define MLDSA_REG_MLDSA_SIGNATURE_785 (0x177c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_786 (0x10031780) +#define MLDSA_REG_MLDSA_SIGNATURE_786 (0x1780) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_787 (0x10031784) +#define MLDSA_REG_MLDSA_SIGNATURE_787 (0x1784) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_788 (0x10031788) +#define MLDSA_REG_MLDSA_SIGNATURE_788 (0x1788) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_789 (0x1003178c) +#define MLDSA_REG_MLDSA_SIGNATURE_789 (0x178c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_790 (0x10031790) +#define MLDSA_REG_MLDSA_SIGNATURE_790 (0x1790) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_791 (0x10031794) +#define MLDSA_REG_MLDSA_SIGNATURE_791 (0x1794) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_792 (0x10031798) +#define MLDSA_REG_MLDSA_SIGNATURE_792 (0x1798) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_793 (0x1003179c) +#define MLDSA_REG_MLDSA_SIGNATURE_793 (0x179c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_794 (0x100317a0) +#define MLDSA_REG_MLDSA_SIGNATURE_794 (0x17a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_795 (0x100317a4) +#define MLDSA_REG_MLDSA_SIGNATURE_795 (0x17a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_796 (0x100317a8) +#define MLDSA_REG_MLDSA_SIGNATURE_796 (0x17a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_797 (0x100317ac) +#define MLDSA_REG_MLDSA_SIGNATURE_797 (0x17ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_798 (0x100317b0) +#define MLDSA_REG_MLDSA_SIGNATURE_798 (0x17b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_799 (0x100317b4) +#define MLDSA_REG_MLDSA_SIGNATURE_799 (0x17b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_800 (0x100317b8) +#define MLDSA_REG_MLDSA_SIGNATURE_800 (0x17b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_801 (0x100317bc) +#define MLDSA_REG_MLDSA_SIGNATURE_801 (0x17bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_802 (0x100317c0) +#define MLDSA_REG_MLDSA_SIGNATURE_802 (0x17c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_803 (0x100317c4) +#define MLDSA_REG_MLDSA_SIGNATURE_803 (0x17c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_804 (0x100317c8) +#define MLDSA_REG_MLDSA_SIGNATURE_804 (0x17c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_805 (0x100317cc) +#define MLDSA_REG_MLDSA_SIGNATURE_805 (0x17cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_806 (0x100317d0) +#define MLDSA_REG_MLDSA_SIGNATURE_806 (0x17d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_807 (0x100317d4) +#define MLDSA_REG_MLDSA_SIGNATURE_807 (0x17d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_808 (0x100317d8) +#define MLDSA_REG_MLDSA_SIGNATURE_808 (0x17d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_809 (0x100317dc) +#define MLDSA_REG_MLDSA_SIGNATURE_809 (0x17dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_810 (0x100317e0) +#define MLDSA_REG_MLDSA_SIGNATURE_810 (0x17e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_811 (0x100317e4) +#define MLDSA_REG_MLDSA_SIGNATURE_811 (0x17e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_812 (0x100317e8) +#define MLDSA_REG_MLDSA_SIGNATURE_812 (0x17e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_813 (0x100317ec) +#define MLDSA_REG_MLDSA_SIGNATURE_813 (0x17ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_814 (0x100317f0) +#define MLDSA_REG_MLDSA_SIGNATURE_814 (0x17f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_815 (0x100317f4) +#define MLDSA_REG_MLDSA_SIGNATURE_815 (0x17f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_816 (0x100317f8) +#define MLDSA_REG_MLDSA_SIGNATURE_816 (0x17f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_817 (0x100317fc) +#define MLDSA_REG_MLDSA_SIGNATURE_817 (0x17fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_818 (0x10031800) +#define MLDSA_REG_MLDSA_SIGNATURE_818 (0x1800) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_819 (0x10031804) +#define MLDSA_REG_MLDSA_SIGNATURE_819 (0x1804) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_820 (0x10031808) +#define MLDSA_REG_MLDSA_SIGNATURE_820 (0x1808) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_821 (0x1003180c) +#define MLDSA_REG_MLDSA_SIGNATURE_821 (0x180c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_822 (0x10031810) +#define MLDSA_REG_MLDSA_SIGNATURE_822 (0x1810) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_823 (0x10031814) +#define MLDSA_REG_MLDSA_SIGNATURE_823 (0x1814) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_824 (0x10031818) +#define MLDSA_REG_MLDSA_SIGNATURE_824 (0x1818) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_825 (0x1003181c) +#define MLDSA_REG_MLDSA_SIGNATURE_825 (0x181c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_826 (0x10031820) +#define MLDSA_REG_MLDSA_SIGNATURE_826 (0x1820) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_827 (0x10031824) +#define MLDSA_REG_MLDSA_SIGNATURE_827 (0x1824) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_828 (0x10031828) +#define MLDSA_REG_MLDSA_SIGNATURE_828 (0x1828) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_829 (0x1003182c) +#define MLDSA_REG_MLDSA_SIGNATURE_829 (0x182c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_830 (0x10031830) +#define MLDSA_REG_MLDSA_SIGNATURE_830 (0x1830) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_831 (0x10031834) +#define MLDSA_REG_MLDSA_SIGNATURE_831 (0x1834) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_832 (0x10031838) +#define MLDSA_REG_MLDSA_SIGNATURE_832 (0x1838) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_833 (0x1003183c) +#define MLDSA_REG_MLDSA_SIGNATURE_833 (0x183c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_834 (0x10031840) +#define MLDSA_REG_MLDSA_SIGNATURE_834 (0x1840) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_835 (0x10031844) +#define MLDSA_REG_MLDSA_SIGNATURE_835 (0x1844) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_836 (0x10031848) +#define MLDSA_REG_MLDSA_SIGNATURE_836 (0x1848) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_837 (0x1003184c) +#define MLDSA_REG_MLDSA_SIGNATURE_837 (0x184c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_838 (0x10031850) +#define MLDSA_REG_MLDSA_SIGNATURE_838 (0x1850) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_839 (0x10031854) +#define MLDSA_REG_MLDSA_SIGNATURE_839 (0x1854) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_840 (0x10031858) +#define MLDSA_REG_MLDSA_SIGNATURE_840 (0x1858) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_841 (0x1003185c) +#define MLDSA_REG_MLDSA_SIGNATURE_841 (0x185c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_842 (0x10031860) +#define MLDSA_REG_MLDSA_SIGNATURE_842 (0x1860) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_843 (0x10031864) +#define MLDSA_REG_MLDSA_SIGNATURE_843 (0x1864) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_844 (0x10031868) +#define MLDSA_REG_MLDSA_SIGNATURE_844 (0x1868) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_845 (0x1003186c) +#define MLDSA_REG_MLDSA_SIGNATURE_845 (0x186c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_846 (0x10031870) +#define MLDSA_REG_MLDSA_SIGNATURE_846 (0x1870) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_847 (0x10031874) +#define MLDSA_REG_MLDSA_SIGNATURE_847 (0x1874) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_848 (0x10031878) +#define MLDSA_REG_MLDSA_SIGNATURE_848 (0x1878) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_849 (0x1003187c) +#define MLDSA_REG_MLDSA_SIGNATURE_849 (0x187c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_850 (0x10031880) +#define MLDSA_REG_MLDSA_SIGNATURE_850 (0x1880) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_851 (0x10031884) +#define MLDSA_REG_MLDSA_SIGNATURE_851 (0x1884) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_852 (0x10031888) +#define MLDSA_REG_MLDSA_SIGNATURE_852 (0x1888) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_853 (0x1003188c) +#define MLDSA_REG_MLDSA_SIGNATURE_853 (0x188c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_854 (0x10031890) +#define MLDSA_REG_MLDSA_SIGNATURE_854 (0x1890) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_855 (0x10031894) +#define MLDSA_REG_MLDSA_SIGNATURE_855 (0x1894) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_856 (0x10031898) +#define MLDSA_REG_MLDSA_SIGNATURE_856 (0x1898) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_857 (0x1003189c) +#define MLDSA_REG_MLDSA_SIGNATURE_857 (0x189c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_858 (0x100318a0) +#define MLDSA_REG_MLDSA_SIGNATURE_858 (0x18a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_859 (0x100318a4) +#define MLDSA_REG_MLDSA_SIGNATURE_859 (0x18a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_860 (0x100318a8) +#define MLDSA_REG_MLDSA_SIGNATURE_860 (0x18a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_861 (0x100318ac) +#define MLDSA_REG_MLDSA_SIGNATURE_861 (0x18ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_862 (0x100318b0) +#define MLDSA_REG_MLDSA_SIGNATURE_862 (0x18b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_863 (0x100318b4) +#define MLDSA_REG_MLDSA_SIGNATURE_863 (0x18b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_864 (0x100318b8) +#define MLDSA_REG_MLDSA_SIGNATURE_864 (0x18b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_865 (0x100318bc) +#define MLDSA_REG_MLDSA_SIGNATURE_865 (0x18bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_866 (0x100318c0) +#define MLDSA_REG_MLDSA_SIGNATURE_866 (0x18c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_867 (0x100318c4) +#define MLDSA_REG_MLDSA_SIGNATURE_867 (0x18c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_868 (0x100318c8) +#define MLDSA_REG_MLDSA_SIGNATURE_868 (0x18c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_869 (0x100318cc) +#define MLDSA_REG_MLDSA_SIGNATURE_869 (0x18cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_870 (0x100318d0) +#define MLDSA_REG_MLDSA_SIGNATURE_870 (0x18d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_871 (0x100318d4) +#define MLDSA_REG_MLDSA_SIGNATURE_871 (0x18d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_872 (0x100318d8) +#define MLDSA_REG_MLDSA_SIGNATURE_872 (0x18d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_873 (0x100318dc) +#define MLDSA_REG_MLDSA_SIGNATURE_873 (0x18dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_874 (0x100318e0) +#define MLDSA_REG_MLDSA_SIGNATURE_874 (0x18e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_875 (0x100318e4) +#define MLDSA_REG_MLDSA_SIGNATURE_875 (0x18e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_876 (0x100318e8) +#define MLDSA_REG_MLDSA_SIGNATURE_876 (0x18e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_877 (0x100318ec) +#define MLDSA_REG_MLDSA_SIGNATURE_877 (0x18ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_878 (0x100318f0) +#define MLDSA_REG_MLDSA_SIGNATURE_878 (0x18f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_879 (0x100318f4) +#define MLDSA_REG_MLDSA_SIGNATURE_879 (0x18f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_880 (0x100318f8) +#define MLDSA_REG_MLDSA_SIGNATURE_880 (0x18f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_881 (0x100318fc) +#define MLDSA_REG_MLDSA_SIGNATURE_881 (0x18fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_882 (0x10031900) +#define MLDSA_REG_MLDSA_SIGNATURE_882 (0x1900) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_883 (0x10031904) +#define MLDSA_REG_MLDSA_SIGNATURE_883 (0x1904) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_884 (0x10031908) +#define MLDSA_REG_MLDSA_SIGNATURE_884 (0x1908) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_885 (0x1003190c) +#define MLDSA_REG_MLDSA_SIGNATURE_885 (0x190c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_886 (0x10031910) +#define MLDSA_REG_MLDSA_SIGNATURE_886 (0x1910) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_887 (0x10031914) +#define MLDSA_REG_MLDSA_SIGNATURE_887 (0x1914) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_888 (0x10031918) +#define MLDSA_REG_MLDSA_SIGNATURE_888 (0x1918) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_889 (0x1003191c) +#define MLDSA_REG_MLDSA_SIGNATURE_889 (0x191c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_890 (0x10031920) +#define MLDSA_REG_MLDSA_SIGNATURE_890 (0x1920) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_891 (0x10031924) +#define MLDSA_REG_MLDSA_SIGNATURE_891 (0x1924) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_892 (0x10031928) +#define MLDSA_REG_MLDSA_SIGNATURE_892 (0x1928) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_893 (0x1003192c) +#define MLDSA_REG_MLDSA_SIGNATURE_893 (0x192c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_894 (0x10031930) +#define MLDSA_REG_MLDSA_SIGNATURE_894 (0x1930) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_895 (0x10031934) +#define MLDSA_REG_MLDSA_SIGNATURE_895 (0x1934) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_896 (0x10031938) +#define MLDSA_REG_MLDSA_SIGNATURE_896 (0x1938) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_897 (0x1003193c) +#define MLDSA_REG_MLDSA_SIGNATURE_897 (0x193c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_898 (0x10031940) +#define MLDSA_REG_MLDSA_SIGNATURE_898 (0x1940) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_899 (0x10031944) +#define MLDSA_REG_MLDSA_SIGNATURE_899 (0x1944) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_900 (0x10031948) +#define MLDSA_REG_MLDSA_SIGNATURE_900 (0x1948) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_901 (0x1003194c) +#define MLDSA_REG_MLDSA_SIGNATURE_901 (0x194c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_902 (0x10031950) +#define MLDSA_REG_MLDSA_SIGNATURE_902 (0x1950) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_903 (0x10031954) +#define MLDSA_REG_MLDSA_SIGNATURE_903 (0x1954) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_904 (0x10031958) +#define MLDSA_REG_MLDSA_SIGNATURE_904 (0x1958) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_905 (0x1003195c) +#define MLDSA_REG_MLDSA_SIGNATURE_905 (0x195c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_906 (0x10031960) +#define MLDSA_REG_MLDSA_SIGNATURE_906 (0x1960) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_907 (0x10031964) +#define MLDSA_REG_MLDSA_SIGNATURE_907 (0x1964) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_908 (0x10031968) +#define MLDSA_REG_MLDSA_SIGNATURE_908 (0x1968) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_909 (0x1003196c) +#define MLDSA_REG_MLDSA_SIGNATURE_909 (0x196c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_910 (0x10031970) +#define MLDSA_REG_MLDSA_SIGNATURE_910 (0x1970) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_911 (0x10031974) +#define MLDSA_REG_MLDSA_SIGNATURE_911 (0x1974) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_912 (0x10031978) +#define MLDSA_REG_MLDSA_SIGNATURE_912 (0x1978) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_913 (0x1003197c) +#define MLDSA_REG_MLDSA_SIGNATURE_913 (0x197c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_914 (0x10031980) +#define MLDSA_REG_MLDSA_SIGNATURE_914 (0x1980) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_915 (0x10031984) +#define MLDSA_REG_MLDSA_SIGNATURE_915 (0x1984) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_916 (0x10031988) +#define MLDSA_REG_MLDSA_SIGNATURE_916 (0x1988) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_917 (0x1003198c) +#define MLDSA_REG_MLDSA_SIGNATURE_917 (0x198c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_918 (0x10031990) +#define MLDSA_REG_MLDSA_SIGNATURE_918 (0x1990) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_919 (0x10031994) +#define MLDSA_REG_MLDSA_SIGNATURE_919 (0x1994) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_920 (0x10031998) +#define MLDSA_REG_MLDSA_SIGNATURE_920 (0x1998) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_921 (0x1003199c) +#define MLDSA_REG_MLDSA_SIGNATURE_921 (0x199c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_922 (0x100319a0) +#define MLDSA_REG_MLDSA_SIGNATURE_922 (0x19a0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_923 (0x100319a4) +#define MLDSA_REG_MLDSA_SIGNATURE_923 (0x19a4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_924 (0x100319a8) +#define MLDSA_REG_MLDSA_SIGNATURE_924 (0x19a8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_925 (0x100319ac) +#define MLDSA_REG_MLDSA_SIGNATURE_925 (0x19ac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_926 (0x100319b0) +#define MLDSA_REG_MLDSA_SIGNATURE_926 (0x19b0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_927 (0x100319b4) +#define MLDSA_REG_MLDSA_SIGNATURE_927 (0x19b4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_928 (0x100319b8) +#define MLDSA_REG_MLDSA_SIGNATURE_928 (0x19b8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_929 (0x100319bc) +#define MLDSA_REG_MLDSA_SIGNATURE_929 (0x19bc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_930 (0x100319c0) +#define MLDSA_REG_MLDSA_SIGNATURE_930 (0x19c0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_931 (0x100319c4) +#define MLDSA_REG_MLDSA_SIGNATURE_931 (0x19c4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_932 (0x100319c8) +#define MLDSA_REG_MLDSA_SIGNATURE_932 (0x19c8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_933 (0x100319cc) +#define MLDSA_REG_MLDSA_SIGNATURE_933 (0x19cc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_934 (0x100319d0) +#define MLDSA_REG_MLDSA_SIGNATURE_934 (0x19d0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_935 (0x100319d4) +#define MLDSA_REG_MLDSA_SIGNATURE_935 (0x19d4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_936 (0x100319d8) +#define MLDSA_REG_MLDSA_SIGNATURE_936 (0x19d8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_937 (0x100319dc) +#define MLDSA_REG_MLDSA_SIGNATURE_937 (0x19dc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_938 (0x100319e0) +#define MLDSA_REG_MLDSA_SIGNATURE_938 (0x19e0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_939 (0x100319e4) +#define MLDSA_REG_MLDSA_SIGNATURE_939 (0x19e4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_940 (0x100319e8) +#define MLDSA_REG_MLDSA_SIGNATURE_940 (0x19e8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_941 (0x100319ec) +#define MLDSA_REG_MLDSA_SIGNATURE_941 (0x19ec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_942 (0x100319f0) +#define MLDSA_REG_MLDSA_SIGNATURE_942 (0x19f0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_943 (0x100319f4) +#define MLDSA_REG_MLDSA_SIGNATURE_943 (0x19f4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_944 (0x100319f8) +#define MLDSA_REG_MLDSA_SIGNATURE_944 (0x19f8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_945 (0x100319fc) +#define MLDSA_REG_MLDSA_SIGNATURE_945 (0x19fc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_946 (0x10031a00) +#define MLDSA_REG_MLDSA_SIGNATURE_946 (0x1a00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_947 (0x10031a04) +#define MLDSA_REG_MLDSA_SIGNATURE_947 (0x1a04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_948 (0x10031a08) +#define MLDSA_REG_MLDSA_SIGNATURE_948 (0x1a08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_949 (0x10031a0c) +#define MLDSA_REG_MLDSA_SIGNATURE_949 (0x1a0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_950 (0x10031a10) +#define MLDSA_REG_MLDSA_SIGNATURE_950 (0x1a10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_951 (0x10031a14) +#define MLDSA_REG_MLDSA_SIGNATURE_951 (0x1a14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_952 (0x10031a18) +#define MLDSA_REG_MLDSA_SIGNATURE_952 (0x1a18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_953 (0x10031a1c) +#define MLDSA_REG_MLDSA_SIGNATURE_953 (0x1a1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_954 (0x10031a20) +#define MLDSA_REG_MLDSA_SIGNATURE_954 (0x1a20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_955 (0x10031a24) +#define MLDSA_REG_MLDSA_SIGNATURE_955 (0x1a24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_956 (0x10031a28) +#define MLDSA_REG_MLDSA_SIGNATURE_956 (0x1a28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_957 (0x10031a2c) +#define MLDSA_REG_MLDSA_SIGNATURE_957 (0x1a2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_958 (0x10031a30) +#define MLDSA_REG_MLDSA_SIGNATURE_958 (0x1a30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_959 (0x10031a34) +#define MLDSA_REG_MLDSA_SIGNATURE_959 (0x1a34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_960 (0x10031a38) +#define MLDSA_REG_MLDSA_SIGNATURE_960 (0x1a38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_961 (0x10031a3c) +#define MLDSA_REG_MLDSA_SIGNATURE_961 (0x1a3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_962 (0x10031a40) +#define MLDSA_REG_MLDSA_SIGNATURE_962 (0x1a40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_963 (0x10031a44) +#define MLDSA_REG_MLDSA_SIGNATURE_963 (0x1a44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_964 (0x10031a48) +#define MLDSA_REG_MLDSA_SIGNATURE_964 (0x1a48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_965 (0x10031a4c) +#define MLDSA_REG_MLDSA_SIGNATURE_965 (0x1a4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_966 (0x10031a50) +#define MLDSA_REG_MLDSA_SIGNATURE_966 (0x1a50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_967 (0x10031a54) +#define MLDSA_REG_MLDSA_SIGNATURE_967 (0x1a54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_968 (0x10031a58) +#define MLDSA_REG_MLDSA_SIGNATURE_968 (0x1a58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_969 (0x10031a5c) +#define MLDSA_REG_MLDSA_SIGNATURE_969 (0x1a5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_970 (0x10031a60) +#define MLDSA_REG_MLDSA_SIGNATURE_970 (0x1a60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_971 (0x10031a64) +#define MLDSA_REG_MLDSA_SIGNATURE_971 (0x1a64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_972 (0x10031a68) +#define MLDSA_REG_MLDSA_SIGNATURE_972 (0x1a68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_973 (0x10031a6c) +#define MLDSA_REG_MLDSA_SIGNATURE_973 (0x1a6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_974 (0x10031a70) +#define MLDSA_REG_MLDSA_SIGNATURE_974 (0x1a70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_975 (0x10031a74) +#define MLDSA_REG_MLDSA_SIGNATURE_975 (0x1a74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_976 (0x10031a78) +#define MLDSA_REG_MLDSA_SIGNATURE_976 (0x1a78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_977 (0x10031a7c) +#define MLDSA_REG_MLDSA_SIGNATURE_977 (0x1a7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_978 (0x10031a80) +#define MLDSA_REG_MLDSA_SIGNATURE_978 (0x1a80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_979 (0x10031a84) +#define MLDSA_REG_MLDSA_SIGNATURE_979 (0x1a84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_980 (0x10031a88) +#define MLDSA_REG_MLDSA_SIGNATURE_980 (0x1a88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_981 (0x10031a8c) +#define MLDSA_REG_MLDSA_SIGNATURE_981 (0x1a8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_982 (0x10031a90) +#define MLDSA_REG_MLDSA_SIGNATURE_982 (0x1a90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_983 (0x10031a94) +#define MLDSA_REG_MLDSA_SIGNATURE_983 (0x1a94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_984 (0x10031a98) +#define MLDSA_REG_MLDSA_SIGNATURE_984 (0x1a98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_985 (0x10031a9c) +#define MLDSA_REG_MLDSA_SIGNATURE_985 (0x1a9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_986 (0x10031aa0) +#define MLDSA_REG_MLDSA_SIGNATURE_986 (0x1aa0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_987 (0x10031aa4) +#define MLDSA_REG_MLDSA_SIGNATURE_987 (0x1aa4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_988 (0x10031aa8) +#define MLDSA_REG_MLDSA_SIGNATURE_988 (0x1aa8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_989 (0x10031aac) +#define MLDSA_REG_MLDSA_SIGNATURE_989 (0x1aac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_990 (0x10031ab0) +#define MLDSA_REG_MLDSA_SIGNATURE_990 (0x1ab0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_991 (0x10031ab4) +#define MLDSA_REG_MLDSA_SIGNATURE_991 (0x1ab4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_992 (0x10031ab8) +#define MLDSA_REG_MLDSA_SIGNATURE_992 (0x1ab8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_993 (0x10031abc) +#define MLDSA_REG_MLDSA_SIGNATURE_993 (0x1abc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_994 (0x10031ac0) +#define MLDSA_REG_MLDSA_SIGNATURE_994 (0x1ac0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_995 (0x10031ac4) +#define MLDSA_REG_MLDSA_SIGNATURE_995 (0x1ac4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_996 (0x10031ac8) +#define MLDSA_REG_MLDSA_SIGNATURE_996 (0x1ac8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_997 (0x10031acc) +#define MLDSA_REG_MLDSA_SIGNATURE_997 (0x1acc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_998 (0x10031ad0) +#define MLDSA_REG_MLDSA_SIGNATURE_998 (0x1ad0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_999 (0x10031ad4) +#define MLDSA_REG_MLDSA_SIGNATURE_999 (0x1ad4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1000 (0x10031ad8) +#define MLDSA_REG_MLDSA_SIGNATURE_1000 (0x1ad8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1001 (0x10031adc) +#define MLDSA_REG_MLDSA_SIGNATURE_1001 (0x1adc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1002 (0x10031ae0) +#define MLDSA_REG_MLDSA_SIGNATURE_1002 (0x1ae0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1003 (0x10031ae4) +#define MLDSA_REG_MLDSA_SIGNATURE_1003 (0x1ae4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1004 (0x10031ae8) +#define MLDSA_REG_MLDSA_SIGNATURE_1004 (0x1ae8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1005 (0x10031aec) +#define MLDSA_REG_MLDSA_SIGNATURE_1005 (0x1aec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1006 (0x10031af0) +#define MLDSA_REG_MLDSA_SIGNATURE_1006 (0x1af0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1007 (0x10031af4) +#define MLDSA_REG_MLDSA_SIGNATURE_1007 (0x1af4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1008 (0x10031af8) +#define MLDSA_REG_MLDSA_SIGNATURE_1008 (0x1af8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1009 (0x10031afc) +#define MLDSA_REG_MLDSA_SIGNATURE_1009 (0x1afc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1010 (0x10031b00) +#define MLDSA_REG_MLDSA_SIGNATURE_1010 (0x1b00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1011 (0x10031b04) +#define MLDSA_REG_MLDSA_SIGNATURE_1011 (0x1b04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1012 (0x10031b08) +#define MLDSA_REG_MLDSA_SIGNATURE_1012 (0x1b08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1013 (0x10031b0c) +#define MLDSA_REG_MLDSA_SIGNATURE_1013 (0x1b0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1014 (0x10031b10) +#define MLDSA_REG_MLDSA_SIGNATURE_1014 (0x1b10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1015 (0x10031b14) +#define MLDSA_REG_MLDSA_SIGNATURE_1015 (0x1b14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1016 (0x10031b18) +#define MLDSA_REG_MLDSA_SIGNATURE_1016 (0x1b18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1017 (0x10031b1c) +#define MLDSA_REG_MLDSA_SIGNATURE_1017 (0x1b1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1018 (0x10031b20) +#define MLDSA_REG_MLDSA_SIGNATURE_1018 (0x1b20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1019 (0x10031b24) +#define MLDSA_REG_MLDSA_SIGNATURE_1019 (0x1b24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1020 (0x10031b28) +#define MLDSA_REG_MLDSA_SIGNATURE_1020 (0x1b28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1021 (0x10031b2c) +#define MLDSA_REG_MLDSA_SIGNATURE_1021 (0x1b2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1022 (0x10031b30) +#define MLDSA_REG_MLDSA_SIGNATURE_1022 (0x1b30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1023 (0x10031b34) +#define MLDSA_REG_MLDSA_SIGNATURE_1023 (0x1b34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1024 (0x10031b38) +#define MLDSA_REG_MLDSA_SIGNATURE_1024 (0x1b38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1025 (0x10031b3c) +#define MLDSA_REG_MLDSA_SIGNATURE_1025 (0x1b3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1026 (0x10031b40) +#define MLDSA_REG_MLDSA_SIGNATURE_1026 (0x1b40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1027 (0x10031b44) +#define MLDSA_REG_MLDSA_SIGNATURE_1027 (0x1b44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1028 (0x10031b48) +#define MLDSA_REG_MLDSA_SIGNATURE_1028 (0x1b48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1029 (0x10031b4c) +#define MLDSA_REG_MLDSA_SIGNATURE_1029 (0x1b4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1030 (0x10031b50) +#define MLDSA_REG_MLDSA_SIGNATURE_1030 (0x1b50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1031 (0x10031b54) +#define MLDSA_REG_MLDSA_SIGNATURE_1031 (0x1b54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1032 (0x10031b58) +#define MLDSA_REG_MLDSA_SIGNATURE_1032 (0x1b58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1033 (0x10031b5c) +#define MLDSA_REG_MLDSA_SIGNATURE_1033 (0x1b5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1034 (0x10031b60) +#define MLDSA_REG_MLDSA_SIGNATURE_1034 (0x1b60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1035 (0x10031b64) +#define MLDSA_REG_MLDSA_SIGNATURE_1035 (0x1b64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1036 (0x10031b68) +#define MLDSA_REG_MLDSA_SIGNATURE_1036 (0x1b68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1037 (0x10031b6c) +#define MLDSA_REG_MLDSA_SIGNATURE_1037 (0x1b6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1038 (0x10031b70) +#define MLDSA_REG_MLDSA_SIGNATURE_1038 (0x1b70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1039 (0x10031b74) +#define MLDSA_REG_MLDSA_SIGNATURE_1039 (0x1b74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1040 (0x10031b78) +#define MLDSA_REG_MLDSA_SIGNATURE_1040 (0x1b78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1041 (0x10031b7c) +#define MLDSA_REG_MLDSA_SIGNATURE_1041 (0x1b7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1042 (0x10031b80) +#define MLDSA_REG_MLDSA_SIGNATURE_1042 (0x1b80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1043 (0x10031b84) +#define MLDSA_REG_MLDSA_SIGNATURE_1043 (0x1b84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1044 (0x10031b88) +#define MLDSA_REG_MLDSA_SIGNATURE_1044 (0x1b88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1045 (0x10031b8c) +#define MLDSA_REG_MLDSA_SIGNATURE_1045 (0x1b8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1046 (0x10031b90) +#define MLDSA_REG_MLDSA_SIGNATURE_1046 (0x1b90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1047 (0x10031b94) +#define MLDSA_REG_MLDSA_SIGNATURE_1047 (0x1b94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1048 (0x10031b98) +#define MLDSA_REG_MLDSA_SIGNATURE_1048 (0x1b98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1049 (0x10031b9c) +#define MLDSA_REG_MLDSA_SIGNATURE_1049 (0x1b9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1050 (0x10031ba0) +#define MLDSA_REG_MLDSA_SIGNATURE_1050 (0x1ba0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1051 (0x10031ba4) +#define MLDSA_REG_MLDSA_SIGNATURE_1051 (0x1ba4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1052 (0x10031ba8) +#define MLDSA_REG_MLDSA_SIGNATURE_1052 (0x1ba8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1053 (0x10031bac) +#define MLDSA_REG_MLDSA_SIGNATURE_1053 (0x1bac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1054 (0x10031bb0) +#define MLDSA_REG_MLDSA_SIGNATURE_1054 (0x1bb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1055 (0x10031bb4) +#define MLDSA_REG_MLDSA_SIGNATURE_1055 (0x1bb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1056 (0x10031bb8) +#define MLDSA_REG_MLDSA_SIGNATURE_1056 (0x1bb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1057 (0x10031bbc) +#define MLDSA_REG_MLDSA_SIGNATURE_1057 (0x1bbc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1058 (0x10031bc0) +#define MLDSA_REG_MLDSA_SIGNATURE_1058 (0x1bc0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1059 (0x10031bc4) +#define MLDSA_REG_MLDSA_SIGNATURE_1059 (0x1bc4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1060 (0x10031bc8) +#define MLDSA_REG_MLDSA_SIGNATURE_1060 (0x1bc8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1061 (0x10031bcc) +#define MLDSA_REG_MLDSA_SIGNATURE_1061 (0x1bcc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1062 (0x10031bd0) +#define MLDSA_REG_MLDSA_SIGNATURE_1062 (0x1bd0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1063 (0x10031bd4) +#define MLDSA_REG_MLDSA_SIGNATURE_1063 (0x1bd4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1064 (0x10031bd8) +#define MLDSA_REG_MLDSA_SIGNATURE_1064 (0x1bd8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1065 (0x10031bdc) +#define MLDSA_REG_MLDSA_SIGNATURE_1065 (0x1bdc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1066 (0x10031be0) +#define MLDSA_REG_MLDSA_SIGNATURE_1066 (0x1be0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1067 (0x10031be4) +#define MLDSA_REG_MLDSA_SIGNATURE_1067 (0x1be4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1068 (0x10031be8) +#define MLDSA_REG_MLDSA_SIGNATURE_1068 (0x1be8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1069 (0x10031bec) +#define MLDSA_REG_MLDSA_SIGNATURE_1069 (0x1bec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1070 (0x10031bf0) +#define MLDSA_REG_MLDSA_SIGNATURE_1070 (0x1bf0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1071 (0x10031bf4) +#define MLDSA_REG_MLDSA_SIGNATURE_1071 (0x1bf4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1072 (0x10031bf8) +#define MLDSA_REG_MLDSA_SIGNATURE_1072 (0x1bf8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1073 (0x10031bfc) +#define MLDSA_REG_MLDSA_SIGNATURE_1073 (0x1bfc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1074 (0x10031c00) +#define MLDSA_REG_MLDSA_SIGNATURE_1074 (0x1c00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1075 (0x10031c04) +#define MLDSA_REG_MLDSA_SIGNATURE_1075 (0x1c04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1076 (0x10031c08) +#define MLDSA_REG_MLDSA_SIGNATURE_1076 (0x1c08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1077 (0x10031c0c) +#define MLDSA_REG_MLDSA_SIGNATURE_1077 (0x1c0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1078 (0x10031c10) +#define MLDSA_REG_MLDSA_SIGNATURE_1078 (0x1c10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1079 (0x10031c14) +#define MLDSA_REG_MLDSA_SIGNATURE_1079 (0x1c14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1080 (0x10031c18) +#define MLDSA_REG_MLDSA_SIGNATURE_1080 (0x1c18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1081 (0x10031c1c) +#define MLDSA_REG_MLDSA_SIGNATURE_1081 (0x1c1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1082 (0x10031c20) +#define MLDSA_REG_MLDSA_SIGNATURE_1082 (0x1c20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1083 (0x10031c24) +#define MLDSA_REG_MLDSA_SIGNATURE_1083 (0x1c24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1084 (0x10031c28) +#define MLDSA_REG_MLDSA_SIGNATURE_1084 (0x1c28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1085 (0x10031c2c) +#define MLDSA_REG_MLDSA_SIGNATURE_1085 (0x1c2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1086 (0x10031c30) +#define MLDSA_REG_MLDSA_SIGNATURE_1086 (0x1c30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1087 (0x10031c34) +#define MLDSA_REG_MLDSA_SIGNATURE_1087 (0x1c34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1088 (0x10031c38) +#define MLDSA_REG_MLDSA_SIGNATURE_1088 (0x1c38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1089 (0x10031c3c) +#define MLDSA_REG_MLDSA_SIGNATURE_1089 (0x1c3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1090 (0x10031c40) +#define MLDSA_REG_MLDSA_SIGNATURE_1090 (0x1c40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1091 (0x10031c44) +#define MLDSA_REG_MLDSA_SIGNATURE_1091 (0x1c44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1092 (0x10031c48) +#define MLDSA_REG_MLDSA_SIGNATURE_1092 (0x1c48) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1093 (0x10031c4c) +#define MLDSA_REG_MLDSA_SIGNATURE_1093 (0x1c4c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1094 (0x10031c50) +#define MLDSA_REG_MLDSA_SIGNATURE_1094 (0x1c50) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1095 (0x10031c54) +#define MLDSA_REG_MLDSA_SIGNATURE_1095 (0x1c54) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1096 (0x10031c58) +#define MLDSA_REG_MLDSA_SIGNATURE_1096 (0x1c58) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1097 (0x10031c5c) +#define MLDSA_REG_MLDSA_SIGNATURE_1097 (0x1c5c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1098 (0x10031c60) +#define MLDSA_REG_MLDSA_SIGNATURE_1098 (0x1c60) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1099 (0x10031c64) +#define MLDSA_REG_MLDSA_SIGNATURE_1099 (0x1c64) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1100 (0x10031c68) +#define MLDSA_REG_MLDSA_SIGNATURE_1100 (0x1c68) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1101 (0x10031c6c) +#define MLDSA_REG_MLDSA_SIGNATURE_1101 (0x1c6c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1102 (0x10031c70) +#define MLDSA_REG_MLDSA_SIGNATURE_1102 (0x1c70) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1103 (0x10031c74) +#define MLDSA_REG_MLDSA_SIGNATURE_1103 (0x1c74) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1104 (0x10031c78) +#define MLDSA_REG_MLDSA_SIGNATURE_1104 (0x1c78) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1105 (0x10031c7c) +#define MLDSA_REG_MLDSA_SIGNATURE_1105 (0x1c7c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1106 (0x10031c80) +#define MLDSA_REG_MLDSA_SIGNATURE_1106 (0x1c80) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1107 (0x10031c84) +#define MLDSA_REG_MLDSA_SIGNATURE_1107 (0x1c84) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1108 (0x10031c88) +#define MLDSA_REG_MLDSA_SIGNATURE_1108 (0x1c88) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1109 (0x10031c8c) +#define MLDSA_REG_MLDSA_SIGNATURE_1109 (0x1c8c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1110 (0x10031c90) +#define MLDSA_REG_MLDSA_SIGNATURE_1110 (0x1c90) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1111 (0x10031c94) +#define MLDSA_REG_MLDSA_SIGNATURE_1111 (0x1c94) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1112 (0x10031c98) +#define MLDSA_REG_MLDSA_SIGNATURE_1112 (0x1c98) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1113 (0x10031c9c) +#define MLDSA_REG_MLDSA_SIGNATURE_1113 (0x1c9c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1114 (0x10031ca0) +#define MLDSA_REG_MLDSA_SIGNATURE_1114 (0x1ca0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1115 (0x10031ca4) +#define MLDSA_REG_MLDSA_SIGNATURE_1115 (0x1ca4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1116 (0x10031ca8) +#define MLDSA_REG_MLDSA_SIGNATURE_1116 (0x1ca8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1117 (0x10031cac) +#define MLDSA_REG_MLDSA_SIGNATURE_1117 (0x1cac) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1118 (0x10031cb0) +#define MLDSA_REG_MLDSA_SIGNATURE_1118 (0x1cb0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1119 (0x10031cb4) +#define MLDSA_REG_MLDSA_SIGNATURE_1119 (0x1cb4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1120 (0x10031cb8) +#define MLDSA_REG_MLDSA_SIGNATURE_1120 (0x1cb8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1121 (0x10031cbc) +#define MLDSA_REG_MLDSA_SIGNATURE_1121 (0x1cbc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1122 (0x10031cc0) +#define MLDSA_REG_MLDSA_SIGNATURE_1122 (0x1cc0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1123 (0x10031cc4) +#define MLDSA_REG_MLDSA_SIGNATURE_1123 (0x1cc4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1124 (0x10031cc8) +#define MLDSA_REG_MLDSA_SIGNATURE_1124 (0x1cc8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1125 (0x10031ccc) +#define MLDSA_REG_MLDSA_SIGNATURE_1125 (0x1ccc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1126 (0x10031cd0) +#define MLDSA_REG_MLDSA_SIGNATURE_1126 (0x1cd0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1127 (0x10031cd4) +#define MLDSA_REG_MLDSA_SIGNATURE_1127 (0x1cd4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1128 (0x10031cd8) +#define MLDSA_REG_MLDSA_SIGNATURE_1128 (0x1cd8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1129 (0x10031cdc) +#define MLDSA_REG_MLDSA_SIGNATURE_1129 (0x1cdc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1130 (0x10031ce0) +#define MLDSA_REG_MLDSA_SIGNATURE_1130 (0x1ce0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1131 (0x10031ce4) +#define MLDSA_REG_MLDSA_SIGNATURE_1131 (0x1ce4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1132 (0x10031ce8) +#define MLDSA_REG_MLDSA_SIGNATURE_1132 (0x1ce8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1133 (0x10031cec) +#define MLDSA_REG_MLDSA_SIGNATURE_1133 (0x1cec) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1134 (0x10031cf0) +#define MLDSA_REG_MLDSA_SIGNATURE_1134 (0x1cf0) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1135 (0x10031cf4) +#define MLDSA_REG_MLDSA_SIGNATURE_1135 (0x1cf4) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1136 (0x10031cf8) +#define MLDSA_REG_MLDSA_SIGNATURE_1136 (0x1cf8) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1137 (0x10031cfc) +#define MLDSA_REG_MLDSA_SIGNATURE_1137 (0x1cfc) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1138 (0x10031d00) +#define MLDSA_REG_MLDSA_SIGNATURE_1138 (0x1d00) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1139 (0x10031d04) +#define MLDSA_REG_MLDSA_SIGNATURE_1139 (0x1d04) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1140 (0x10031d08) +#define MLDSA_REG_MLDSA_SIGNATURE_1140 (0x1d08) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1141 (0x10031d0c) +#define MLDSA_REG_MLDSA_SIGNATURE_1141 (0x1d0c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1142 (0x10031d10) +#define MLDSA_REG_MLDSA_SIGNATURE_1142 (0x1d10) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1143 (0x10031d14) +#define MLDSA_REG_MLDSA_SIGNATURE_1143 (0x1d14) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1144 (0x10031d18) +#define MLDSA_REG_MLDSA_SIGNATURE_1144 (0x1d18) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1145 (0x10031d1c) +#define MLDSA_REG_MLDSA_SIGNATURE_1145 (0x1d1c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1146 (0x10031d20) +#define MLDSA_REG_MLDSA_SIGNATURE_1146 (0x1d20) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1147 (0x10031d24) +#define MLDSA_REG_MLDSA_SIGNATURE_1147 (0x1d24) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1148 (0x10031d28) +#define MLDSA_REG_MLDSA_SIGNATURE_1148 (0x1d28) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1149 (0x10031d2c) +#define MLDSA_REG_MLDSA_SIGNATURE_1149 (0x1d2c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1150 (0x10031d30) +#define MLDSA_REG_MLDSA_SIGNATURE_1150 (0x1d30) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1151 (0x10031d34) +#define MLDSA_REG_MLDSA_SIGNATURE_1151 (0x1d34) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1152 (0x10031d38) +#define MLDSA_REG_MLDSA_SIGNATURE_1152 (0x1d38) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1153 (0x10031d3c) +#define MLDSA_REG_MLDSA_SIGNATURE_1153 (0x1d3c) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1154 (0x10031d40) +#define MLDSA_REG_MLDSA_SIGNATURE_1154 (0x1d40) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1155 (0x10031d44) +#define MLDSA_REG_MLDSA_SIGNATURE_1155 (0x1d44) +#define CLP_MLDSA_REG_MLDSA_SIGNATURE_1156 (0x10031d48) +#define MLDSA_REG_MLDSA_SIGNATURE_1156 (0x1d48) +#define CLP_MLDSA_REG_MLDSA_PRIVKEY_OUT (0x10032000) +#define MLDSA_REG_MLDSA_PRIVKEY_OUT (0x2000) +#define CLP_MLDSA_REG_MLDSA_PRIVKEY_IN (0x10034000) +#define MLDSA_REG_MLDSA_PRIVKEY_IN (0x4000) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_START (0x10036000) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R (0x10036000) +#define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R (0x6000) +#define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_ERROR_EN_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_ERROR_EN_MASK (0x1) +#define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_NOTIF_EN_LOW (1) +#define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_NOTIF_EN_MASK (0x2) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R (0x10036004) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R (0x6004) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_INTERNAL_EN_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_INTERNAL_EN_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R (0x10036008) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R (0x6008) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R_NOTIF_CMD_DONE_EN_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R_NOTIF_CMD_DONE_EN_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R (0x1003600c) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R (0x600c) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R_AGG_STS_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R_AGG_STS_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R (0x10036010) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R (0x6010) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R_AGG_STS_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R_AGG_STS_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R (0x10036014) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R (0x6014) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R (0x10036018) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R (0x6018) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R (0x1003601c) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R (0x601c) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R_ERROR_INTERNAL_TRIG_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R_ERROR_INTERNAL_TRIG_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R (0x10036020) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R (0x6020) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R_NOTIF_CMD_DONE_TRIG_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R_NOTIF_CMD_DONE_TRIG_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_R (0x10036100) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_R (0x6100) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_R (0x10036180) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_R (0x6180) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R (0x10036200) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R (0x6200) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R_PULSE_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R_PULSE_MASK (0x1) +#define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R (0x10036204) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R (0x6204) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_LOW (0) +#define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_MASK (0x1) #define CLP_SPI_HOST_REG_BASE_ADDR (0x20000000) #define CLP_SPI_HOST_REG_INTERRUPT_STATE (0x20000000) #define SPI_HOST_REG_INTERRUPT_STATE (0x0) diff --git a/src/integration/rtl/caliptra_reg.rdl b/src/integration/rtl/caliptra_reg.rdl index 6f98b9bca..999a9eb0c 100644 --- a/src/integration/rtl/caliptra_reg.rdl +++ b/src/integration/rtl/caliptra_reg.rdl @@ -32,6 +32,8 @@ addrmap clp { sha256_reg sha256_reg @ 0x1002_8000; + mldsa_reg mldsa_reg @ 0x1003_0000; + spi_host spi_host_reg @ 0x2000_0000; uart uart @ 0x2000_1000; diff --git a/src/integration/rtl/caliptra_reg_defines.svh b/src/integration/rtl/caliptra_reg_defines.svh index 56fe762f9..01921522d 100644 --- a/src/integration/rtl/caliptra_reg_defines.svh +++ b/src/integration/rtl/caliptra_reg_defines.svh @@ -4372,6 +4372,3820 @@ `define SHA256_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R (32'ha10) `define SHA256_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_LOW (0) `define SHA256_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_MASK (32'h1) +`define CLP_MLDSA_REG_BASE_ADDR (32'h10030000) +`define CLP_MLDSA_REG_MLDSA_NAME_0 (32'h10030000) +`define MLDSA_REG_MLDSA_NAME_0 (32'h0) +`define CLP_MLDSA_REG_MLDSA_NAME_1 (32'h10030004) +`define MLDSA_REG_MLDSA_NAME_1 (32'h4) +`define CLP_MLDSA_REG_MLDSA_VERSION_0 (32'h10030008) +`define MLDSA_REG_MLDSA_VERSION_0 (32'h8) +`define CLP_MLDSA_REG_MLDSA_VERSION_1 (32'h1003000c) +`define MLDSA_REG_MLDSA_VERSION_1 (32'hc) +`define CLP_MLDSA_REG_MLDSA_CTRL (32'h10030010) +`define MLDSA_REG_MLDSA_CTRL (32'h10) +`define MLDSA_REG_MLDSA_CTRL_CTRL_LOW (0) +`define MLDSA_REG_MLDSA_CTRL_CTRL_MASK (32'h7) +`define MLDSA_REG_MLDSA_CTRL_ZEROIZE_LOW (3) +`define MLDSA_REG_MLDSA_CTRL_ZEROIZE_MASK (32'h8) +`define CLP_MLDSA_REG_MLDSA_STATUS (32'h10030014) +`define MLDSA_REG_MLDSA_STATUS (32'h14) +`define MLDSA_REG_MLDSA_STATUS_READY_LOW (0) +`define MLDSA_REG_MLDSA_STATUS_READY_MASK (32'h1) +`define MLDSA_REG_MLDSA_STATUS_VALID_LOW (1) +`define MLDSA_REG_MLDSA_STATUS_VALID_MASK (32'h2) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_0 (32'h10030018) +`define MLDSA_REG_MLDSA_ENTROPY_0 (32'h18) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_1 (32'h1003001c) +`define MLDSA_REG_MLDSA_ENTROPY_1 (32'h1c) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_2 (32'h10030020) +`define MLDSA_REG_MLDSA_ENTROPY_2 (32'h20) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_3 (32'h10030024) +`define MLDSA_REG_MLDSA_ENTROPY_3 (32'h24) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_4 (32'h10030028) +`define MLDSA_REG_MLDSA_ENTROPY_4 (32'h28) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_5 (32'h1003002c) +`define MLDSA_REG_MLDSA_ENTROPY_5 (32'h2c) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_6 (32'h10030030) +`define MLDSA_REG_MLDSA_ENTROPY_6 (32'h30) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_7 (32'h10030034) +`define MLDSA_REG_MLDSA_ENTROPY_7 (32'h34) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_8 (32'h10030038) +`define MLDSA_REG_MLDSA_ENTROPY_8 (32'h38) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_9 (32'h1003003c) +`define MLDSA_REG_MLDSA_ENTROPY_9 (32'h3c) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_10 (32'h10030040) +`define MLDSA_REG_MLDSA_ENTROPY_10 (32'h40) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_11 (32'h10030044) +`define MLDSA_REG_MLDSA_ENTROPY_11 (32'h44) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_12 (32'h10030048) +`define MLDSA_REG_MLDSA_ENTROPY_12 (32'h48) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_13 (32'h1003004c) +`define MLDSA_REG_MLDSA_ENTROPY_13 (32'h4c) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_14 (32'h10030050) +`define MLDSA_REG_MLDSA_ENTROPY_14 (32'h50) +`define CLP_MLDSA_REG_MLDSA_ENTROPY_15 (32'h10030054) +`define MLDSA_REG_MLDSA_ENTROPY_15 (32'h54) +`define CLP_MLDSA_REG_MLDSA_SEED_0 (32'h10030058) +`define MLDSA_REG_MLDSA_SEED_0 (32'h58) +`define CLP_MLDSA_REG_MLDSA_SEED_1 (32'h1003005c) +`define MLDSA_REG_MLDSA_SEED_1 (32'h5c) +`define CLP_MLDSA_REG_MLDSA_SEED_2 (32'h10030060) +`define MLDSA_REG_MLDSA_SEED_2 (32'h60) +`define CLP_MLDSA_REG_MLDSA_SEED_3 (32'h10030064) +`define MLDSA_REG_MLDSA_SEED_3 (32'h64) +`define CLP_MLDSA_REG_MLDSA_SEED_4 (32'h10030068) +`define MLDSA_REG_MLDSA_SEED_4 (32'h68) +`define CLP_MLDSA_REG_MLDSA_SEED_5 (32'h1003006c) +`define MLDSA_REG_MLDSA_SEED_5 (32'h6c) +`define CLP_MLDSA_REG_MLDSA_SEED_6 (32'h10030070) +`define MLDSA_REG_MLDSA_SEED_6 (32'h70) +`define CLP_MLDSA_REG_MLDSA_SEED_7 (32'h10030074) +`define MLDSA_REG_MLDSA_SEED_7 (32'h74) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_0 (32'h10030078) +`define MLDSA_REG_MLDSA_SIGN_RND_0 (32'h78) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_1 (32'h1003007c) +`define MLDSA_REG_MLDSA_SIGN_RND_1 (32'h7c) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_2 (32'h10030080) +`define MLDSA_REG_MLDSA_SIGN_RND_2 (32'h80) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_3 (32'h10030084) +`define MLDSA_REG_MLDSA_SIGN_RND_3 (32'h84) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_4 (32'h10030088) +`define MLDSA_REG_MLDSA_SIGN_RND_4 (32'h88) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_5 (32'h1003008c) +`define MLDSA_REG_MLDSA_SIGN_RND_5 (32'h8c) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_6 (32'h10030090) +`define MLDSA_REG_MLDSA_SIGN_RND_6 (32'h90) +`define CLP_MLDSA_REG_MLDSA_SIGN_RND_7 (32'h10030094) +`define MLDSA_REG_MLDSA_SIGN_RND_7 (32'h94) +`define CLP_MLDSA_REG_MLDSA_MSG_0 (32'h10030098) +`define MLDSA_REG_MLDSA_MSG_0 (32'h98) +`define CLP_MLDSA_REG_MLDSA_MSG_1 (32'h1003009c) +`define MLDSA_REG_MLDSA_MSG_1 (32'h9c) +`define CLP_MLDSA_REG_MLDSA_MSG_2 (32'h100300a0) +`define MLDSA_REG_MLDSA_MSG_2 (32'ha0) +`define CLP_MLDSA_REG_MLDSA_MSG_3 (32'h100300a4) +`define MLDSA_REG_MLDSA_MSG_3 (32'ha4) +`define CLP_MLDSA_REG_MLDSA_MSG_4 (32'h100300a8) +`define MLDSA_REG_MLDSA_MSG_4 (32'ha8) +`define CLP_MLDSA_REG_MLDSA_MSG_5 (32'h100300ac) +`define MLDSA_REG_MLDSA_MSG_5 (32'hac) +`define CLP_MLDSA_REG_MLDSA_MSG_6 (32'h100300b0) +`define MLDSA_REG_MLDSA_MSG_6 (32'hb0) +`define CLP_MLDSA_REG_MLDSA_MSG_7 (32'h100300b4) +`define MLDSA_REG_MLDSA_MSG_7 (32'hb4) +`define CLP_MLDSA_REG_MLDSA_MSG_8 (32'h100300b8) +`define MLDSA_REG_MLDSA_MSG_8 (32'hb8) +`define CLP_MLDSA_REG_MLDSA_MSG_9 (32'h100300bc) +`define MLDSA_REG_MLDSA_MSG_9 (32'hbc) +`define CLP_MLDSA_REG_MLDSA_MSG_10 (32'h100300c0) +`define MLDSA_REG_MLDSA_MSG_10 (32'hc0) +`define CLP_MLDSA_REG_MLDSA_MSG_11 (32'h100300c4) +`define MLDSA_REG_MLDSA_MSG_11 (32'hc4) +`define CLP_MLDSA_REG_MLDSA_MSG_12 (32'h100300c8) +`define MLDSA_REG_MLDSA_MSG_12 (32'hc8) +`define CLP_MLDSA_REG_MLDSA_MSG_13 (32'h100300cc) +`define MLDSA_REG_MLDSA_MSG_13 (32'hcc) +`define CLP_MLDSA_REG_MLDSA_MSG_14 (32'h100300d0) +`define MLDSA_REG_MLDSA_MSG_14 (32'hd0) +`define CLP_MLDSA_REG_MLDSA_MSG_15 (32'h100300d4) +`define MLDSA_REG_MLDSA_MSG_15 (32'hd4) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_0 (32'h100300d8) +`define MLDSA_REG_MLDSA_VERIFY_RES_0 (32'hd8) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_1 (32'h100300dc) +`define MLDSA_REG_MLDSA_VERIFY_RES_1 (32'hdc) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_2 (32'h100300e0) +`define MLDSA_REG_MLDSA_VERIFY_RES_2 (32'he0) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_3 (32'h100300e4) +`define MLDSA_REG_MLDSA_VERIFY_RES_3 (32'he4) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_4 (32'h100300e8) +`define MLDSA_REG_MLDSA_VERIFY_RES_4 (32'he8) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_5 (32'h100300ec) +`define MLDSA_REG_MLDSA_VERIFY_RES_5 (32'hec) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_6 (32'h100300f0) +`define MLDSA_REG_MLDSA_VERIFY_RES_6 (32'hf0) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_7 (32'h100300f4) +`define MLDSA_REG_MLDSA_VERIFY_RES_7 (32'hf4) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_8 (32'h100300f8) +`define MLDSA_REG_MLDSA_VERIFY_RES_8 (32'hf8) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_9 (32'h100300fc) +`define MLDSA_REG_MLDSA_VERIFY_RES_9 (32'hfc) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_10 (32'h10030100) +`define MLDSA_REG_MLDSA_VERIFY_RES_10 (32'h100) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_11 (32'h10030104) +`define MLDSA_REG_MLDSA_VERIFY_RES_11 (32'h104) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_12 (32'h10030108) +`define MLDSA_REG_MLDSA_VERIFY_RES_12 (32'h108) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_13 (32'h1003010c) +`define MLDSA_REG_MLDSA_VERIFY_RES_13 (32'h10c) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_14 (32'h10030110) +`define MLDSA_REG_MLDSA_VERIFY_RES_14 (32'h110) +`define CLP_MLDSA_REG_MLDSA_VERIFY_RES_15 (32'h10030114) +`define MLDSA_REG_MLDSA_VERIFY_RES_15 (32'h114) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_0 (32'h10030118) +`define MLDSA_REG_MLDSA_PUBKEY_0 (32'h118) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_1 (32'h1003011c) +`define MLDSA_REG_MLDSA_PUBKEY_1 (32'h11c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_2 (32'h10030120) +`define MLDSA_REG_MLDSA_PUBKEY_2 (32'h120) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_3 (32'h10030124) +`define MLDSA_REG_MLDSA_PUBKEY_3 (32'h124) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_4 (32'h10030128) +`define MLDSA_REG_MLDSA_PUBKEY_4 (32'h128) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_5 (32'h1003012c) +`define MLDSA_REG_MLDSA_PUBKEY_5 (32'h12c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_6 (32'h10030130) +`define MLDSA_REG_MLDSA_PUBKEY_6 (32'h130) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_7 (32'h10030134) +`define MLDSA_REG_MLDSA_PUBKEY_7 (32'h134) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_8 (32'h10030138) +`define MLDSA_REG_MLDSA_PUBKEY_8 (32'h138) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_9 (32'h1003013c) +`define MLDSA_REG_MLDSA_PUBKEY_9 (32'h13c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_10 (32'h10030140) +`define MLDSA_REG_MLDSA_PUBKEY_10 (32'h140) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_11 (32'h10030144) +`define MLDSA_REG_MLDSA_PUBKEY_11 (32'h144) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_12 (32'h10030148) +`define MLDSA_REG_MLDSA_PUBKEY_12 (32'h148) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_13 (32'h1003014c) +`define MLDSA_REG_MLDSA_PUBKEY_13 (32'h14c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_14 (32'h10030150) +`define MLDSA_REG_MLDSA_PUBKEY_14 (32'h150) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_15 (32'h10030154) +`define MLDSA_REG_MLDSA_PUBKEY_15 (32'h154) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_16 (32'h10030158) +`define MLDSA_REG_MLDSA_PUBKEY_16 (32'h158) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_17 (32'h1003015c) +`define MLDSA_REG_MLDSA_PUBKEY_17 (32'h15c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_18 (32'h10030160) +`define MLDSA_REG_MLDSA_PUBKEY_18 (32'h160) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_19 (32'h10030164) +`define MLDSA_REG_MLDSA_PUBKEY_19 (32'h164) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_20 (32'h10030168) +`define MLDSA_REG_MLDSA_PUBKEY_20 (32'h168) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_21 (32'h1003016c) +`define MLDSA_REG_MLDSA_PUBKEY_21 (32'h16c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_22 (32'h10030170) +`define MLDSA_REG_MLDSA_PUBKEY_22 (32'h170) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_23 (32'h10030174) +`define MLDSA_REG_MLDSA_PUBKEY_23 (32'h174) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_24 (32'h10030178) +`define MLDSA_REG_MLDSA_PUBKEY_24 (32'h178) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_25 (32'h1003017c) +`define MLDSA_REG_MLDSA_PUBKEY_25 (32'h17c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_26 (32'h10030180) +`define MLDSA_REG_MLDSA_PUBKEY_26 (32'h180) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_27 (32'h10030184) +`define MLDSA_REG_MLDSA_PUBKEY_27 (32'h184) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_28 (32'h10030188) +`define MLDSA_REG_MLDSA_PUBKEY_28 (32'h188) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_29 (32'h1003018c) +`define MLDSA_REG_MLDSA_PUBKEY_29 (32'h18c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_30 (32'h10030190) +`define MLDSA_REG_MLDSA_PUBKEY_30 (32'h190) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_31 (32'h10030194) +`define MLDSA_REG_MLDSA_PUBKEY_31 (32'h194) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_32 (32'h10030198) +`define MLDSA_REG_MLDSA_PUBKEY_32 (32'h198) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_33 (32'h1003019c) +`define MLDSA_REG_MLDSA_PUBKEY_33 (32'h19c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_34 (32'h100301a0) +`define MLDSA_REG_MLDSA_PUBKEY_34 (32'h1a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_35 (32'h100301a4) +`define MLDSA_REG_MLDSA_PUBKEY_35 (32'h1a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_36 (32'h100301a8) +`define MLDSA_REG_MLDSA_PUBKEY_36 (32'h1a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_37 (32'h100301ac) +`define MLDSA_REG_MLDSA_PUBKEY_37 (32'h1ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_38 (32'h100301b0) +`define MLDSA_REG_MLDSA_PUBKEY_38 (32'h1b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_39 (32'h100301b4) +`define MLDSA_REG_MLDSA_PUBKEY_39 (32'h1b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_40 (32'h100301b8) +`define MLDSA_REG_MLDSA_PUBKEY_40 (32'h1b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_41 (32'h100301bc) +`define MLDSA_REG_MLDSA_PUBKEY_41 (32'h1bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_42 (32'h100301c0) +`define MLDSA_REG_MLDSA_PUBKEY_42 (32'h1c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_43 (32'h100301c4) +`define MLDSA_REG_MLDSA_PUBKEY_43 (32'h1c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_44 (32'h100301c8) +`define MLDSA_REG_MLDSA_PUBKEY_44 (32'h1c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_45 (32'h100301cc) +`define MLDSA_REG_MLDSA_PUBKEY_45 (32'h1cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_46 (32'h100301d0) +`define MLDSA_REG_MLDSA_PUBKEY_46 (32'h1d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_47 (32'h100301d4) +`define MLDSA_REG_MLDSA_PUBKEY_47 (32'h1d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_48 (32'h100301d8) +`define MLDSA_REG_MLDSA_PUBKEY_48 (32'h1d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_49 (32'h100301dc) +`define MLDSA_REG_MLDSA_PUBKEY_49 (32'h1dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_50 (32'h100301e0) +`define MLDSA_REG_MLDSA_PUBKEY_50 (32'h1e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_51 (32'h100301e4) +`define MLDSA_REG_MLDSA_PUBKEY_51 (32'h1e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_52 (32'h100301e8) +`define MLDSA_REG_MLDSA_PUBKEY_52 (32'h1e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_53 (32'h100301ec) +`define MLDSA_REG_MLDSA_PUBKEY_53 (32'h1ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_54 (32'h100301f0) +`define MLDSA_REG_MLDSA_PUBKEY_54 (32'h1f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_55 (32'h100301f4) +`define MLDSA_REG_MLDSA_PUBKEY_55 (32'h1f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_56 (32'h100301f8) +`define MLDSA_REG_MLDSA_PUBKEY_56 (32'h1f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_57 (32'h100301fc) +`define MLDSA_REG_MLDSA_PUBKEY_57 (32'h1fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_58 (32'h10030200) +`define MLDSA_REG_MLDSA_PUBKEY_58 (32'h200) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_59 (32'h10030204) +`define MLDSA_REG_MLDSA_PUBKEY_59 (32'h204) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_60 (32'h10030208) +`define MLDSA_REG_MLDSA_PUBKEY_60 (32'h208) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_61 (32'h1003020c) +`define MLDSA_REG_MLDSA_PUBKEY_61 (32'h20c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_62 (32'h10030210) +`define MLDSA_REG_MLDSA_PUBKEY_62 (32'h210) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_63 (32'h10030214) +`define MLDSA_REG_MLDSA_PUBKEY_63 (32'h214) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_64 (32'h10030218) +`define MLDSA_REG_MLDSA_PUBKEY_64 (32'h218) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_65 (32'h1003021c) +`define MLDSA_REG_MLDSA_PUBKEY_65 (32'h21c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_66 (32'h10030220) +`define MLDSA_REG_MLDSA_PUBKEY_66 (32'h220) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_67 (32'h10030224) +`define MLDSA_REG_MLDSA_PUBKEY_67 (32'h224) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_68 (32'h10030228) +`define MLDSA_REG_MLDSA_PUBKEY_68 (32'h228) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_69 (32'h1003022c) +`define MLDSA_REG_MLDSA_PUBKEY_69 (32'h22c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_70 (32'h10030230) +`define MLDSA_REG_MLDSA_PUBKEY_70 (32'h230) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_71 (32'h10030234) +`define MLDSA_REG_MLDSA_PUBKEY_71 (32'h234) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_72 (32'h10030238) +`define MLDSA_REG_MLDSA_PUBKEY_72 (32'h238) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_73 (32'h1003023c) +`define MLDSA_REG_MLDSA_PUBKEY_73 (32'h23c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_74 (32'h10030240) +`define MLDSA_REG_MLDSA_PUBKEY_74 (32'h240) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_75 (32'h10030244) +`define MLDSA_REG_MLDSA_PUBKEY_75 (32'h244) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_76 (32'h10030248) +`define MLDSA_REG_MLDSA_PUBKEY_76 (32'h248) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_77 (32'h1003024c) +`define MLDSA_REG_MLDSA_PUBKEY_77 (32'h24c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_78 (32'h10030250) +`define MLDSA_REG_MLDSA_PUBKEY_78 (32'h250) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_79 (32'h10030254) +`define MLDSA_REG_MLDSA_PUBKEY_79 (32'h254) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_80 (32'h10030258) +`define MLDSA_REG_MLDSA_PUBKEY_80 (32'h258) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_81 (32'h1003025c) +`define MLDSA_REG_MLDSA_PUBKEY_81 (32'h25c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_82 (32'h10030260) +`define MLDSA_REG_MLDSA_PUBKEY_82 (32'h260) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_83 (32'h10030264) +`define MLDSA_REG_MLDSA_PUBKEY_83 (32'h264) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_84 (32'h10030268) +`define MLDSA_REG_MLDSA_PUBKEY_84 (32'h268) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_85 (32'h1003026c) +`define MLDSA_REG_MLDSA_PUBKEY_85 (32'h26c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_86 (32'h10030270) +`define MLDSA_REG_MLDSA_PUBKEY_86 (32'h270) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_87 (32'h10030274) +`define MLDSA_REG_MLDSA_PUBKEY_87 (32'h274) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_88 (32'h10030278) +`define MLDSA_REG_MLDSA_PUBKEY_88 (32'h278) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_89 (32'h1003027c) +`define MLDSA_REG_MLDSA_PUBKEY_89 (32'h27c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_90 (32'h10030280) +`define MLDSA_REG_MLDSA_PUBKEY_90 (32'h280) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_91 (32'h10030284) +`define MLDSA_REG_MLDSA_PUBKEY_91 (32'h284) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_92 (32'h10030288) +`define MLDSA_REG_MLDSA_PUBKEY_92 (32'h288) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_93 (32'h1003028c) +`define MLDSA_REG_MLDSA_PUBKEY_93 (32'h28c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_94 (32'h10030290) +`define MLDSA_REG_MLDSA_PUBKEY_94 (32'h290) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_95 (32'h10030294) +`define MLDSA_REG_MLDSA_PUBKEY_95 (32'h294) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_96 (32'h10030298) +`define MLDSA_REG_MLDSA_PUBKEY_96 (32'h298) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_97 (32'h1003029c) +`define MLDSA_REG_MLDSA_PUBKEY_97 (32'h29c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_98 (32'h100302a0) +`define MLDSA_REG_MLDSA_PUBKEY_98 (32'h2a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_99 (32'h100302a4) +`define MLDSA_REG_MLDSA_PUBKEY_99 (32'h2a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_100 (32'h100302a8) +`define MLDSA_REG_MLDSA_PUBKEY_100 (32'h2a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_101 (32'h100302ac) +`define MLDSA_REG_MLDSA_PUBKEY_101 (32'h2ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_102 (32'h100302b0) +`define MLDSA_REG_MLDSA_PUBKEY_102 (32'h2b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_103 (32'h100302b4) +`define MLDSA_REG_MLDSA_PUBKEY_103 (32'h2b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_104 (32'h100302b8) +`define MLDSA_REG_MLDSA_PUBKEY_104 (32'h2b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_105 (32'h100302bc) +`define MLDSA_REG_MLDSA_PUBKEY_105 (32'h2bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_106 (32'h100302c0) +`define MLDSA_REG_MLDSA_PUBKEY_106 (32'h2c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_107 (32'h100302c4) +`define MLDSA_REG_MLDSA_PUBKEY_107 (32'h2c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_108 (32'h100302c8) +`define MLDSA_REG_MLDSA_PUBKEY_108 (32'h2c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_109 (32'h100302cc) +`define MLDSA_REG_MLDSA_PUBKEY_109 (32'h2cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_110 (32'h100302d0) +`define MLDSA_REG_MLDSA_PUBKEY_110 (32'h2d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_111 (32'h100302d4) +`define MLDSA_REG_MLDSA_PUBKEY_111 (32'h2d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_112 (32'h100302d8) +`define MLDSA_REG_MLDSA_PUBKEY_112 (32'h2d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_113 (32'h100302dc) +`define MLDSA_REG_MLDSA_PUBKEY_113 (32'h2dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_114 (32'h100302e0) +`define MLDSA_REG_MLDSA_PUBKEY_114 (32'h2e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_115 (32'h100302e4) +`define MLDSA_REG_MLDSA_PUBKEY_115 (32'h2e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_116 (32'h100302e8) +`define MLDSA_REG_MLDSA_PUBKEY_116 (32'h2e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_117 (32'h100302ec) +`define MLDSA_REG_MLDSA_PUBKEY_117 (32'h2ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_118 (32'h100302f0) +`define MLDSA_REG_MLDSA_PUBKEY_118 (32'h2f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_119 (32'h100302f4) +`define MLDSA_REG_MLDSA_PUBKEY_119 (32'h2f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_120 (32'h100302f8) +`define MLDSA_REG_MLDSA_PUBKEY_120 (32'h2f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_121 (32'h100302fc) +`define MLDSA_REG_MLDSA_PUBKEY_121 (32'h2fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_122 (32'h10030300) +`define MLDSA_REG_MLDSA_PUBKEY_122 (32'h300) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_123 (32'h10030304) +`define MLDSA_REG_MLDSA_PUBKEY_123 (32'h304) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_124 (32'h10030308) +`define MLDSA_REG_MLDSA_PUBKEY_124 (32'h308) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_125 (32'h1003030c) +`define MLDSA_REG_MLDSA_PUBKEY_125 (32'h30c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_126 (32'h10030310) +`define MLDSA_REG_MLDSA_PUBKEY_126 (32'h310) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_127 (32'h10030314) +`define MLDSA_REG_MLDSA_PUBKEY_127 (32'h314) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_128 (32'h10030318) +`define MLDSA_REG_MLDSA_PUBKEY_128 (32'h318) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_129 (32'h1003031c) +`define MLDSA_REG_MLDSA_PUBKEY_129 (32'h31c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_130 (32'h10030320) +`define MLDSA_REG_MLDSA_PUBKEY_130 (32'h320) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_131 (32'h10030324) +`define MLDSA_REG_MLDSA_PUBKEY_131 (32'h324) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_132 (32'h10030328) +`define MLDSA_REG_MLDSA_PUBKEY_132 (32'h328) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_133 (32'h1003032c) +`define MLDSA_REG_MLDSA_PUBKEY_133 (32'h32c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_134 (32'h10030330) +`define MLDSA_REG_MLDSA_PUBKEY_134 (32'h330) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_135 (32'h10030334) +`define MLDSA_REG_MLDSA_PUBKEY_135 (32'h334) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_136 (32'h10030338) +`define MLDSA_REG_MLDSA_PUBKEY_136 (32'h338) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_137 (32'h1003033c) +`define MLDSA_REG_MLDSA_PUBKEY_137 (32'h33c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_138 (32'h10030340) +`define MLDSA_REG_MLDSA_PUBKEY_138 (32'h340) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_139 (32'h10030344) +`define MLDSA_REG_MLDSA_PUBKEY_139 (32'h344) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_140 (32'h10030348) +`define MLDSA_REG_MLDSA_PUBKEY_140 (32'h348) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_141 (32'h1003034c) +`define MLDSA_REG_MLDSA_PUBKEY_141 (32'h34c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_142 (32'h10030350) +`define MLDSA_REG_MLDSA_PUBKEY_142 (32'h350) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_143 (32'h10030354) +`define MLDSA_REG_MLDSA_PUBKEY_143 (32'h354) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_144 (32'h10030358) +`define MLDSA_REG_MLDSA_PUBKEY_144 (32'h358) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_145 (32'h1003035c) +`define MLDSA_REG_MLDSA_PUBKEY_145 (32'h35c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_146 (32'h10030360) +`define MLDSA_REG_MLDSA_PUBKEY_146 (32'h360) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_147 (32'h10030364) +`define MLDSA_REG_MLDSA_PUBKEY_147 (32'h364) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_148 (32'h10030368) +`define MLDSA_REG_MLDSA_PUBKEY_148 (32'h368) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_149 (32'h1003036c) +`define MLDSA_REG_MLDSA_PUBKEY_149 (32'h36c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_150 (32'h10030370) +`define MLDSA_REG_MLDSA_PUBKEY_150 (32'h370) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_151 (32'h10030374) +`define MLDSA_REG_MLDSA_PUBKEY_151 (32'h374) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_152 (32'h10030378) +`define MLDSA_REG_MLDSA_PUBKEY_152 (32'h378) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_153 (32'h1003037c) +`define MLDSA_REG_MLDSA_PUBKEY_153 (32'h37c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_154 (32'h10030380) +`define MLDSA_REG_MLDSA_PUBKEY_154 (32'h380) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_155 (32'h10030384) +`define MLDSA_REG_MLDSA_PUBKEY_155 (32'h384) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_156 (32'h10030388) +`define MLDSA_REG_MLDSA_PUBKEY_156 (32'h388) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_157 (32'h1003038c) +`define MLDSA_REG_MLDSA_PUBKEY_157 (32'h38c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_158 (32'h10030390) +`define MLDSA_REG_MLDSA_PUBKEY_158 (32'h390) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_159 (32'h10030394) +`define MLDSA_REG_MLDSA_PUBKEY_159 (32'h394) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_160 (32'h10030398) +`define MLDSA_REG_MLDSA_PUBKEY_160 (32'h398) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_161 (32'h1003039c) +`define MLDSA_REG_MLDSA_PUBKEY_161 (32'h39c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_162 (32'h100303a0) +`define MLDSA_REG_MLDSA_PUBKEY_162 (32'h3a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_163 (32'h100303a4) +`define MLDSA_REG_MLDSA_PUBKEY_163 (32'h3a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_164 (32'h100303a8) +`define MLDSA_REG_MLDSA_PUBKEY_164 (32'h3a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_165 (32'h100303ac) +`define MLDSA_REG_MLDSA_PUBKEY_165 (32'h3ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_166 (32'h100303b0) +`define MLDSA_REG_MLDSA_PUBKEY_166 (32'h3b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_167 (32'h100303b4) +`define MLDSA_REG_MLDSA_PUBKEY_167 (32'h3b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_168 (32'h100303b8) +`define MLDSA_REG_MLDSA_PUBKEY_168 (32'h3b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_169 (32'h100303bc) +`define MLDSA_REG_MLDSA_PUBKEY_169 (32'h3bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_170 (32'h100303c0) +`define MLDSA_REG_MLDSA_PUBKEY_170 (32'h3c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_171 (32'h100303c4) +`define MLDSA_REG_MLDSA_PUBKEY_171 (32'h3c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_172 (32'h100303c8) +`define MLDSA_REG_MLDSA_PUBKEY_172 (32'h3c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_173 (32'h100303cc) +`define MLDSA_REG_MLDSA_PUBKEY_173 (32'h3cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_174 (32'h100303d0) +`define MLDSA_REG_MLDSA_PUBKEY_174 (32'h3d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_175 (32'h100303d4) +`define MLDSA_REG_MLDSA_PUBKEY_175 (32'h3d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_176 (32'h100303d8) +`define MLDSA_REG_MLDSA_PUBKEY_176 (32'h3d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_177 (32'h100303dc) +`define MLDSA_REG_MLDSA_PUBKEY_177 (32'h3dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_178 (32'h100303e0) +`define MLDSA_REG_MLDSA_PUBKEY_178 (32'h3e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_179 (32'h100303e4) +`define MLDSA_REG_MLDSA_PUBKEY_179 (32'h3e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_180 (32'h100303e8) +`define MLDSA_REG_MLDSA_PUBKEY_180 (32'h3e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_181 (32'h100303ec) +`define MLDSA_REG_MLDSA_PUBKEY_181 (32'h3ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_182 (32'h100303f0) +`define MLDSA_REG_MLDSA_PUBKEY_182 (32'h3f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_183 (32'h100303f4) +`define MLDSA_REG_MLDSA_PUBKEY_183 (32'h3f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_184 (32'h100303f8) +`define MLDSA_REG_MLDSA_PUBKEY_184 (32'h3f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_185 (32'h100303fc) +`define MLDSA_REG_MLDSA_PUBKEY_185 (32'h3fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_186 (32'h10030400) +`define MLDSA_REG_MLDSA_PUBKEY_186 (32'h400) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_187 (32'h10030404) +`define MLDSA_REG_MLDSA_PUBKEY_187 (32'h404) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_188 (32'h10030408) +`define MLDSA_REG_MLDSA_PUBKEY_188 (32'h408) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_189 (32'h1003040c) +`define MLDSA_REG_MLDSA_PUBKEY_189 (32'h40c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_190 (32'h10030410) +`define MLDSA_REG_MLDSA_PUBKEY_190 (32'h410) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_191 (32'h10030414) +`define MLDSA_REG_MLDSA_PUBKEY_191 (32'h414) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_192 (32'h10030418) +`define MLDSA_REG_MLDSA_PUBKEY_192 (32'h418) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_193 (32'h1003041c) +`define MLDSA_REG_MLDSA_PUBKEY_193 (32'h41c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_194 (32'h10030420) +`define MLDSA_REG_MLDSA_PUBKEY_194 (32'h420) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_195 (32'h10030424) +`define MLDSA_REG_MLDSA_PUBKEY_195 (32'h424) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_196 (32'h10030428) +`define MLDSA_REG_MLDSA_PUBKEY_196 (32'h428) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_197 (32'h1003042c) +`define MLDSA_REG_MLDSA_PUBKEY_197 (32'h42c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_198 (32'h10030430) +`define MLDSA_REG_MLDSA_PUBKEY_198 (32'h430) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_199 (32'h10030434) +`define MLDSA_REG_MLDSA_PUBKEY_199 (32'h434) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_200 (32'h10030438) +`define MLDSA_REG_MLDSA_PUBKEY_200 (32'h438) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_201 (32'h1003043c) +`define MLDSA_REG_MLDSA_PUBKEY_201 (32'h43c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_202 (32'h10030440) +`define MLDSA_REG_MLDSA_PUBKEY_202 (32'h440) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_203 (32'h10030444) +`define MLDSA_REG_MLDSA_PUBKEY_203 (32'h444) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_204 (32'h10030448) +`define MLDSA_REG_MLDSA_PUBKEY_204 (32'h448) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_205 (32'h1003044c) +`define MLDSA_REG_MLDSA_PUBKEY_205 (32'h44c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_206 (32'h10030450) +`define MLDSA_REG_MLDSA_PUBKEY_206 (32'h450) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_207 (32'h10030454) +`define MLDSA_REG_MLDSA_PUBKEY_207 (32'h454) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_208 (32'h10030458) +`define MLDSA_REG_MLDSA_PUBKEY_208 (32'h458) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_209 (32'h1003045c) +`define MLDSA_REG_MLDSA_PUBKEY_209 (32'h45c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_210 (32'h10030460) +`define MLDSA_REG_MLDSA_PUBKEY_210 (32'h460) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_211 (32'h10030464) +`define MLDSA_REG_MLDSA_PUBKEY_211 (32'h464) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_212 (32'h10030468) +`define MLDSA_REG_MLDSA_PUBKEY_212 (32'h468) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_213 (32'h1003046c) +`define MLDSA_REG_MLDSA_PUBKEY_213 (32'h46c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_214 (32'h10030470) +`define MLDSA_REG_MLDSA_PUBKEY_214 (32'h470) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_215 (32'h10030474) +`define MLDSA_REG_MLDSA_PUBKEY_215 (32'h474) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_216 (32'h10030478) +`define MLDSA_REG_MLDSA_PUBKEY_216 (32'h478) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_217 (32'h1003047c) +`define MLDSA_REG_MLDSA_PUBKEY_217 (32'h47c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_218 (32'h10030480) +`define MLDSA_REG_MLDSA_PUBKEY_218 (32'h480) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_219 (32'h10030484) +`define MLDSA_REG_MLDSA_PUBKEY_219 (32'h484) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_220 (32'h10030488) +`define MLDSA_REG_MLDSA_PUBKEY_220 (32'h488) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_221 (32'h1003048c) +`define MLDSA_REG_MLDSA_PUBKEY_221 (32'h48c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_222 (32'h10030490) +`define MLDSA_REG_MLDSA_PUBKEY_222 (32'h490) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_223 (32'h10030494) +`define MLDSA_REG_MLDSA_PUBKEY_223 (32'h494) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_224 (32'h10030498) +`define MLDSA_REG_MLDSA_PUBKEY_224 (32'h498) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_225 (32'h1003049c) +`define MLDSA_REG_MLDSA_PUBKEY_225 (32'h49c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_226 (32'h100304a0) +`define MLDSA_REG_MLDSA_PUBKEY_226 (32'h4a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_227 (32'h100304a4) +`define MLDSA_REG_MLDSA_PUBKEY_227 (32'h4a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_228 (32'h100304a8) +`define MLDSA_REG_MLDSA_PUBKEY_228 (32'h4a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_229 (32'h100304ac) +`define MLDSA_REG_MLDSA_PUBKEY_229 (32'h4ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_230 (32'h100304b0) +`define MLDSA_REG_MLDSA_PUBKEY_230 (32'h4b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_231 (32'h100304b4) +`define MLDSA_REG_MLDSA_PUBKEY_231 (32'h4b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_232 (32'h100304b8) +`define MLDSA_REG_MLDSA_PUBKEY_232 (32'h4b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_233 (32'h100304bc) +`define MLDSA_REG_MLDSA_PUBKEY_233 (32'h4bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_234 (32'h100304c0) +`define MLDSA_REG_MLDSA_PUBKEY_234 (32'h4c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_235 (32'h100304c4) +`define MLDSA_REG_MLDSA_PUBKEY_235 (32'h4c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_236 (32'h100304c8) +`define MLDSA_REG_MLDSA_PUBKEY_236 (32'h4c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_237 (32'h100304cc) +`define MLDSA_REG_MLDSA_PUBKEY_237 (32'h4cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_238 (32'h100304d0) +`define MLDSA_REG_MLDSA_PUBKEY_238 (32'h4d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_239 (32'h100304d4) +`define MLDSA_REG_MLDSA_PUBKEY_239 (32'h4d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_240 (32'h100304d8) +`define MLDSA_REG_MLDSA_PUBKEY_240 (32'h4d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_241 (32'h100304dc) +`define MLDSA_REG_MLDSA_PUBKEY_241 (32'h4dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_242 (32'h100304e0) +`define MLDSA_REG_MLDSA_PUBKEY_242 (32'h4e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_243 (32'h100304e4) +`define MLDSA_REG_MLDSA_PUBKEY_243 (32'h4e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_244 (32'h100304e8) +`define MLDSA_REG_MLDSA_PUBKEY_244 (32'h4e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_245 (32'h100304ec) +`define MLDSA_REG_MLDSA_PUBKEY_245 (32'h4ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_246 (32'h100304f0) +`define MLDSA_REG_MLDSA_PUBKEY_246 (32'h4f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_247 (32'h100304f4) +`define MLDSA_REG_MLDSA_PUBKEY_247 (32'h4f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_248 (32'h100304f8) +`define MLDSA_REG_MLDSA_PUBKEY_248 (32'h4f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_249 (32'h100304fc) +`define MLDSA_REG_MLDSA_PUBKEY_249 (32'h4fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_250 (32'h10030500) +`define MLDSA_REG_MLDSA_PUBKEY_250 (32'h500) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_251 (32'h10030504) +`define MLDSA_REG_MLDSA_PUBKEY_251 (32'h504) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_252 (32'h10030508) +`define MLDSA_REG_MLDSA_PUBKEY_252 (32'h508) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_253 (32'h1003050c) +`define MLDSA_REG_MLDSA_PUBKEY_253 (32'h50c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_254 (32'h10030510) +`define MLDSA_REG_MLDSA_PUBKEY_254 (32'h510) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_255 (32'h10030514) +`define MLDSA_REG_MLDSA_PUBKEY_255 (32'h514) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_256 (32'h10030518) +`define MLDSA_REG_MLDSA_PUBKEY_256 (32'h518) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_257 (32'h1003051c) +`define MLDSA_REG_MLDSA_PUBKEY_257 (32'h51c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_258 (32'h10030520) +`define MLDSA_REG_MLDSA_PUBKEY_258 (32'h520) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_259 (32'h10030524) +`define MLDSA_REG_MLDSA_PUBKEY_259 (32'h524) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_260 (32'h10030528) +`define MLDSA_REG_MLDSA_PUBKEY_260 (32'h528) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_261 (32'h1003052c) +`define MLDSA_REG_MLDSA_PUBKEY_261 (32'h52c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_262 (32'h10030530) +`define MLDSA_REG_MLDSA_PUBKEY_262 (32'h530) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_263 (32'h10030534) +`define MLDSA_REG_MLDSA_PUBKEY_263 (32'h534) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_264 (32'h10030538) +`define MLDSA_REG_MLDSA_PUBKEY_264 (32'h538) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_265 (32'h1003053c) +`define MLDSA_REG_MLDSA_PUBKEY_265 (32'h53c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_266 (32'h10030540) +`define MLDSA_REG_MLDSA_PUBKEY_266 (32'h540) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_267 (32'h10030544) +`define MLDSA_REG_MLDSA_PUBKEY_267 (32'h544) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_268 (32'h10030548) +`define MLDSA_REG_MLDSA_PUBKEY_268 (32'h548) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_269 (32'h1003054c) +`define MLDSA_REG_MLDSA_PUBKEY_269 (32'h54c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_270 (32'h10030550) +`define MLDSA_REG_MLDSA_PUBKEY_270 (32'h550) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_271 (32'h10030554) +`define MLDSA_REG_MLDSA_PUBKEY_271 (32'h554) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_272 (32'h10030558) +`define MLDSA_REG_MLDSA_PUBKEY_272 (32'h558) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_273 (32'h1003055c) +`define MLDSA_REG_MLDSA_PUBKEY_273 (32'h55c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_274 (32'h10030560) +`define MLDSA_REG_MLDSA_PUBKEY_274 (32'h560) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_275 (32'h10030564) +`define MLDSA_REG_MLDSA_PUBKEY_275 (32'h564) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_276 (32'h10030568) +`define MLDSA_REG_MLDSA_PUBKEY_276 (32'h568) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_277 (32'h1003056c) +`define MLDSA_REG_MLDSA_PUBKEY_277 (32'h56c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_278 (32'h10030570) +`define MLDSA_REG_MLDSA_PUBKEY_278 (32'h570) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_279 (32'h10030574) +`define MLDSA_REG_MLDSA_PUBKEY_279 (32'h574) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_280 (32'h10030578) +`define MLDSA_REG_MLDSA_PUBKEY_280 (32'h578) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_281 (32'h1003057c) +`define MLDSA_REG_MLDSA_PUBKEY_281 (32'h57c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_282 (32'h10030580) +`define MLDSA_REG_MLDSA_PUBKEY_282 (32'h580) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_283 (32'h10030584) +`define MLDSA_REG_MLDSA_PUBKEY_283 (32'h584) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_284 (32'h10030588) +`define MLDSA_REG_MLDSA_PUBKEY_284 (32'h588) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_285 (32'h1003058c) +`define MLDSA_REG_MLDSA_PUBKEY_285 (32'h58c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_286 (32'h10030590) +`define MLDSA_REG_MLDSA_PUBKEY_286 (32'h590) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_287 (32'h10030594) +`define MLDSA_REG_MLDSA_PUBKEY_287 (32'h594) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_288 (32'h10030598) +`define MLDSA_REG_MLDSA_PUBKEY_288 (32'h598) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_289 (32'h1003059c) +`define MLDSA_REG_MLDSA_PUBKEY_289 (32'h59c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_290 (32'h100305a0) +`define MLDSA_REG_MLDSA_PUBKEY_290 (32'h5a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_291 (32'h100305a4) +`define MLDSA_REG_MLDSA_PUBKEY_291 (32'h5a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_292 (32'h100305a8) +`define MLDSA_REG_MLDSA_PUBKEY_292 (32'h5a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_293 (32'h100305ac) +`define MLDSA_REG_MLDSA_PUBKEY_293 (32'h5ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_294 (32'h100305b0) +`define MLDSA_REG_MLDSA_PUBKEY_294 (32'h5b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_295 (32'h100305b4) +`define MLDSA_REG_MLDSA_PUBKEY_295 (32'h5b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_296 (32'h100305b8) +`define MLDSA_REG_MLDSA_PUBKEY_296 (32'h5b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_297 (32'h100305bc) +`define MLDSA_REG_MLDSA_PUBKEY_297 (32'h5bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_298 (32'h100305c0) +`define MLDSA_REG_MLDSA_PUBKEY_298 (32'h5c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_299 (32'h100305c4) +`define MLDSA_REG_MLDSA_PUBKEY_299 (32'h5c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_300 (32'h100305c8) +`define MLDSA_REG_MLDSA_PUBKEY_300 (32'h5c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_301 (32'h100305cc) +`define MLDSA_REG_MLDSA_PUBKEY_301 (32'h5cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_302 (32'h100305d0) +`define MLDSA_REG_MLDSA_PUBKEY_302 (32'h5d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_303 (32'h100305d4) +`define MLDSA_REG_MLDSA_PUBKEY_303 (32'h5d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_304 (32'h100305d8) +`define MLDSA_REG_MLDSA_PUBKEY_304 (32'h5d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_305 (32'h100305dc) +`define MLDSA_REG_MLDSA_PUBKEY_305 (32'h5dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_306 (32'h100305e0) +`define MLDSA_REG_MLDSA_PUBKEY_306 (32'h5e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_307 (32'h100305e4) +`define MLDSA_REG_MLDSA_PUBKEY_307 (32'h5e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_308 (32'h100305e8) +`define MLDSA_REG_MLDSA_PUBKEY_308 (32'h5e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_309 (32'h100305ec) +`define MLDSA_REG_MLDSA_PUBKEY_309 (32'h5ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_310 (32'h100305f0) +`define MLDSA_REG_MLDSA_PUBKEY_310 (32'h5f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_311 (32'h100305f4) +`define MLDSA_REG_MLDSA_PUBKEY_311 (32'h5f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_312 (32'h100305f8) +`define MLDSA_REG_MLDSA_PUBKEY_312 (32'h5f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_313 (32'h100305fc) +`define MLDSA_REG_MLDSA_PUBKEY_313 (32'h5fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_314 (32'h10030600) +`define MLDSA_REG_MLDSA_PUBKEY_314 (32'h600) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_315 (32'h10030604) +`define MLDSA_REG_MLDSA_PUBKEY_315 (32'h604) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_316 (32'h10030608) +`define MLDSA_REG_MLDSA_PUBKEY_316 (32'h608) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_317 (32'h1003060c) +`define MLDSA_REG_MLDSA_PUBKEY_317 (32'h60c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_318 (32'h10030610) +`define MLDSA_REG_MLDSA_PUBKEY_318 (32'h610) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_319 (32'h10030614) +`define MLDSA_REG_MLDSA_PUBKEY_319 (32'h614) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_320 (32'h10030618) +`define MLDSA_REG_MLDSA_PUBKEY_320 (32'h618) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_321 (32'h1003061c) +`define MLDSA_REG_MLDSA_PUBKEY_321 (32'h61c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_322 (32'h10030620) +`define MLDSA_REG_MLDSA_PUBKEY_322 (32'h620) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_323 (32'h10030624) +`define MLDSA_REG_MLDSA_PUBKEY_323 (32'h624) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_324 (32'h10030628) +`define MLDSA_REG_MLDSA_PUBKEY_324 (32'h628) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_325 (32'h1003062c) +`define MLDSA_REG_MLDSA_PUBKEY_325 (32'h62c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_326 (32'h10030630) +`define MLDSA_REG_MLDSA_PUBKEY_326 (32'h630) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_327 (32'h10030634) +`define MLDSA_REG_MLDSA_PUBKEY_327 (32'h634) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_328 (32'h10030638) +`define MLDSA_REG_MLDSA_PUBKEY_328 (32'h638) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_329 (32'h1003063c) +`define MLDSA_REG_MLDSA_PUBKEY_329 (32'h63c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_330 (32'h10030640) +`define MLDSA_REG_MLDSA_PUBKEY_330 (32'h640) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_331 (32'h10030644) +`define MLDSA_REG_MLDSA_PUBKEY_331 (32'h644) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_332 (32'h10030648) +`define MLDSA_REG_MLDSA_PUBKEY_332 (32'h648) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_333 (32'h1003064c) +`define MLDSA_REG_MLDSA_PUBKEY_333 (32'h64c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_334 (32'h10030650) +`define MLDSA_REG_MLDSA_PUBKEY_334 (32'h650) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_335 (32'h10030654) +`define MLDSA_REG_MLDSA_PUBKEY_335 (32'h654) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_336 (32'h10030658) +`define MLDSA_REG_MLDSA_PUBKEY_336 (32'h658) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_337 (32'h1003065c) +`define MLDSA_REG_MLDSA_PUBKEY_337 (32'h65c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_338 (32'h10030660) +`define MLDSA_REG_MLDSA_PUBKEY_338 (32'h660) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_339 (32'h10030664) +`define MLDSA_REG_MLDSA_PUBKEY_339 (32'h664) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_340 (32'h10030668) +`define MLDSA_REG_MLDSA_PUBKEY_340 (32'h668) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_341 (32'h1003066c) +`define MLDSA_REG_MLDSA_PUBKEY_341 (32'h66c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_342 (32'h10030670) +`define MLDSA_REG_MLDSA_PUBKEY_342 (32'h670) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_343 (32'h10030674) +`define MLDSA_REG_MLDSA_PUBKEY_343 (32'h674) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_344 (32'h10030678) +`define MLDSA_REG_MLDSA_PUBKEY_344 (32'h678) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_345 (32'h1003067c) +`define MLDSA_REG_MLDSA_PUBKEY_345 (32'h67c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_346 (32'h10030680) +`define MLDSA_REG_MLDSA_PUBKEY_346 (32'h680) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_347 (32'h10030684) +`define MLDSA_REG_MLDSA_PUBKEY_347 (32'h684) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_348 (32'h10030688) +`define MLDSA_REG_MLDSA_PUBKEY_348 (32'h688) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_349 (32'h1003068c) +`define MLDSA_REG_MLDSA_PUBKEY_349 (32'h68c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_350 (32'h10030690) +`define MLDSA_REG_MLDSA_PUBKEY_350 (32'h690) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_351 (32'h10030694) +`define MLDSA_REG_MLDSA_PUBKEY_351 (32'h694) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_352 (32'h10030698) +`define MLDSA_REG_MLDSA_PUBKEY_352 (32'h698) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_353 (32'h1003069c) +`define MLDSA_REG_MLDSA_PUBKEY_353 (32'h69c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_354 (32'h100306a0) +`define MLDSA_REG_MLDSA_PUBKEY_354 (32'h6a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_355 (32'h100306a4) +`define MLDSA_REG_MLDSA_PUBKEY_355 (32'h6a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_356 (32'h100306a8) +`define MLDSA_REG_MLDSA_PUBKEY_356 (32'h6a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_357 (32'h100306ac) +`define MLDSA_REG_MLDSA_PUBKEY_357 (32'h6ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_358 (32'h100306b0) +`define MLDSA_REG_MLDSA_PUBKEY_358 (32'h6b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_359 (32'h100306b4) +`define MLDSA_REG_MLDSA_PUBKEY_359 (32'h6b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_360 (32'h100306b8) +`define MLDSA_REG_MLDSA_PUBKEY_360 (32'h6b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_361 (32'h100306bc) +`define MLDSA_REG_MLDSA_PUBKEY_361 (32'h6bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_362 (32'h100306c0) +`define MLDSA_REG_MLDSA_PUBKEY_362 (32'h6c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_363 (32'h100306c4) +`define MLDSA_REG_MLDSA_PUBKEY_363 (32'h6c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_364 (32'h100306c8) +`define MLDSA_REG_MLDSA_PUBKEY_364 (32'h6c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_365 (32'h100306cc) +`define MLDSA_REG_MLDSA_PUBKEY_365 (32'h6cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_366 (32'h100306d0) +`define MLDSA_REG_MLDSA_PUBKEY_366 (32'h6d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_367 (32'h100306d4) +`define MLDSA_REG_MLDSA_PUBKEY_367 (32'h6d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_368 (32'h100306d8) +`define MLDSA_REG_MLDSA_PUBKEY_368 (32'h6d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_369 (32'h100306dc) +`define MLDSA_REG_MLDSA_PUBKEY_369 (32'h6dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_370 (32'h100306e0) +`define MLDSA_REG_MLDSA_PUBKEY_370 (32'h6e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_371 (32'h100306e4) +`define MLDSA_REG_MLDSA_PUBKEY_371 (32'h6e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_372 (32'h100306e8) +`define MLDSA_REG_MLDSA_PUBKEY_372 (32'h6e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_373 (32'h100306ec) +`define MLDSA_REG_MLDSA_PUBKEY_373 (32'h6ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_374 (32'h100306f0) +`define MLDSA_REG_MLDSA_PUBKEY_374 (32'h6f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_375 (32'h100306f4) +`define MLDSA_REG_MLDSA_PUBKEY_375 (32'h6f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_376 (32'h100306f8) +`define MLDSA_REG_MLDSA_PUBKEY_376 (32'h6f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_377 (32'h100306fc) +`define MLDSA_REG_MLDSA_PUBKEY_377 (32'h6fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_378 (32'h10030700) +`define MLDSA_REG_MLDSA_PUBKEY_378 (32'h700) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_379 (32'h10030704) +`define MLDSA_REG_MLDSA_PUBKEY_379 (32'h704) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_380 (32'h10030708) +`define MLDSA_REG_MLDSA_PUBKEY_380 (32'h708) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_381 (32'h1003070c) +`define MLDSA_REG_MLDSA_PUBKEY_381 (32'h70c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_382 (32'h10030710) +`define MLDSA_REG_MLDSA_PUBKEY_382 (32'h710) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_383 (32'h10030714) +`define MLDSA_REG_MLDSA_PUBKEY_383 (32'h714) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_384 (32'h10030718) +`define MLDSA_REG_MLDSA_PUBKEY_384 (32'h718) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_385 (32'h1003071c) +`define MLDSA_REG_MLDSA_PUBKEY_385 (32'h71c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_386 (32'h10030720) +`define MLDSA_REG_MLDSA_PUBKEY_386 (32'h720) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_387 (32'h10030724) +`define MLDSA_REG_MLDSA_PUBKEY_387 (32'h724) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_388 (32'h10030728) +`define MLDSA_REG_MLDSA_PUBKEY_388 (32'h728) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_389 (32'h1003072c) +`define MLDSA_REG_MLDSA_PUBKEY_389 (32'h72c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_390 (32'h10030730) +`define MLDSA_REG_MLDSA_PUBKEY_390 (32'h730) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_391 (32'h10030734) +`define MLDSA_REG_MLDSA_PUBKEY_391 (32'h734) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_392 (32'h10030738) +`define MLDSA_REG_MLDSA_PUBKEY_392 (32'h738) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_393 (32'h1003073c) +`define MLDSA_REG_MLDSA_PUBKEY_393 (32'h73c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_394 (32'h10030740) +`define MLDSA_REG_MLDSA_PUBKEY_394 (32'h740) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_395 (32'h10030744) +`define MLDSA_REG_MLDSA_PUBKEY_395 (32'h744) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_396 (32'h10030748) +`define MLDSA_REG_MLDSA_PUBKEY_396 (32'h748) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_397 (32'h1003074c) +`define MLDSA_REG_MLDSA_PUBKEY_397 (32'h74c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_398 (32'h10030750) +`define MLDSA_REG_MLDSA_PUBKEY_398 (32'h750) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_399 (32'h10030754) +`define MLDSA_REG_MLDSA_PUBKEY_399 (32'h754) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_400 (32'h10030758) +`define MLDSA_REG_MLDSA_PUBKEY_400 (32'h758) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_401 (32'h1003075c) +`define MLDSA_REG_MLDSA_PUBKEY_401 (32'h75c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_402 (32'h10030760) +`define MLDSA_REG_MLDSA_PUBKEY_402 (32'h760) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_403 (32'h10030764) +`define MLDSA_REG_MLDSA_PUBKEY_403 (32'h764) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_404 (32'h10030768) +`define MLDSA_REG_MLDSA_PUBKEY_404 (32'h768) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_405 (32'h1003076c) +`define MLDSA_REG_MLDSA_PUBKEY_405 (32'h76c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_406 (32'h10030770) +`define MLDSA_REG_MLDSA_PUBKEY_406 (32'h770) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_407 (32'h10030774) +`define MLDSA_REG_MLDSA_PUBKEY_407 (32'h774) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_408 (32'h10030778) +`define MLDSA_REG_MLDSA_PUBKEY_408 (32'h778) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_409 (32'h1003077c) +`define MLDSA_REG_MLDSA_PUBKEY_409 (32'h77c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_410 (32'h10030780) +`define MLDSA_REG_MLDSA_PUBKEY_410 (32'h780) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_411 (32'h10030784) +`define MLDSA_REG_MLDSA_PUBKEY_411 (32'h784) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_412 (32'h10030788) +`define MLDSA_REG_MLDSA_PUBKEY_412 (32'h788) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_413 (32'h1003078c) +`define MLDSA_REG_MLDSA_PUBKEY_413 (32'h78c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_414 (32'h10030790) +`define MLDSA_REG_MLDSA_PUBKEY_414 (32'h790) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_415 (32'h10030794) +`define MLDSA_REG_MLDSA_PUBKEY_415 (32'h794) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_416 (32'h10030798) +`define MLDSA_REG_MLDSA_PUBKEY_416 (32'h798) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_417 (32'h1003079c) +`define MLDSA_REG_MLDSA_PUBKEY_417 (32'h79c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_418 (32'h100307a0) +`define MLDSA_REG_MLDSA_PUBKEY_418 (32'h7a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_419 (32'h100307a4) +`define MLDSA_REG_MLDSA_PUBKEY_419 (32'h7a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_420 (32'h100307a8) +`define MLDSA_REG_MLDSA_PUBKEY_420 (32'h7a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_421 (32'h100307ac) +`define MLDSA_REG_MLDSA_PUBKEY_421 (32'h7ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_422 (32'h100307b0) +`define MLDSA_REG_MLDSA_PUBKEY_422 (32'h7b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_423 (32'h100307b4) +`define MLDSA_REG_MLDSA_PUBKEY_423 (32'h7b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_424 (32'h100307b8) +`define MLDSA_REG_MLDSA_PUBKEY_424 (32'h7b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_425 (32'h100307bc) +`define MLDSA_REG_MLDSA_PUBKEY_425 (32'h7bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_426 (32'h100307c0) +`define MLDSA_REG_MLDSA_PUBKEY_426 (32'h7c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_427 (32'h100307c4) +`define MLDSA_REG_MLDSA_PUBKEY_427 (32'h7c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_428 (32'h100307c8) +`define MLDSA_REG_MLDSA_PUBKEY_428 (32'h7c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_429 (32'h100307cc) +`define MLDSA_REG_MLDSA_PUBKEY_429 (32'h7cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_430 (32'h100307d0) +`define MLDSA_REG_MLDSA_PUBKEY_430 (32'h7d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_431 (32'h100307d4) +`define MLDSA_REG_MLDSA_PUBKEY_431 (32'h7d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_432 (32'h100307d8) +`define MLDSA_REG_MLDSA_PUBKEY_432 (32'h7d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_433 (32'h100307dc) +`define MLDSA_REG_MLDSA_PUBKEY_433 (32'h7dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_434 (32'h100307e0) +`define MLDSA_REG_MLDSA_PUBKEY_434 (32'h7e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_435 (32'h100307e4) +`define MLDSA_REG_MLDSA_PUBKEY_435 (32'h7e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_436 (32'h100307e8) +`define MLDSA_REG_MLDSA_PUBKEY_436 (32'h7e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_437 (32'h100307ec) +`define MLDSA_REG_MLDSA_PUBKEY_437 (32'h7ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_438 (32'h100307f0) +`define MLDSA_REG_MLDSA_PUBKEY_438 (32'h7f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_439 (32'h100307f4) +`define MLDSA_REG_MLDSA_PUBKEY_439 (32'h7f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_440 (32'h100307f8) +`define MLDSA_REG_MLDSA_PUBKEY_440 (32'h7f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_441 (32'h100307fc) +`define MLDSA_REG_MLDSA_PUBKEY_441 (32'h7fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_442 (32'h10030800) +`define MLDSA_REG_MLDSA_PUBKEY_442 (32'h800) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_443 (32'h10030804) +`define MLDSA_REG_MLDSA_PUBKEY_443 (32'h804) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_444 (32'h10030808) +`define MLDSA_REG_MLDSA_PUBKEY_444 (32'h808) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_445 (32'h1003080c) +`define MLDSA_REG_MLDSA_PUBKEY_445 (32'h80c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_446 (32'h10030810) +`define MLDSA_REG_MLDSA_PUBKEY_446 (32'h810) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_447 (32'h10030814) +`define MLDSA_REG_MLDSA_PUBKEY_447 (32'h814) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_448 (32'h10030818) +`define MLDSA_REG_MLDSA_PUBKEY_448 (32'h818) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_449 (32'h1003081c) +`define MLDSA_REG_MLDSA_PUBKEY_449 (32'h81c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_450 (32'h10030820) +`define MLDSA_REG_MLDSA_PUBKEY_450 (32'h820) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_451 (32'h10030824) +`define MLDSA_REG_MLDSA_PUBKEY_451 (32'h824) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_452 (32'h10030828) +`define MLDSA_REG_MLDSA_PUBKEY_452 (32'h828) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_453 (32'h1003082c) +`define MLDSA_REG_MLDSA_PUBKEY_453 (32'h82c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_454 (32'h10030830) +`define MLDSA_REG_MLDSA_PUBKEY_454 (32'h830) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_455 (32'h10030834) +`define MLDSA_REG_MLDSA_PUBKEY_455 (32'h834) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_456 (32'h10030838) +`define MLDSA_REG_MLDSA_PUBKEY_456 (32'h838) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_457 (32'h1003083c) +`define MLDSA_REG_MLDSA_PUBKEY_457 (32'h83c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_458 (32'h10030840) +`define MLDSA_REG_MLDSA_PUBKEY_458 (32'h840) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_459 (32'h10030844) +`define MLDSA_REG_MLDSA_PUBKEY_459 (32'h844) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_460 (32'h10030848) +`define MLDSA_REG_MLDSA_PUBKEY_460 (32'h848) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_461 (32'h1003084c) +`define MLDSA_REG_MLDSA_PUBKEY_461 (32'h84c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_462 (32'h10030850) +`define MLDSA_REG_MLDSA_PUBKEY_462 (32'h850) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_463 (32'h10030854) +`define MLDSA_REG_MLDSA_PUBKEY_463 (32'h854) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_464 (32'h10030858) +`define MLDSA_REG_MLDSA_PUBKEY_464 (32'h858) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_465 (32'h1003085c) +`define MLDSA_REG_MLDSA_PUBKEY_465 (32'h85c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_466 (32'h10030860) +`define MLDSA_REG_MLDSA_PUBKEY_466 (32'h860) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_467 (32'h10030864) +`define MLDSA_REG_MLDSA_PUBKEY_467 (32'h864) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_468 (32'h10030868) +`define MLDSA_REG_MLDSA_PUBKEY_468 (32'h868) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_469 (32'h1003086c) +`define MLDSA_REG_MLDSA_PUBKEY_469 (32'h86c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_470 (32'h10030870) +`define MLDSA_REG_MLDSA_PUBKEY_470 (32'h870) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_471 (32'h10030874) +`define MLDSA_REG_MLDSA_PUBKEY_471 (32'h874) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_472 (32'h10030878) +`define MLDSA_REG_MLDSA_PUBKEY_472 (32'h878) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_473 (32'h1003087c) +`define MLDSA_REG_MLDSA_PUBKEY_473 (32'h87c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_474 (32'h10030880) +`define MLDSA_REG_MLDSA_PUBKEY_474 (32'h880) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_475 (32'h10030884) +`define MLDSA_REG_MLDSA_PUBKEY_475 (32'h884) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_476 (32'h10030888) +`define MLDSA_REG_MLDSA_PUBKEY_476 (32'h888) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_477 (32'h1003088c) +`define MLDSA_REG_MLDSA_PUBKEY_477 (32'h88c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_478 (32'h10030890) +`define MLDSA_REG_MLDSA_PUBKEY_478 (32'h890) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_479 (32'h10030894) +`define MLDSA_REG_MLDSA_PUBKEY_479 (32'h894) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_480 (32'h10030898) +`define MLDSA_REG_MLDSA_PUBKEY_480 (32'h898) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_481 (32'h1003089c) +`define MLDSA_REG_MLDSA_PUBKEY_481 (32'h89c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_482 (32'h100308a0) +`define MLDSA_REG_MLDSA_PUBKEY_482 (32'h8a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_483 (32'h100308a4) +`define MLDSA_REG_MLDSA_PUBKEY_483 (32'h8a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_484 (32'h100308a8) +`define MLDSA_REG_MLDSA_PUBKEY_484 (32'h8a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_485 (32'h100308ac) +`define MLDSA_REG_MLDSA_PUBKEY_485 (32'h8ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_486 (32'h100308b0) +`define MLDSA_REG_MLDSA_PUBKEY_486 (32'h8b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_487 (32'h100308b4) +`define MLDSA_REG_MLDSA_PUBKEY_487 (32'h8b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_488 (32'h100308b8) +`define MLDSA_REG_MLDSA_PUBKEY_488 (32'h8b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_489 (32'h100308bc) +`define MLDSA_REG_MLDSA_PUBKEY_489 (32'h8bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_490 (32'h100308c0) +`define MLDSA_REG_MLDSA_PUBKEY_490 (32'h8c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_491 (32'h100308c4) +`define MLDSA_REG_MLDSA_PUBKEY_491 (32'h8c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_492 (32'h100308c8) +`define MLDSA_REG_MLDSA_PUBKEY_492 (32'h8c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_493 (32'h100308cc) +`define MLDSA_REG_MLDSA_PUBKEY_493 (32'h8cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_494 (32'h100308d0) +`define MLDSA_REG_MLDSA_PUBKEY_494 (32'h8d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_495 (32'h100308d4) +`define MLDSA_REG_MLDSA_PUBKEY_495 (32'h8d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_496 (32'h100308d8) +`define MLDSA_REG_MLDSA_PUBKEY_496 (32'h8d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_497 (32'h100308dc) +`define MLDSA_REG_MLDSA_PUBKEY_497 (32'h8dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_498 (32'h100308e0) +`define MLDSA_REG_MLDSA_PUBKEY_498 (32'h8e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_499 (32'h100308e4) +`define MLDSA_REG_MLDSA_PUBKEY_499 (32'h8e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_500 (32'h100308e8) +`define MLDSA_REG_MLDSA_PUBKEY_500 (32'h8e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_501 (32'h100308ec) +`define MLDSA_REG_MLDSA_PUBKEY_501 (32'h8ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_502 (32'h100308f0) +`define MLDSA_REG_MLDSA_PUBKEY_502 (32'h8f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_503 (32'h100308f4) +`define MLDSA_REG_MLDSA_PUBKEY_503 (32'h8f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_504 (32'h100308f8) +`define MLDSA_REG_MLDSA_PUBKEY_504 (32'h8f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_505 (32'h100308fc) +`define MLDSA_REG_MLDSA_PUBKEY_505 (32'h8fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_506 (32'h10030900) +`define MLDSA_REG_MLDSA_PUBKEY_506 (32'h900) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_507 (32'h10030904) +`define MLDSA_REG_MLDSA_PUBKEY_507 (32'h904) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_508 (32'h10030908) +`define MLDSA_REG_MLDSA_PUBKEY_508 (32'h908) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_509 (32'h1003090c) +`define MLDSA_REG_MLDSA_PUBKEY_509 (32'h90c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_510 (32'h10030910) +`define MLDSA_REG_MLDSA_PUBKEY_510 (32'h910) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_511 (32'h10030914) +`define MLDSA_REG_MLDSA_PUBKEY_511 (32'h914) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_512 (32'h10030918) +`define MLDSA_REG_MLDSA_PUBKEY_512 (32'h918) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_513 (32'h1003091c) +`define MLDSA_REG_MLDSA_PUBKEY_513 (32'h91c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_514 (32'h10030920) +`define MLDSA_REG_MLDSA_PUBKEY_514 (32'h920) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_515 (32'h10030924) +`define MLDSA_REG_MLDSA_PUBKEY_515 (32'h924) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_516 (32'h10030928) +`define MLDSA_REG_MLDSA_PUBKEY_516 (32'h928) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_517 (32'h1003092c) +`define MLDSA_REG_MLDSA_PUBKEY_517 (32'h92c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_518 (32'h10030930) +`define MLDSA_REG_MLDSA_PUBKEY_518 (32'h930) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_519 (32'h10030934) +`define MLDSA_REG_MLDSA_PUBKEY_519 (32'h934) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_520 (32'h10030938) +`define MLDSA_REG_MLDSA_PUBKEY_520 (32'h938) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_521 (32'h1003093c) +`define MLDSA_REG_MLDSA_PUBKEY_521 (32'h93c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_522 (32'h10030940) +`define MLDSA_REG_MLDSA_PUBKEY_522 (32'h940) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_523 (32'h10030944) +`define MLDSA_REG_MLDSA_PUBKEY_523 (32'h944) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_524 (32'h10030948) +`define MLDSA_REG_MLDSA_PUBKEY_524 (32'h948) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_525 (32'h1003094c) +`define MLDSA_REG_MLDSA_PUBKEY_525 (32'h94c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_526 (32'h10030950) +`define MLDSA_REG_MLDSA_PUBKEY_526 (32'h950) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_527 (32'h10030954) +`define MLDSA_REG_MLDSA_PUBKEY_527 (32'h954) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_528 (32'h10030958) +`define MLDSA_REG_MLDSA_PUBKEY_528 (32'h958) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_529 (32'h1003095c) +`define MLDSA_REG_MLDSA_PUBKEY_529 (32'h95c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_530 (32'h10030960) +`define MLDSA_REG_MLDSA_PUBKEY_530 (32'h960) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_531 (32'h10030964) +`define MLDSA_REG_MLDSA_PUBKEY_531 (32'h964) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_532 (32'h10030968) +`define MLDSA_REG_MLDSA_PUBKEY_532 (32'h968) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_533 (32'h1003096c) +`define MLDSA_REG_MLDSA_PUBKEY_533 (32'h96c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_534 (32'h10030970) +`define MLDSA_REG_MLDSA_PUBKEY_534 (32'h970) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_535 (32'h10030974) +`define MLDSA_REG_MLDSA_PUBKEY_535 (32'h974) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_536 (32'h10030978) +`define MLDSA_REG_MLDSA_PUBKEY_536 (32'h978) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_537 (32'h1003097c) +`define MLDSA_REG_MLDSA_PUBKEY_537 (32'h97c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_538 (32'h10030980) +`define MLDSA_REG_MLDSA_PUBKEY_538 (32'h980) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_539 (32'h10030984) +`define MLDSA_REG_MLDSA_PUBKEY_539 (32'h984) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_540 (32'h10030988) +`define MLDSA_REG_MLDSA_PUBKEY_540 (32'h988) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_541 (32'h1003098c) +`define MLDSA_REG_MLDSA_PUBKEY_541 (32'h98c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_542 (32'h10030990) +`define MLDSA_REG_MLDSA_PUBKEY_542 (32'h990) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_543 (32'h10030994) +`define MLDSA_REG_MLDSA_PUBKEY_543 (32'h994) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_544 (32'h10030998) +`define MLDSA_REG_MLDSA_PUBKEY_544 (32'h998) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_545 (32'h1003099c) +`define MLDSA_REG_MLDSA_PUBKEY_545 (32'h99c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_546 (32'h100309a0) +`define MLDSA_REG_MLDSA_PUBKEY_546 (32'h9a0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_547 (32'h100309a4) +`define MLDSA_REG_MLDSA_PUBKEY_547 (32'h9a4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_548 (32'h100309a8) +`define MLDSA_REG_MLDSA_PUBKEY_548 (32'h9a8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_549 (32'h100309ac) +`define MLDSA_REG_MLDSA_PUBKEY_549 (32'h9ac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_550 (32'h100309b0) +`define MLDSA_REG_MLDSA_PUBKEY_550 (32'h9b0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_551 (32'h100309b4) +`define MLDSA_REG_MLDSA_PUBKEY_551 (32'h9b4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_552 (32'h100309b8) +`define MLDSA_REG_MLDSA_PUBKEY_552 (32'h9b8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_553 (32'h100309bc) +`define MLDSA_REG_MLDSA_PUBKEY_553 (32'h9bc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_554 (32'h100309c0) +`define MLDSA_REG_MLDSA_PUBKEY_554 (32'h9c0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_555 (32'h100309c4) +`define MLDSA_REG_MLDSA_PUBKEY_555 (32'h9c4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_556 (32'h100309c8) +`define MLDSA_REG_MLDSA_PUBKEY_556 (32'h9c8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_557 (32'h100309cc) +`define MLDSA_REG_MLDSA_PUBKEY_557 (32'h9cc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_558 (32'h100309d0) +`define MLDSA_REG_MLDSA_PUBKEY_558 (32'h9d0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_559 (32'h100309d4) +`define MLDSA_REG_MLDSA_PUBKEY_559 (32'h9d4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_560 (32'h100309d8) +`define MLDSA_REG_MLDSA_PUBKEY_560 (32'h9d8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_561 (32'h100309dc) +`define MLDSA_REG_MLDSA_PUBKEY_561 (32'h9dc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_562 (32'h100309e0) +`define MLDSA_REG_MLDSA_PUBKEY_562 (32'h9e0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_563 (32'h100309e4) +`define MLDSA_REG_MLDSA_PUBKEY_563 (32'h9e4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_564 (32'h100309e8) +`define MLDSA_REG_MLDSA_PUBKEY_564 (32'h9e8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_565 (32'h100309ec) +`define MLDSA_REG_MLDSA_PUBKEY_565 (32'h9ec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_566 (32'h100309f0) +`define MLDSA_REG_MLDSA_PUBKEY_566 (32'h9f0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_567 (32'h100309f4) +`define MLDSA_REG_MLDSA_PUBKEY_567 (32'h9f4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_568 (32'h100309f8) +`define MLDSA_REG_MLDSA_PUBKEY_568 (32'h9f8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_569 (32'h100309fc) +`define MLDSA_REG_MLDSA_PUBKEY_569 (32'h9fc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_570 (32'h10030a00) +`define MLDSA_REG_MLDSA_PUBKEY_570 (32'ha00) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_571 (32'h10030a04) +`define MLDSA_REG_MLDSA_PUBKEY_571 (32'ha04) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_572 (32'h10030a08) +`define MLDSA_REG_MLDSA_PUBKEY_572 (32'ha08) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_573 (32'h10030a0c) +`define MLDSA_REG_MLDSA_PUBKEY_573 (32'ha0c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_574 (32'h10030a10) +`define MLDSA_REG_MLDSA_PUBKEY_574 (32'ha10) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_575 (32'h10030a14) +`define MLDSA_REG_MLDSA_PUBKEY_575 (32'ha14) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_576 (32'h10030a18) +`define MLDSA_REG_MLDSA_PUBKEY_576 (32'ha18) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_577 (32'h10030a1c) +`define MLDSA_REG_MLDSA_PUBKEY_577 (32'ha1c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_578 (32'h10030a20) +`define MLDSA_REG_MLDSA_PUBKEY_578 (32'ha20) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_579 (32'h10030a24) +`define MLDSA_REG_MLDSA_PUBKEY_579 (32'ha24) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_580 (32'h10030a28) +`define MLDSA_REG_MLDSA_PUBKEY_580 (32'ha28) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_581 (32'h10030a2c) +`define MLDSA_REG_MLDSA_PUBKEY_581 (32'ha2c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_582 (32'h10030a30) +`define MLDSA_REG_MLDSA_PUBKEY_582 (32'ha30) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_583 (32'h10030a34) +`define MLDSA_REG_MLDSA_PUBKEY_583 (32'ha34) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_584 (32'h10030a38) +`define MLDSA_REG_MLDSA_PUBKEY_584 (32'ha38) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_585 (32'h10030a3c) +`define MLDSA_REG_MLDSA_PUBKEY_585 (32'ha3c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_586 (32'h10030a40) +`define MLDSA_REG_MLDSA_PUBKEY_586 (32'ha40) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_587 (32'h10030a44) +`define MLDSA_REG_MLDSA_PUBKEY_587 (32'ha44) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_588 (32'h10030a48) +`define MLDSA_REG_MLDSA_PUBKEY_588 (32'ha48) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_589 (32'h10030a4c) +`define MLDSA_REG_MLDSA_PUBKEY_589 (32'ha4c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_590 (32'h10030a50) +`define MLDSA_REG_MLDSA_PUBKEY_590 (32'ha50) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_591 (32'h10030a54) +`define MLDSA_REG_MLDSA_PUBKEY_591 (32'ha54) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_592 (32'h10030a58) +`define MLDSA_REG_MLDSA_PUBKEY_592 (32'ha58) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_593 (32'h10030a5c) +`define MLDSA_REG_MLDSA_PUBKEY_593 (32'ha5c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_594 (32'h10030a60) +`define MLDSA_REG_MLDSA_PUBKEY_594 (32'ha60) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_595 (32'h10030a64) +`define MLDSA_REG_MLDSA_PUBKEY_595 (32'ha64) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_596 (32'h10030a68) +`define MLDSA_REG_MLDSA_PUBKEY_596 (32'ha68) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_597 (32'h10030a6c) +`define MLDSA_REG_MLDSA_PUBKEY_597 (32'ha6c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_598 (32'h10030a70) +`define MLDSA_REG_MLDSA_PUBKEY_598 (32'ha70) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_599 (32'h10030a74) +`define MLDSA_REG_MLDSA_PUBKEY_599 (32'ha74) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_600 (32'h10030a78) +`define MLDSA_REG_MLDSA_PUBKEY_600 (32'ha78) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_601 (32'h10030a7c) +`define MLDSA_REG_MLDSA_PUBKEY_601 (32'ha7c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_602 (32'h10030a80) +`define MLDSA_REG_MLDSA_PUBKEY_602 (32'ha80) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_603 (32'h10030a84) +`define MLDSA_REG_MLDSA_PUBKEY_603 (32'ha84) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_604 (32'h10030a88) +`define MLDSA_REG_MLDSA_PUBKEY_604 (32'ha88) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_605 (32'h10030a8c) +`define MLDSA_REG_MLDSA_PUBKEY_605 (32'ha8c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_606 (32'h10030a90) +`define MLDSA_REG_MLDSA_PUBKEY_606 (32'ha90) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_607 (32'h10030a94) +`define MLDSA_REG_MLDSA_PUBKEY_607 (32'ha94) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_608 (32'h10030a98) +`define MLDSA_REG_MLDSA_PUBKEY_608 (32'ha98) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_609 (32'h10030a9c) +`define MLDSA_REG_MLDSA_PUBKEY_609 (32'ha9c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_610 (32'h10030aa0) +`define MLDSA_REG_MLDSA_PUBKEY_610 (32'haa0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_611 (32'h10030aa4) +`define MLDSA_REG_MLDSA_PUBKEY_611 (32'haa4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_612 (32'h10030aa8) +`define MLDSA_REG_MLDSA_PUBKEY_612 (32'haa8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_613 (32'h10030aac) +`define MLDSA_REG_MLDSA_PUBKEY_613 (32'haac) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_614 (32'h10030ab0) +`define MLDSA_REG_MLDSA_PUBKEY_614 (32'hab0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_615 (32'h10030ab4) +`define MLDSA_REG_MLDSA_PUBKEY_615 (32'hab4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_616 (32'h10030ab8) +`define MLDSA_REG_MLDSA_PUBKEY_616 (32'hab8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_617 (32'h10030abc) +`define MLDSA_REG_MLDSA_PUBKEY_617 (32'habc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_618 (32'h10030ac0) +`define MLDSA_REG_MLDSA_PUBKEY_618 (32'hac0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_619 (32'h10030ac4) +`define MLDSA_REG_MLDSA_PUBKEY_619 (32'hac4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_620 (32'h10030ac8) +`define MLDSA_REG_MLDSA_PUBKEY_620 (32'hac8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_621 (32'h10030acc) +`define MLDSA_REG_MLDSA_PUBKEY_621 (32'hacc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_622 (32'h10030ad0) +`define MLDSA_REG_MLDSA_PUBKEY_622 (32'had0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_623 (32'h10030ad4) +`define MLDSA_REG_MLDSA_PUBKEY_623 (32'had4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_624 (32'h10030ad8) +`define MLDSA_REG_MLDSA_PUBKEY_624 (32'had8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_625 (32'h10030adc) +`define MLDSA_REG_MLDSA_PUBKEY_625 (32'hadc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_626 (32'h10030ae0) +`define MLDSA_REG_MLDSA_PUBKEY_626 (32'hae0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_627 (32'h10030ae4) +`define MLDSA_REG_MLDSA_PUBKEY_627 (32'hae4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_628 (32'h10030ae8) +`define MLDSA_REG_MLDSA_PUBKEY_628 (32'hae8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_629 (32'h10030aec) +`define MLDSA_REG_MLDSA_PUBKEY_629 (32'haec) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_630 (32'h10030af0) +`define MLDSA_REG_MLDSA_PUBKEY_630 (32'haf0) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_631 (32'h10030af4) +`define MLDSA_REG_MLDSA_PUBKEY_631 (32'haf4) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_632 (32'h10030af8) +`define MLDSA_REG_MLDSA_PUBKEY_632 (32'haf8) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_633 (32'h10030afc) +`define MLDSA_REG_MLDSA_PUBKEY_633 (32'hafc) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_634 (32'h10030b00) +`define MLDSA_REG_MLDSA_PUBKEY_634 (32'hb00) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_635 (32'h10030b04) +`define MLDSA_REG_MLDSA_PUBKEY_635 (32'hb04) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_636 (32'h10030b08) +`define MLDSA_REG_MLDSA_PUBKEY_636 (32'hb08) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_637 (32'h10030b0c) +`define MLDSA_REG_MLDSA_PUBKEY_637 (32'hb0c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_638 (32'h10030b10) +`define MLDSA_REG_MLDSA_PUBKEY_638 (32'hb10) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_639 (32'h10030b14) +`define MLDSA_REG_MLDSA_PUBKEY_639 (32'hb14) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_640 (32'h10030b18) +`define MLDSA_REG_MLDSA_PUBKEY_640 (32'hb18) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_641 (32'h10030b1c) +`define MLDSA_REG_MLDSA_PUBKEY_641 (32'hb1c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_642 (32'h10030b20) +`define MLDSA_REG_MLDSA_PUBKEY_642 (32'hb20) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_643 (32'h10030b24) +`define MLDSA_REG_MLDSA_PUBKEY_643 (32'hb24) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_644 (32'h10030b28) +`define MLDSA_REG_MLDSA_PUBKEY_644 (32'hb28) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_645 (32'h10030b2c) +`define MLDSA_REG_MLDSA_PUBKEY_645 (32'hb2c) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_646 (32'h10030b30) +`define MLDSA_REG_MLDSA_PUBKEY_646 (32'hb30) +`define CLP_MLDSA_REG_MLDSA_PUBKEY_647 (32'h10030b34) +`define MLDSA_REG_MLDSA_PUBKEY_647 (32'hb34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_0 (32'h10030b38) +`define MLDSA_REG_MLDSA_SIGNATURE_0 (32'hb38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1 (32'h10030b3c) +`define MLDSA_REG_MLDSA_SIGNATURE_1 (32'hb3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_2 (32'h10030b40) +`define MLDSA_REG_MLDSA_SIGNATURE_2 (32'hb40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_3 (32'h10030b44) +`define MLDSA_REG_MLDSA_SIGNATURE_3 (32'hb44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_4 (32'h10030b48) +`define MLDSA_REG_MLDSA_SIGNATURE_4 (32'hb48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_5 (32'h10030b4c) +`define MLDSA_REG_MLDSA_SIGNATURE_5 (32'hb4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_6 (32'h10030b50) +`define MLDSA_REG_MLDSA_SIGNATURE_6 (32'hb50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_7 (32'h10030b54) +`define MLDSA_REG_MLDSA_SIGNATURE_7 (32'hb54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_8 (32'h10030b58) +`define MLDSA_REG_MLDSA_SIGNATURE_8 (32'hb58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_9 (32'h10030b5c) +`define MLDSA_REG_MLDSA_SIGNATURE_9 (32'hb5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_10 (32'h10030b60) +`define MLDSA_REG_MLDSA_SIGNATURE_10 (32'hb60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_11 (32'h10030b64) +`define MLDSA_REG_MLDSA_SIGNATURE_11 (32'hb64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_12 (32'h10030b68) +`define MLDSA_REG_MLDSA_SIGNATURE_12 (32'hb68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_13 (32'h10030b6c) +`define MLDSA_REG_MLDSA_SIGNATURE_13 (32'hb6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_14 (32'h10030b70) +`define MLDSA_REG_MLDSA_SIGNATURE_14 (32'hb70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_15 (32'h10030b74) +`define MLDSA_REG_MLDSA_SIGNATURE_15 (32'hb74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_16 (32'h10030b78) +`define MLDSA_REG_MLDSA_SIGNATURE_16 (32'hb78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_17 (32'h10030b7c) +`define MLDSA_REG_MLDSA_SIGNATURE_17 (32'hb7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_18 (32'h10030b80) +`define MLDSA_REG_MLDSA_SIGNATURE_18 (32'hb80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_19 (32'h10030b84) +`define MLDSA_REG_MLDSA_SIGNATURE_19 (32'hb84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_20 (32'h10030b88) +`define MLDSA_REG_MLDSA_SIGNATURE_20 (32'hb88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_21 (32'h10030b8c) +`define MLDSA_REG_MLDSA_SIGNATURE_21 (32'hb8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_22 (32'h10030b90) +`define MLDSA_REG_MLDSA_SIGNATURE_22 (32'hb90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_23 (32'h10030b94) +`define MLDSA_REG_MLDSA_SIGNATURE_23 (32'hb94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_24 (32'h10030b98) +`define MLDSA_REG_MLDSA_SIGNATURE_24 (32'hb98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_25 (32'h10030b9c) +`define MLDSA_REG_MLDSA_SIGNATURE_25 (32'hb9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_26 (32'h10030ba0) +`define MLDSA_REG_MLDSA_SIGNATURE_26 (32'hba0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_27 (32'h10030ba4) +`define MLDSA_REG_MLDSA_SIGNATURE_27 (32'hba4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_28 (32'h10030ba8) +`define MLDSA_REG_MLDSA_SIGNATURE_28 (32'hba8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_29 (32'h10030bac) +`define MLDSA_REG_MLDSA_SIGNATURE_29 (32'hbac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_30 (32'h10030bb0) +`define MLDSA_REG_MLDSA_SIGNATURE_30 (32'hbb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_31 (32'h10030bb4) +`define MLDSA_REG_MLDSA_SIGNATURE_31 (32'hbb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_32 (32'h10030bb8) +`define MLDSA_REG_MLDSA_SIGNATURE_32 (32'hbb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_33 (32'h10030bbc) +`define MLDSA_REG_MLDSA_SIGNATURE_33 (32'hbbc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_34 (32'h10030bc0) +`define MLDSA_REG_MLDSA_SIGNATURE_34 (32'hbc0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_35 (32'h10030bc4) +`define MLDSA_REG_MLDSA_SIGNATURE_35 (32'hbc4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_36 (32'h10030bc8) +`define MLDSA_REG_MLDSA_SIGNATURE_36 (32'hbc8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_37 (32'h10030bcc) +`define MLDSA_REG_MLDSA_SIGNATURE_37 (32'hbcc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_38 (32'h10030bd0) +`define MLDSA_REG_MLDSA_SIGNATURE_38 (32'hbd0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_39 (32'h10030bd4) +`define MLDSA_REG_MLDSA_SIGNATURE_39 (32'hbd4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_40 (32'h10030bd8) +`define MLDSA_REG_MLDSA_SIGNATURE_40 (32'hbd8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_41 (32'h10030bdc) +`define MLDSA_REG_MLDSA_SIGNATURE_41 (32'hbdc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_42 (32'h10030be0) +`define MLDSA_REG_MLDSA_SIGNATURE_42 (32'hbe0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_43 (32'h10030be4) +`define MLDSA_REG_MLDSA_SIGNATURE_43 (32'hbe4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_44 (32'h10030be8) +`define MLDSA_REG_MLDSA_SIGNATURE_44 (32'hbe8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_45 (32'h10030bec) +`define MLDSA_REG_MLDSA_SIGNATURE_45 (32'hbec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_46 (32'h10030bf0) +`define MLDSA_REG_MLDSA_SIGNATURE_46 (32'hbf0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_47 (32'h10030bf4) +`define MLDSA_REG_MLDSA_SIGNATURE_47 (32'hbf4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_48 (32'h10030bf8) +`define MLDSA_REG_MLDSA_SIGNATURE_48 (32'hbf8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_49 (32'h10030bfc) +`define MLDSA_REG_MLDSA_SIGNATURE_49 (32'hbfc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_50 (32'h10030c00) +`define MLDSA_REG_MLDSA_SIGNATURE_50 (32'hc00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_51 (32'h10030c04) +`define MLDSA_REG_MLDSA_SIGNATURE_51 (32'hc04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_52 (32'h10030c08) +`define MLDSA_REG_MLDSA_SIGNATURE_52 (32'hc08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_53 (32'h10030c0c) +`define MLDSA_REG_MLDSA_SIGNATURE_53 (32'hc0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_54 (32'h10030c10) +`define MLDSA_REG_MLDSA_SIGNATURE_54 (32'hc10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_55 (32'h10030c14) +`define MLDSA_REG_MLDSA_SIGNATURE_55 (32'hc14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_56 (32'h10030c18) +`define MLDSA_REG_MLDSA_SIGNATURE_56 (32'hc18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_57 (32'h10030c1c) +`define MLDSA_REG_MLDSA_SIGNATURE_57 (32'hc1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_58 (32'h10030c20) +`define MLDSA_REG_MLDSA_SIGNATURE_58 (32'hc20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_59 (32'h10030c24) +`define MLDSA_REG_MLDSA_SIGNATURE_59 (32'hc24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_60 (32'h10030c28) +`define MLDSA_REG_MLDSA_SIGNATURE_60 (32'hc28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_61 (32'h10030c2c) +`define MLDSA_REG_MLDSA_SIGNATURE_61 (32'hc2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_62 (32'h10030c30) +`define MLDSA_REG_MLDSA_SIGNATURE_62 (32'hc30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_63 (32'h10030c34) +`define MLDSA_REG_MLDSA_SIGNATURE_63 (32'hc34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_64 (32'h10030c38) +`define MLDSA_REG_MLDSA_SIGNATURE_64 (32'hc38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_65 (32'h10030c3c) +`define MLDSA_REG_MLDSA_SIGNATURE_65 (32'hc3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_66 (32'h10030c40) +`define MLDSA_REG_MLDSA_SIGNATURE_66 (32'hc40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_67 (32'h10030c44) +`define MLDSA_REG_MLDSA_SIGNATURE_67 (32'hc44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_68 (32'h10030c48) +`define MLDSA_REG_MLDSA_SIGNATURE_68 (32'hc48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_69 (32'h10030c4c) +`define MLDSA_REG_MLDSA_SIGNATURE_69 (32'hc4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_70 (32'h10030c50) +`define MLDSA_REG_MLDSA_SIGNATURE_70 (32'hc50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_71 (32'h10030c54) +`define MLDSA_REG_MLDSA_SIGNATURE_71 (32'hc54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_72 (32'h10030c58) +`define MLDSA_REG_MLDSA_SIGNATURE_72 (32'hc58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_73 (32'h10030c5c) +`define MLDSA_REG_MLDSA_SIGNATURE_73 (32'hc5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_74 (32'h10030c60) +`define MLDSA_REG_MLDSA_SIGNATURE_74 (32'hc60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_75 (32'h10030c64) +`define MLDSA_REG_MLDSA_SIGNATURE_75 (32'hc64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_76 (32'h10030c68) +`define MLDSA_REG_MLDSA_SIGNATURE_76 (32'hc68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_77 (32'h10030c6c) +`define MLDSA_REG_MLDSA_SIGNATURE_77 (32'hc6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_78 (32'h10030c70) +`define MLDSA_REG_MLDSA_SIGNATURE_78 (32'hc70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_79 (32'h10030c74) +`define MLDSA_REG_MLDSA_SIGNATURE_79 (32'hc74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_80 (32'h10030c78) +`define MLDSA_REG_MLDSA_SIGNATURE_80 (32'hc78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_81 (32'h10030c7c) +`define MLDSA_REG_MLDSA_SIGNATURE_81 (32'hc7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_82 (32'h10030c80) +`define MLDSA_REG_MLDSA_SIGNATURE_82 (32'hc80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_83 (32'h10030c84) +`define MLDSA_REG_MLDSA_SIGNATURE_83 (32'hc84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_84 (32'h10030c88) +`define MLDSA_REG_MLDSA_SIGNATURE_84 (32'hc88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_85 (32'h10030c8c) +`define MLDSA_REG_MLDSA_SIGNATURE_85 (32'hc8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_86 (32'h10030c90) +`define MLDSA_REG_MLDSA_SIGNATURE_86 (32'hc90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_87 (32'h10030c94) +`define MLDSA_REG_MLDSA_SIGNATURE_87 (32'hc94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_88 (32'h10030c98) +`define MLDSA_REG_MLDSA_SIGNATURE_88 (32'hc98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_89 (32'h10030c9c) +`define MLDSA_REG_MLDSA_SIGNATURE_89 (32'hc9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_90 (32'h10030ca0) +`define MLDSA_REG_MLDSA_SIGNATURE_90 (32'hca0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_91 (32'h10030ca4) +`define MLDSA_REG_MLDSA_SIGNATURE_91 (32'hca4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_92 (32'h10030ca8) +`define MLDSA_REG_MLDSA_SIGNATURE_92 (32'hca8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_93 (32'h10030cac) +`define MLDSA_REG_MLDSA_SIGNATURE_93 (32'hcac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_94 (32'h10030cb0) +`define MLDSA_REG_MLDSA_SIGNATURE_94 (32'hcb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_95 (32'h10030cb4) +`define MLDSA_REG_MLDSA_SIGNATURE_95 (32'hcb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_96 (32'h10030cb8) +`define MLDSA_REG_MLDSA_SIGNATURE_96 (32'hcb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_97 (32'h10030cbc) +`define MLDSA_REG_MLDSA_SIGNATURE_97 (32'hcbc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_98 (32'h10030cc0) +`define MLDSA_REG_MLDSA_SIGNATURE_98 (32'hcc0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_99 (32'h10030cc4) +`define MLDSA_REG_MLDSA_SIGNATURE_99 (32'hcc4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_100 (32'h10030cc8) +`define MLDSA_REG_MLDSA_SIGNATURE_100 (32'hcc8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_101 (32'h10030ccc) +`define MLDSA_REG_MLDSA_SIGNATURE_101 (32'hccc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_102 (32'h10030cd0) +`define MLDSA_REG_MLDSA_SIGNATURE_102 (32'hcd0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_103 (32'h10030cd4) +`define MLDSA_REG_MLDSA_SIGNATURE_103 (32'hcd4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_104 (32'h10030cd8) +`define MLDSA_REG_MLDSA_SIGNATURE_104 (32'hcd8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_105 (32'h10030cdc) +`define MLDSA_REG_MLDSA_SIGNATURE_105 (32'hcdc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_106 (32'h10030ce0) +`define MLDSA_REG_MLDSA_SIGNATURE_106 (32'hce0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_107 (32'h10030ce4) +`define MLDSA_REG_MLDSA_SIGNATURE_107 (32'hce4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_108 (32'h10030ce8) +`define MLDSA_REG_MLDSA_SIGNATURE_108 (32'hce8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_109 (32'h10030cec) +`define MLDSA_REG_MLDSA_SIGNATURE_109 (32'hcec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_110 (32'h10030cf0) +`define MLDSA_REG_MLDSA_SIGNATURE_110 (32'hcf0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_111 (32'h10030cf4) +`define MLDSA_REG_MLDSA_SIGNATURE_111 (32'hcf4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_112 (32'h10030cf8) +`define MLDSA_REG_MLDSA_SIGNATURE_112 (32'hcf8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_113 (32'h10030cfc) +`define MLDSA_REG_MLDSA_SIGNATURE_113 (32'hcfc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_114 (32'h10030d00) +`define MLDSA_REG_MLDSA_SIGNATURE_114 (32'hd00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_115 (32'h10030d04) +`define MLDSA_REG_MLDSA_SIGNATURE_115 (32'hd04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_116 (32'h10030d08) +`define MLDSA_REG_MLDSA_SIGNATURE_116 (32'hd08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_117 (32'h10030d0c) +`define MLDSA_REG_MLDSA_SIGNATURE_117 (32'hd0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_118 (32'h10030d10) +`define MLDSA_REG_MLDSA_SIGNATURE_118 (32'hd10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_119 (32'h10030d14) +`define MLDSA_REG_MLDSA_SIGNATURE_119 (32'hd14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_120 (32'h10030d18) +`define MLDSA_REG_MLDSA_SIGNATURE_120 (32'hd18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_121 (32'h10030d1c) +`define MLDSA_REG_MLDSA_SIGNATURE_121 (32'hd1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_122 (32'h10030d20) +`define MLDSA_REG_MLDSA_SIGNATURE_122 (32'hd20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_123 (32'h10030d24) +`define MLDSA_REG_MLDSA_SIGNATURE_123 (32'hd24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_124 (32'h10030d28) +`define MLDSA_REG_MLDSA_SIGNATURE_124 (32'hd28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_125 (32'h10030d2c) +`define MLDSA_REG_MLDSA_SIGNATURE_125 (32'hd2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_126 (32'h10030d30) +`define MLDSA_REG_MLDSA_SIGNATURE_126 (32'hd30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_127 (32'h10030d34) +`define MLDSA_REG_MLDSA_SIGNATURE_127 (32'hd34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_128 (32'h10030d38) +`define MLDSA_REG_MLDSA_SIGNATURE_128 (32'hd38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_129 (32'h10030d3c) +`define MLDSA_REG_MLDSA_SIGNATURE_129 (32'hd3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_130 (32'h10030d40) +`define MLDSA_REG_MLDSA_SIGNATURE_130 (32'hd40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_131 (32'h10030d44) +`define MLDSA_REG_MLDSA_SIGNATURE_131 (32'hd44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_132 (32'h10030d48) +`define MLDSA_REG_MLDSA_SIGNATURE_132 (32'hd48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_133 (32'h10030d4c) +`define MLDSA_REG_MLDSA_SIGNATURE_133 (32'hd4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_134 (32'h10030d50) +`define MLDSA_REG_MLDSA_SIGNATURE_134 (32'hd50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_135 (32'h10030d54) +`define MLDSA_REG_MLDSA_SIGNATURE_135 (32'hd54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_136 (32'h10030d58) +`define MLDSA_REG_MLDSA_SIGNATURE_136 (32'hd58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_137 (32'h10030d5c) +`define MLDSA_REG_MLDSA_SIGNATURE_137 (32'hd5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_138 (32'h10030d60) +`define MLDSA_REG_MLDSA_SIGNATURE_138 (32'hd60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_139 (32'h10030d64) +`define MLDSA_REG_MLDSA_SIGNATURE_139 (32'hd64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_140 (32'h10030d68) +`define MLDSA_REG_MLDSA_SIGNATURE_140 (32'hd68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_141 (32'h10030d6c) +`define MLDSA_REG_MLDSA_SIGNATURE_141 (32'hd6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_142 (32'h10030d70) +`define MLDSA_REG_MLDSA_SIGNATURE_142 (32'hd70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_143 (32'h10030d74) +`define MLDSA_REG_MLDSA_SIGNATURE_143 (32'hd74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_144 (32'h10030d78) +`define MLDSA_REG_MLDSA_SIGNATURE_144 (32'hd78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_145 (32'h10030d7c) +`define MLDSA_REG_MLDSA_SIGNATURE_145 (32'hd7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_146 (32'h10030d80) +`define MLDSA_REG_MLDSA_SIGNATURE_146 (32'hd80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_147 (32'h10030d84) +`define MLDSA_REG_MLDSA_SIGNATURE_147 (32'hd84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_148 (32'h10030d88) +`define MLDSA_REG_MLDSA_SIGNATURE_148 (32'hd88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_149 (32'h10030d8c) +`define MLDSA_REG_MLDSA_SIGNATURE_149 (32'hd8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_150 (32'h10030d90) +`define MLDSA_REG_MLDSA_SIGNATURE_150 (32'hd90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_151 (32'h10030d94) +`define MLDSA_REG_MLDSA_SIGNATURE_151 (32'hd94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_152 (32'h10030d98) +`define MLDSA_REG_MLDSA_SIGNATURE_152 (32'hd98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_153 (32'h10030d9c) +`define MLDSA_REG_MLDSA_SIGNATURE_153 (32'hd9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_154 (32'h10030da0) +`define MLDSA_REG_MLDSA_SIGNATURE_154 (32'hda0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_155 (32'h10030da4) +`define MLDSA_REG_MLDSA_SIGNATURE_155 (32'hda4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_156 (32'h10030da8) +`define MLDSA_REG_MLDSA_SIGNATURE_156 (32'hda8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_157 (32'h10030dac) +`define MLDSA_REG_MLDSA_SIGNATURE_157 (32'hdac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_158 (32'h10030db0) +`define MLDSA_REG_MLDSA_SIGNATURE_158 (32'hdb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_159 (32'h10030db4) +`define MLDSA_REG_MLDSA_SIGNATURE_159 (32'hdb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_160 (32'h10030db8) +`define MLDSA_REG_MLDSA_SIGNATURE_160 (32'hdb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_161 (32'h10030dbc) +`define MLDSA_REG_MLDSA_SIGNATURE_161 (32'hdbc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_162 (32'h10030dc0) +`define MLDSA_REG_MLDSA_SIGNATURE_162 (32'hdc0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_163 (32'h10030dc4) +`define MLDSA_REG_MLDSA_SIGNATURE_163 (32'hdc4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_164 (32'h10030dc8) +`define MLDSA_REG_MLDSA_SIGNATURE_164 (32'hdc8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_165 (32'h10030dcc) +`define MLDSA_REG_MLDSA_SIGNATURE_165 (32'hdcc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_166 (32'h10030dd0) +`define MLDSA_REG_MLDSA_SIGNATURE_166 (32'hdd0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_167 (32'h10030dd4) +`define MLDSA_REG_MLDSA_SIGNATURE_167 (32'hdd4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_168 (32'h10030dd8) +`define MLDSA_REG_MLDSA_SIGNATURE_168 (32'hdd8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_169 (32'h10030ddc) +`define MLDSA_REG_MLDSA_SIGNATURE_169 (32'hddc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_170 (32'h10030de0) +`define MLDSA_REG_MLDSA_SIGNATURE_170 (32'hde0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_171 (32'h10030de4) +`define MLDSA_REG_MLDSA_SIGNATURE_171 (32'hde4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_172 (32'h10030de8) +`define MLDSA_REG_MLDSA_SIGNATURE_172 (32'hde8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_173 (32'h10030dec) +`define MLDSA_REG_MLDSA_SIGNATURE_173 (32'hdec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_174 (32'h10030df0) +`define MLDSA_REG_MLDSA_SIGNATURE_174 (32'hdf0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_175 (32'h10030df4) +`define MLDSA_REG_MLDSA_SIGNATURE_175 (32'hdf4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_176 (32'h10030df8) +`define MLDSA_REG_MLDSA_SIGNATURE_176 (32'hdf8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_177 (32'h10030dfc) +`define MLDSA_REG_MLDSA_SIGNATURE_177 (32'hdfc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_178 (32'h10030e00) +`define MLDSA_REG_MLDSA_SIGNATURE_178 (32'he00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_179 (32'h10030e04) +`define MLDSA_REG_MLDSA_SIGNATURE_179 (32'he04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_180 (32'h10030e08) +`define MLDSA_REG_MLDSA_SIGNATURE_180 (32'he08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_181 (32'h10030e0c) +`define MLDSA_REG_MLDSA_SIGNATURE_181 (32'he0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_182 (32'h10030e10) +`define MLDSA_REG_MLDSA_SIGNATURE_182 (32'he10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_183 (32'h10030e14) +`define MLDSA_REG_MLDSA_SIGNATURE_183 (32'he14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_184 (32'h10030e18) +`define MLDSA_REG_MLDSA_SIGNATURE_184 (32'he18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_185 (32'h10030e1c) +`define MLDSA_REG_MLDSA_SIGNATURE_185 (32'he1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_186 (32'h10030e20) +`define MLDSA_REG_MLDSA_SIGNATURE_186 (32'he20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_187 (32'h10030e24) +`define MLDSA_REG_MLDSA_SIGNATURE_187 (32'he24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_188 (32'h10030e28) +`define MLDSA_REG_MLDSA_SIGNATURE_188 (32'he28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_189 (32'h10030e2c) +`define MLDSA_REG_MLDSA_SIGNATURE_189 (32'he2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_190 (32'h10030e30) +`define MLDSA_REG_MLDSA_SIGNATURE_190 (32'he30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_191 (32'h10030e34) +`define MLDSA_REG_MLDSA_SIGNATURE_191 (32'he34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_192 (32'h10030e38) +`define MLDSA_REG_MLDSA_SIGNATURE_192 (32'he38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_193 (32'h10030e3c) +`define MLDSA_REG_MLDSA_SIGNATURE_193 (32'he3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_194 (32'h10030e40) +`define MLDSA_REG_MLDSA_SIGNATURE_194 (32'he40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_195 (32'h10030e44) +`define MLDSA_REG_MLDSA_SIGNATURE_195 (32'he44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_196 (32'h10030e48) +`define MLDSA_REG_MLDSA_SIGNATURE_196 (32'he48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_197 (32'h10030e4c) +`define MLDSA_REG_MLDSA_SIGNATURE_197 (32'he4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_198 (32'h10030e50) +`define MLDSA_REG_MLDSA_SIGNATURE_198 (32'he50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_199 (32'h10030e54) +`define MLDSA_REG_MLDSA_SIGNATURE_199 (32'he54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_200 (32'h10030e58) +`define MLDSA_REG_MLDSA_SIGNATURE_200 (32'he58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_201 (32'h10030e5c) +`define MLDSA_REG_MLDSA_SIGNATURE_201 (32'he5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_202 (32'h10030e60) +`define MLDSA_REG_MLDSA_SIGNATURE_202 (32'he60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_203 (32'h10030e64) +`define MLDSA_REG_MLDSA_SIGNATURE_203 (32'he64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_204 (32'h10030e68) +`define MLDSA_REG_MLDSA_SIGNATURE_204 (32'he68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_205 (32'h10030e6c) +`define MLDSA_REG_MLDSA_SIGNATURE_205 (32'he6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_206 (32'h10030e70) +`define MLDSA_REG_MLDSA_SIGNATURE_206 (32'he70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_207 (32'h10030e74) +`define MLDSA_REG_MLDSA_SIGNATURE_207 (32'he74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_208 (32'h10030e78) +`define MLDSA_REG_MLDSA_SIGNATURE_208 (32'he78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_209 (32'h10030e7c) +`define MLDSA_REG_MLDSA_SIGNATURE_209 (32'he7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_210 (32'h10030e80) +`define MLDSA_REG_MLDSA_SIGNATURE_210 (32'he80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_211 (32'h10030e84) +`define MLDSA_REG_MLDSA_SIGNATURE_211 (32'he84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_212 (32'h10030e88) +`define MLDSA_REG_MLDSA_SIGNATURE_212 (32'he88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_213 (32'h10030e8c) +`define MLDSA_REG_MLDSA_SIGNATURE_213 (32'he8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_214 (32'h10030e90) +`define MLDSA_REG_MLDSA_SIGNATURE_214 (32'he90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_215 (32'h10030e94) +`define MLDSA_REG_MLDSA_SIGNATURE_215 (32'he94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_216 (32'h10030e98) +`define MLDSA_REG_MLDSA_SIGNATURE_216 (32'he98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_217 (32'h10030e9c) +`define MLDSA_REG_MLDSA_SIGNATURE_217 (32'he9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_218 (32'h10030ea0) +`define MLDSA_REG_MLDSA_SIGNATURE_218 (32'hea0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_219 (32'h10030ea4) +`define MLDSA_REG_MLDSA_SIGNATURE_219 (32'hea4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_220 (32'h10030ea8) +`define MLDSA_REG_MLDSA_SIGNATURE_220 (32'hea8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_221 (32'h10030eac) +`define MLDSA_REG_MLDSA_SIGNATURE_221 (32'heac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_222 (32'h10030eb0) +`define MLDSA_REG_MLDSA_SIGNATURE_222 (32'heb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_223 (32'h10030eb4) +`define MLDSA_REG_MLDSA_SIGNATURE_223 (32'heb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_224 (32'h10030eb8) +`define MLDSA_REG_MLDSA_SIGNATURE_224 (32'heb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_225 (32'h10030ebc) +`define MLDSA_REG_MLDSA_SIGNATURE_225 (32'hebc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_226 (32'h10030ec0) +`define MLDSA_REG_MLDSA_SIGNATURE_226 (32'hec0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_227 (32'h10030ec4) +`define MLDSA_REG_MLDSA_SIGNATURE_227 (32'hec4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_228 (32'h10030ec8) +`define MLDSA_REG_MLDSA_SIGNATURE_228 (32'hec8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_229 (32'h10030ecc) +`define MLDSA_REG_MLDSA_SIGNATURE_229 (32'hecc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_230 (32'h10030ed0) +`define MLDSA_REG_MLDSA_SIGNATURE_230 (32'hed0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_231 (32'h10030ed4) +`define MLDSA_REG_MLDSA_SIGNATURE_231 (32'hed4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_232 (32'h10030ed8) +`define MLDSA_REG_MLDSA_SIGNATURE_232 (32'hed8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_233 (32'h10030edc) +`define MLDSA_REG_MLDSA_SIGNATURE_233 (32'hedc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_234 (32'h10030ee0) +`define MLDSA_REG_MLDSA_SIGNATURE_234 (32'hee0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_235 (32'h10030ee4) +`define MLDSA_REG_MLDSA_SIGNATURE_235 (32'hee4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_236 (32'h10030ee8) +`define MLDSA_REG_MLDSA_SIGNATURE_236 (32'hee8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_237 (32'h10030eec) +`define MLDSA_REG_MLDSA_SIGNATURE_237 (32'heec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_238 (32'h10030ef0) +`define MLDSA_REG_MLDSA_SIGNATURE_238 (32'hef0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_239 (32'h10030ef4) +`define MLDSA_REG_MLDSA_SIGNATURE_239 (32'hef4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_240 (32'h10030ef8) +`define MLDSA_REG_MLDSA_SIGNATURE_240 (32'hef8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_241 (32'h10030efc) +`define MLDSA_REG_MLDSA_SIGNATURE_241 (32'hefc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_242 (32'h10030f00) +`define MLDSA_REG_MLDSA_SIGNATURE_242 (32'hf00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_243 (32'h10030f04) +`define MLDSA_REG_MLDSA_SIGNATURE_243 (32'hf04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_244 (32'h10030f08) +`define MLDSA_REG_MLDSA_SIGNATURE_244 (32'hf08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_245 (32'h10030f0c) +`define MLDSA_REG_MLDSA_SIGNATURE_245 (32'hf0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_246 (32'h10030f10) +`define MLDSA_REG_MLDSA_SIGNATURE_246 (32'hf10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_247 (32'h10030f14) +`define MLDSA_REG_MLDSA_SIGNATURE_247 (32'hf14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_248 (32'h10030f18) +`define MLDSA_REG_MLDSA_SIGNATURE_248 (32'hf18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_249 (32'h10030f1c) +`define MLDSA_REG_MLDSA_SIGNATURE_249 (32'hf1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_250 (32'h10030f20) +`define MLDSA_REG_MLDSA_SIGNATURE_250 (32'hf20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_251 (32'h10030f24) +`define MLDSA_REG_MLDSA_SIGNATURE_251 (32'hf24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_252 (32'h10030f28) +`define MLDSA_REG_MLDSA_SIGNATURE_252 (32'hf28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_253 (32'h10030f2c) +`define MLDSA_REG_MLDSA_SIGNATURE_253 (32'hf2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_254 (32'h10030f30) +`define MLDSA_REG_MLDSA_SIGNATURE_254 (32'hf30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_255 (32'h10030f34) +`define MLDSA_REG_MLDSA_SIGNATURE_255 (32'hf34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_256 (32'h10030f38) +`define MLDSA_REG_MLDSA_SIGNATURE_256 (32'hf38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_257 (32'h10030f3c) +`define MLDSA_REG_MLDSA_SIGNATURE_257 (32'hf3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_258 (32'h10030f40) +`define MLDSA_REG_MLDSA_SIGNATURE_258 (32'hf40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_259 (32'h10030f44) +`define MLDSA_REG_MLDSA_SIGNATURE_259 (32'hf44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_260 (32'h10030f48) +`define MLDSA_REG_MLDSA_SIGNATURE_260 (32'hf48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_261 (32'h10030f4c) +`define MLDSA_REG_MLDSA_SIGNATURE_261 (32'hf4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_262 (32'h10030f50) +`define MLDSA_REG_MLDSA_SIGNATURE_262 (32'hf50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_263 (32'h10030f54) +`define MLDSA_REG_MLDSA_SIGNATURE_263 (32'hf54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_264 (32'h10030f58) +`define MLDSA_REG_MLDSA_SIGNATURE_264 (32'hf58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_265 (32'h10030f5c) +`define MLDSA_REG_MLDSA_SIGNATURE_265 (32'hf5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_266 (32'h10030f60) +`define MLDSA_REG_MLDSA_SIGNATURE_266 (32'hf60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_267 (32'h10030f64) +`define MLDSA_REG_MLDSA_SIGNATURE_267 (32'hf64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_268 (32'h10030f68) +`define MLDSA_REG_MLDSA_SIGNATURE_268 (32'hf68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_269 (32'h10030f6c) +`define MLDSA_REG_MLDSA_SIGNATURE_269 (32'hf6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_270 (32'h10030f70) +`define MLDSA_REG_MLDSA_SIGNATURE_270 (32'hf70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_271 (32'h10030f74) +`define MLDSA_REG_MLDSA_SIGNATURE_271 (32'hf74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_272 (32'h10030f78) +`define MLDSA_REG_MLDSA_SIGNATURE_272 (32'hf78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_273 (32'h10030f7c) +`define MLDSA_REG_MLDSA_SIGNATURE_273 (32'hf7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_274 (32'h10030f80) +`define MLDSA_REG_MLDSA_SIGNATURE_274 (32'hf80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_275 (32'h10030f84) +`define MLDSA_REG_MLDSA_SIGNATURE_275 (32'hf84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_276 (32'h10030f88) +`define MLDSA_REG_MLDSA_SIGNATURE_276 (32'hf88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_277 (32'h10030f8c) +`define MLDSA_REG_MLDSA_SIGNATURE_277 (32'hf8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_278 (32'h10030f90) +`define MLDSA_REG_MLDSA_SIGNATURE_278 (32'hf90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_279 (32'h10030f94) +`define MLDSA_REG_MLDSA_SIGNATURE_279 (32'hf94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_280 (32'h10030f98) +`define MLDSA_REG_MLDSA_SIGNATURE_280 (32'hf98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_281 (32'h10030f9c) +`define MLDSA_REG_MLDSA_SIGNATURE_281 (32'hf9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_282 (32'h10030fa0) +`define MLDSA_REG_MLDSA_SIGNATURE_282 (32'hfa0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_283 (32'h10030fa4) +`define MLDSA_REG_MLDSA_SIGNATURE_283 (32'hfa4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_284 (32'h10030fa8) +`define MLDSA_REG_MLDSA_SIGNATURE_284 (32'hfa8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_285 (32'h10030fac) +`define MLDSA_REG_MLDSA_SIGNATURE_285 (32'hfac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_286 (32'h10030fb0) +`define MLDSA_REG_MLDSA_SIGNATURE_286 (32'hfb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_287 (32'h10030fb4) +`define MLDSA_REG_MLDSA_SIGNATURE_287 (32'hfb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_288 (32'h10030fb8) +`define MLDSA_REG_MLDSA_SIGNATURE_288 (32'hfb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_289 (32'h10030fbc) +`define MLDSA_REG_MLDSA_SIGNATURE_289 (32'hfbc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_290 (32'h10030fc0) +`define MLDSA_REG_MLDSA_SIGNATURE_290 (32'hfc0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_291 (32'h10030fc4) +`define MLDSA_REG_MLDSA_SIGNATURE_291 (32'hfc4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_292 (32'h10030fc8) +`define MLDSA_REG_MLDSA_SIGNATURE_292 (32'hfc8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_293 (32'h10030fcc) +`define MLDSA_REG_MLDSA_SIGNATURE_293 (32'hfcc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_294 (32'h10030fd0) +`define MLDSA_REG_MLDSA_SIGNATURE_294 (32'hfd0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_295 (32'h10030fd4) +`define MLDSA_REG_MLDSA_SIGNATURE_295 (32'hfd4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_296 (32'h10030fd8) +`define MLDSA_REG_MLDSA_SIGNATURE_296 (32'hfd8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_297 (32'h10030fdc) +`define MLDSA_REG_MLDSA_SIGNATURE_297 (32'hfdc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_298 (32'h10030fe0) +`define MLDSA_REG_MLDSA_SIGNATURE_298 (32'hfe0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_299 (32'h10030fe4) +`define MLDSA_REG_MLDSA_SIGNATURE_299 (32'hfe4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_300 (32'h10030fe8) +`define MLDSA_REG_MLDSA_SIGNATURE_300 (32'hfe8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_301 (32'h10030fec) +`define MLDSA_REG_MLDSA_SIGNATURE_301 (32'hfec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_302 (32'h10030ff0) +`define MLDSA_REG_MLDSA_SIGNATURE_302 (32'hff0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_303 (32'h10030ff4) +`define MLDSA_REG_MLDSA_SIGNATURE_303 (32'hff4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_304 (32'h10030ff8) +`define MLDSA_REG_MLDSA_SIGNATURE_304 (32'hff8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_305 (32'h10030ffc) +`define MLDSA_REG_MLDSA_SIGNATURE_305 (32'hffc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_306 (32'h10031000) +`define MLDSA_REG_MLDSA_SIGNATURE_306 (32'h1000) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_307 (32'h10031004) +`define MLDSA_REG_MLDSA_SIGNATURE_307 (32'h1004) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_308 (32'h10031008) +`define MLDSA_REG_MLDSA_SIGNATURE_308 (32'h1008) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_309 (32'h1003100c) +`define MLDSA_REG_MLDSA_SIGNATURE_309 (32'h100c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_310 (32'h10031010) +`define MLDSA_REG_MLDSA_SIGNATURE_310 (32'h1010) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_311 (32'h10031014) +`define MLDSA_REG_MLDSA_SIGNATURE_311 (32'h1014) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_312 (32'h10031018) +`define MLDSA_REG_MLDSA_SIGNATURE_312 (32'h1018) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_313 (32'h1003101c) +`define MLDSA_REG_MLDSA_SIGNATURE_313 (32'h101c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_314 (32'h10031020) +`define MLDSA_REG_MLDSA_SIGNATURE_314 (32'h1020) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_315 (32'h10031024) +`define MLDSA_REG_MLDSA_SIGNATURE_315 (32'h1024) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_316 (32'h10031028) +`define MLDSA_REG_MLDSA_SIGNATURE_316 (32'h1028) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_317 (32'h1003102c) +`define MLDSA_REG_MLDSA_SIGNATURE_317 (32'h102c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_318 (32'h10031030) +`define MLDSA_REG_MLDSA_SIGNATURE_318 (32'h1030) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_319 (32'h10031034) +`define MLDSA_REG_MLDSA_SIGNATURE_319 (32'h1034) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_320 (32'h10031038) +`define MLDSA_REG_MLDSA_SIGNATURE_320 (32'h1038) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_321 (32'h1003103c) +`define MLDSA_REG_MLDSA_SIGNATURE_321 (32'h103c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_322 (32'h10031040) +`define MLDSA_REG_MLDSA_SIGNATURE_322 (32'h1040) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_323 (32'h10031044) +`define MLDSA_REG_MLDSA_SIGNATURE_323 (32'h1044) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_324 (32'h10031048) +`define MLDSA_REG_MLDSA_SIGNATURE_324 (32'h1048) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_325 (32'h1003104c) +`define MLDSA_REG_MLDSA_SIGNATURE_325 (32'h104c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_326 (32'h10031050) +`define MLDSA_REG_MLDSA_SIGNATURE_326 (32'h1050) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_327 (32'h10031054) +`define MLDSA_REG_MLDSA_SIGNATURE_327 (32'h1054) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_328 (32'h10031058) +`define MLDSA_REG_MLDSA_SIGNATURE_328 (32'h1058) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_329 (32'h1003105c) +`define MLDSA_REG_MLDSA_SIGNATURE_329 (32'h105c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_330 (32'h10031060) +`define MLDSA_REG_MLDSA_SIGNATURE_330 (32'h1060) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_331 (32'h10031064) +`define MLDSA_REG_MLDSA_SIGNATURE_331 (32'h1064) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_332 (32'h10031068) +`define MLDSA_REG_MLDSA_SIGNATURE_332 (32'h1068) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_333 (32'h1003106c) +`define MLDSA_REG_MLDSA_SIGNATURE_333 (32'h106c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_334 (32'h10031070) +`define MLDSA_REG_MLDSA_SIGNATURE_334 (32'h1070) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_335 (32'h10031074) +`define MLDSA_REG_MLDSA_SIGNATURE_335 (32'h1074) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_336 (32'h10031078) +`define MLDSA_REG_MLDSA_SIGNATURE_336 (32'h1078) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_337 (32'h1003107c) +`define MLDSA_REG_MLDSA_SIGNATURE_337 (32'h107c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_338 (32'h10031080) +`define MLDSA_REG_MLDSA_SIGNATURE_338 (32'h1080) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_339 (32'h10031084) +`define MLDSA_REG_MLDSA_SIGNATURE_339 (32'h1084) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_340 (32'h10031088) +`define MLDSA_REG_MLDSA_SIGNATURE_340 (32'h1088) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_341 (32'h1003108c) +`define MLDSA_REG_MLDSA_SIGNATURE_341 (32'h108c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_342 (32'h10031090) +`define MLDSA_REG_MLDSA_SIGNATURE_342 (32'h1090) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_343 (32'h10031094) +`define MLDSA_REG_MLDSA_SIGNATURE_343 (32'h1094) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_344 (32'h10031098) +`define MLDSA_REG_MLDSA_SIGNATURE_344 (32'h1098) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_345 (32'h1003109c) +`define MLDSA_REG_MLDSA_SIGNATURE_345 (32'h109c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_346 (32'h100310a0) +`define MLDSA_REG_MLDSA_SIGNATURE_346 (32'h10a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_347 (32'h100310a4) +`define MLDSA_REG_MLDSA_SIGNATURE_347 (32'h10a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_348 (32'h100310a8) +`define MLDSA_REG_MLDSA_SIGNATURE_348 (32'h10a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_349 (32'h100310ac) +`define MLDSA_REG_MLDSA_SIGNATURE_349 (32'h10ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_350 (32'h100310b0) +`define MLDSA_REG_MLDSA_SIGNATURE_350 (32'h10b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_351 (32'h100310b4) +`define MLDSA_REG_MLDSA_SIGNATURE_351 (32'h10b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_352 (32'h100310b8) +`define MLDSA_REG_MLDSA_SIGNATURE_352 (32'h10b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_353 (32'h100310bc) +`define MLDSA_REG_MLDSA_SIGNATURE_353 (32'h10bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_354 (32'h100310c0) +`define MLDSA_REG_MLDSA_SIGNATURE_354 (32'h10c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_355 (32'h100310c4) +`define MLDSA_REG_MLDSA_SIGNATURE_355 (32'h10c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_356 (32'h100310c8) +`define MLDSA_REG_MLDSA_SIGNATURE_356 (32'h10c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_357 (32'h100310cc) +`define MLDSA_REG_MLDSA_SIGNATURE_357 (32'h10cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_358 (32'h100310d0) +`define MLDSA_REG_MLDSA_SIGNATURE_358 (32'h10d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_359 (32'h100310d4) +`define MLDSA_REG_MLDSA_SIGNATURE_359 (32'h10d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_360 (32'h100310d8) +`define MLDSA_REG_MLDSA_SIGNATURE_360 (32'h10d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_361 (32'h100310dc) +`define MLDSA_REG_MLDSA_SIGNATURE_361 (32'h10dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_362 (32'h100310e0) +`define MLDSA_REG_MLDSA_SIGNATURE_362 (32'h10e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_363 (32'h100310e4) +`define MLDSA_REG_MLDSA_SIGNATURE_363 (32'h10e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_364 (32'h100310e8) +`define MLDSA_REG_MLDSA_SIGNATURE_364 (32'h10e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_365 (32'h100310ec) +`define MLDSA_REG_MLDSA_SIGNATURE_365 (32'h10ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_366 (32'h100310f0) +`define MLDSA_REG_MLDSA_SIGNATURE_366 (32'h10f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_367 (32'h100310f4) +`define MLDSA_REG_MLDSA_SIGNATURE_367 (32'h10f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_368 (32'h100310f8) +`define MLDSA_REG_MLDSA_SIGNATURE_368 (32'h10f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_369 (32'h100310fc) +`define MLDSA_REG_MLDSA_SIGNATURE_369 (32'h10fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_370 (32'h10031100) +`define MLDSA_REG_MLDSA_SIGNATURE_370 (32'h1100) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_371 (32'h10031104) +`define MLDSA_REG_MLDSA_SIGNATURE_371 (32'h1104) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_372 (32'h10031108) +`define MLDSA_REG_MLDSA_SIGNATURE_372 (32'h1108) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_373 (32'h1003110c) +`define MLDSA_REG_MLDSA_SIGNATURE_373 (32'h110c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_374 (32'h10031110) +`define MLDSA_REG_MLDSA_SIGNATURE_374 (32'h1110) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_375 (32'h10031114) +`define MLDSA_REG_MLDSA_SIGNATURE_375 (32'h1114) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_376 (32'h10031118) +`define MLDSA_REG_MLDSA_SIGNATURE_376 (32'h1118) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_377 (32'h1003111c) +`define MLDSA_REG_MLDSA_SIGNATURE_377 (32'h111c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_378 (32'h10031120) +`define MLDSA_REG_MLDSA_SIGNATURE_378 (32'h1120) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_379 (32'h10031124) +`define MLDSA_REG_MLDSA_SIGNATURE_379 (32'h1124) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_380 (32'h10031128) +`define MLDSA_REG_MLDSA_SIGNATURE_380 (32'h1128) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_381 (32'h1003112c) +`define MLDSA_REG_MLDSA_SIGNATURE_381 (32'h112c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_382 (32'h10031130) +`define MLDSA_REG_MLDSA_SIGNATURE_382 (32'h1130) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_383 (32'h10031134) +`define MLDSA_REG_MLDSA_SIGNATURE_383 (32'h1134) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_384 (32'h10031138) +`define MLDSA_REG_MLDSA_SIGNATURE_384 (32'h1138) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_385 (32'h1003113c) +`define MLDSA_REG_MLDSA_SIGNATURE_385 (32'h113c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_386 (32'h10031140) +`define MLDSA_REG_MLDSA_SIGNATURE_386 (32'h1140) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_387 (32'h10031144) +`define MLDSA_REG_MLDSA_SIGNATURE_387 (32'h1144) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_388 (32'h10031148) +`define MLDSA_REG_MLDSA_SIGNATURE_388 (32'h1148) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_389 (32'h1003114c) +`define MLDSA_REG_MLDSA_SIGNATURE_389 (32'h114c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_390 (32'h10031150) +`define MLDSA_REG_MLDSA_SIGNATURE_390 (32'h1150) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_391 (32'h10031154) +`define MLDSA_REG_MLDSA_SIGNATURE_391 (32'h1154) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_392 (32'h10031158) +`define MLDSA_REG_MLDSA_SIGNATURE_392 (32'h1158) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_393 (32'h1003115c) +`define MLDSA_REG_MLDSA_SIGNATURE_393 (32'h115c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_394 (32'h10031160) +`define MLDSA_REG_MLDSA_SIGNATURE_394 (32'h1160) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_395 (32'h10031164) +`define MLDSA_REG_MLDSA_SIGNATURE_395 (32'h1164) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_396 (32'h10031168) +`define MLDSA_REG_MLDSA_SIGNATURE_396 (32'h1168) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_397 (32'h1003116c) +`define MLDSA_REG_MLDSA_SIGNATURE_397 (32'h116c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_398 (32'h10031170) +`define MLDSA_REG_MLDSA_SIGNATURE_398 (32'h1170) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_399 (32'h10031174) +`define MLDSA_REG_MLDSA_SIGNATURE_399 (32'h1174) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_400 (32'h10031178) +`define MLDSA_REG_MLDSA_SIGNATURE_400 (32'h1178) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_401 (32'h1003117c) +`define MLDSA_REG_MLDSA_SIGNATURE_401 (32'h117c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_402 (32'h10031180) +`define MLDSA_REG_MLDSA_SIGNATURE_402 (32'h1180) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_403 (32'h10031184) +`define MLDSA_REG_MLDSA_SIGNATURE_403 (32'h1184) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_404 (32'h10031188) +`define MLDSA_REG_MLDSA_SIGNATURE_404 (32'h1188) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_405 (32'h1003118c) +`define MLDSA_REG_MLDSA_SIGNATURE_405 (32'h118c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_406 (32'h10031190) +`define MLDSA_REG_MLDSA_SIGNATURE_406 (32'h1190) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_407 (32'h10031194) +`define MLDSA_REG_MLDSA_SIGNATURE_407 (32'h1194) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_408 (32'h10031198) +`define MLDSA_REG_MLDSA_SIGNATURE_408 (32'h1198) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_409 (32'h1003119c) +`define MLDSA_REG_MLDSA_SIGNATURE_409 (32'h119c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_410 (32'h100311a0) +`define MLDSA_REG_MLDSA_SIGNATURE_410 (32'h11a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_411 (32'h100311a4) +`define MLDSA_REG_MLDSA_SIGNATURE_411 (32'h11a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_412 (32'h100311a8) +`define MLDSA_REG_MLDSA_SIGNATURE_412 (32'h11a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_413 (32'h100311ac) +`define MLDSA_REG_MLDSA_SIGNATURE_413 (32'h11ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_414 (32'h100311b0) +`define MLDSA_REG_MLDSA_SIGNATURE_414 (32'h11b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_415 (32'h100311b4) +`define MLDSA_REG_MLDSA_SIGNATURE_415 (32'h11b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_416 (32'h100311b8) +`define MLDSA_REG_MLDSA_SIGNATURE_416 (32'h11b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_417 (32'h100311bc) +`define MLDSA_REG_MLDSA_SIGNATURE_417 (32'h11bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_418 (32'h100311c0) +`define MLDSA_REG_MLDSA_SIGNATURE_418 (32'h11c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_419 (32'h100311c4) +`define MLDSA_REG_MLDSA_SIGNATURE_419 (32'h11c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_420 (32'h100311c8) +`define MLDSA_REG_MLDSA_SIGNATURE_420 (32'h11c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_421 (32'h100311cc) +`define MLDSA_REG_MLDSA_SIGNATURE_421 (32'h11cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_422 (32'h100311d0) +`define MLDSA_REG_MLDSA_SIGNATURE_422 (32'h11d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_423 (32'h100311d4) +`define MLDSA_REG_MLDSA_SIGNATURE_423 (32'h11d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_424 (32'h100311d8) +`define MLDSA_REG_MLDSA_SIGNATURE_424 (32'h11d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_425 (32'h100311dc) +`define MLDSA_REG_MLDSA_SIGNATURE_425 (32'h11dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_426 (32'h100311e0) +`define MLDSA_REG_MLDSA_SIGNATURE_426 (32'h11e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_427 (32'h100311e4) +`define MLDSA_REG_MLDSA_SIGNATURE_427 (32'h11e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_428 (32'h100311e8) +`define MLDSA_REG_MLDSA_SIGNATURE_428 (32'h11e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_429 (32'h100311ec) +`define MLDSA_REG_MLDSA_SIGNATURE_429 (32'h11ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_430 (32'h100311f0) +`define MLDSA_REG_MLDSA_SIGNATURE_430 (32'h11f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_431 (32'h100311f4) +`define MLDSA_REG_MLDSA_SIGNATURE_431 (32'h11f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_432 (32'h100311f8) +`define MLDSA_REG_MLDSA_SIGNATURE_432 (32'h11f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_433 (32'h100311fc) +`define MLDSA_REG_MLDSA_SIGNATURE_433 (32'h11fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_434 (32'h10031200) +`define MLDSA_REG_MLDSA_SIGNATURE_434 (32'h1200) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_435 (32'h10031204) +`define MLDSA_REG_MLDSA_SIGNATURE_435 (32'h1204) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_436 (32'h10031208) +`define MLDSA_REG_MLDSA_SIGNATURE_436 (32'h1208) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_437 (32'h1003120c) +`define MLDSA_REG_MLDSA_SIGNATURE_437 (32'h120c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_438 (32'h10031210) +`define MLDSA_REG_MLDSA_SIGNATURE_438 (32'h1210) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_439 (32'h10031214) +`define MLDSA_REG_MLDSA_SIGNATURE_439 (32'h1214) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_440 (32'h10031218) +`define MLDSA_REG_MLDSA_SIGNATURE_440 (32'h1218) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_441 (32'h1003121c) +`define MLDSA_REG_MLDSA_SIGNATURE_441 (32'h121c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_442 (32'h10031220) +`define MLDSA_REG_MLDSA_SIGNATURE_442 (32'h1220) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_443 (32'h10031224) +`define MLDSA_REG_MLDSA_SIGNATURE_443 (32'h1224) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_444 (32'h10031228) +`define MLDSA_REG_MLDSA_SIGNATURE_444 (32'h1228) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_445 (32'h1003122c) +`define MLDSA_REG_MLDSA_SIGNATURE_445 (32'h122c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_446 (32'h10031230) +`define MLDSA_REG_MLDSA_SIGNATURE_446 (32'h1230) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_447 (32'h10031234) +`define MLDSA_REG_MLDSA_SIGNATURE_447 (32'h1234) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_448 (32'h10031238) +`define MLDSA_REG_MLDSA_SIGNATURE_448 (32'h1238) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_449 (32'h1003123c) +`define MLDSA_REG_MLDSA_SIGNATURE_449 (32'h123c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_450 (32'h10031240) +`define MLDSA_REG_MLDSA_SIGNATURE_450 (32'h1240) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_451 (32'h10031244) +`define MLDSA_REG_MLDSA_SIGNATURE_451 (32'h1244) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_452 (32'h10031248) +`define MLDSA_REG_MLDSA_SIGNATURE_452 (32'h1248) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_453 (32'h1003124c) +`define MLDSA_REG_MLDSA_SIGNATURE_453 (32'h124c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_454 (32'h10031250) +`define MLDSA_REG_MLDSA_SIGNATURE_454 (32'h1250) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_455 (32'h10031254) +`define MLDSA_REG_MLDSA_SIGNATURE_455 (32'h1254) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_456 (32'h10031258) +`define MLDSA_REG_MLDSA_SIGNATURE_456 (32'h1258) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_457 (32'h1003125c) +`define MLDSA_REG_MLDSA_SIGNATURE_457 (32'h125c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_458 (32'h10031260) +`define MLDSA_REG_MLDSA_SIGNATURE_458 (32'h1260) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_459 (32'h10031264) +`define MLDSA_REG_MLDSA_SIGNATURE_459 (32'h1264) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_460 (32'h10031268) +`define MLDSA_REG_MLDSA_SIGNATURE_460 (32'h1268) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_461 (32'h1003126c) +`define MLDSA_REG_MLDSA_SIGNATURE_461 (32'h126c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_462 (32'h10031270) +`define MLDSA_REG_MLDSA_SIGNATURE_462 (32'h1270) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_463 (32'h10031274) +`define MLDSA_REG_MLDSA_SIGNATURE_463 (32'h1274) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_464 (32'h10031278) +`define MLDSA_REG_MLDSA_SIGNATURE_464 (32'h1278) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_465 (32'h1003127c) +`define MLDSA_REG_MLDSA_SIGNATURE_465 (32'h127c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_466 (32'h10031280) +`define MLDSA_REG_MLDSA_SIGNATURE_466 (32'h1280) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_467 (32'h10031284) +`define MLDSA_REG_MLDSA_SIGNATURE_467 (32'h1284) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_468 (32'h10031288) +`define MLDSA_REG_MLDSA_SIGNATURE_468 (32'h1288) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_469 (32'h1003128c) +`define MLDSA_REG_MLDSA_SIGNATURE_469 (32'h128c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_470 (32'h10031290) +`define MLDSA_REG_MLDSA_SIGNATURE_470 (32'h1290) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_471 (32'h10031294) +`define MLDSA_REG_MLDSA_SIGNATURE_471 (32'h1294) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_472 (32'h10031298) +`define MLDSA_REG_MLDSA_SIGNATURE_472 (32'h1298) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_473 (32'h1003129c) +`define MLDSA_REG_MLDSA_SIGNATURE_473 (32'h129c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_474 (32'h100312a0) +`define MLDSA_REG_MLDSA_SIGNATURE_474 (32'h12a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_475 (32'h100312a4) +`define MLDSA_REG_MLDSA_SIGNATURE_475 (32'h12a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_476 (32'h100312a8) +`define MLDSA_REG_MLDSA_SIGNATURE_476 (32'h12a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_477 (32'h100312ac) +`define MLDSA_REG_MLDSA_SIGNATURE_477 (32'h12ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_478 (32'h100312b0) +`define MLDSA_REG_MLDSA_SIGNATURE_478 (32'h12b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_479 (32'h100312b4) +`define MLDSA_REG_MLDSA_SIGNATURE_479 (32'h12b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_480 (32'h100312b8) +`define MLDSA_REG_MLDSA_SIGNATURE_480 (32'h12b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_481 (32'h100312bc) +`define MLDSA_REG_MLDSA_SIGNATURE_481 (32'h12bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_482 (32'h100312c0) +`define MLDSA_REG_MLDSA_SIGNATURE_482 (32'h12c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_483 (32'h100312c4) +`define MLDSA_REG_MLDSA_SIGNATURE_483 (32'h12c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_484 (32'h100312c8) +`define MLDSA_REG_MLDSA_SIGNATURE_484 (32'h12c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_485 (32'h100312cc) +`define MLDSA_REG_MLDSA_SIGNATURE_485 (32'h12cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_486 (32'h100312d0) +`define MLDSA_REG_MLDSA_SIGNATURE_486 (32'h12d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_487 (32'h100312d4) +`define MLDSA_REG_MLDSA_SIGNATURE_487 (32'h12d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_488 (32'h100312d8) +`define MLDSA_REG_MLDSA_SIGNATURE_488 (32'h12d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_489 (32'h100312dc) +`define MLDSA_REG_MLDSA_SIGNATURE_489 (32'h12dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_490 (32'h100312e0) +`define MLDSA_REG_MLDSA_SIGNATURE_490 (32'h12e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_491 (32'h100312e4) +`define MLDSA_REG_MLDSA_SIGNATURE_491 (32'h12e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_492 (32'h100312e8) +`define MLDSA_REG_MLDSA_SIGNATURE_492 (32'h12e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_493 (32'h100312ec) +`define MLDSA_REG_MLDSA_SIGNATURE_493 (32'h12ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_494 (32'h100312f0) +`define MLDSA_REG_MLDSA_SIGNATURE_494 (32'h12f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_495 (32'h100312f4) +`define MLDSA_REG_MLDSA_SIGNATURE_495 (32'h12f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_496 (32'h100312f8) +`define MLDSA_REG_MLDSA_SIGNATURE_496 (32'h12f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_497 (32'h100312fc) +`define MLDSA_REG_MLDSA_SIGNATURE_497 (32'h12fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_498 (32'h10031300) +`define MLDSA_REG_MLDSA_SIGNATURE_498 (32'h1300) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_499 (32'h10031304) +`define MLDSA_REG_MLDSA_SIGNATURE_499 (32'h1304) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_500 (32'h10031308) +`define MLDSA_REG_MLDSA_SIGNATURE_500 (32'h1308) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_501 (32'h1003130c) +`define MLDSA_REG_MLDSA_SIGNATURE_501 (32'h130c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_502 (32'h10031310) +`define MLDSA_REG_MLDSA_SIGNATURE_502 (32'h1310) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_503 (32'h10031314) +`define MLDSA_REG_MLDSA_SIGNATURE_503 (32'h1314) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_504 (32'h10031318) +`define MLDSA_REG_MLDSA_SIGNATURE_504 (32'h1318) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_505 (32'h1003131c) +`define MLDSA_REG_MLDSA_SIGNATURE_505 (32'h131c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_506 (32'h10031320) +`define MLDSA_REG_MLDSA_SIGNATURE_506 (32'h1320) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_507 (32'h10031324) +`define MLDSA_REG_MLDSA_SIGNATURE_507 (32'h1324) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_508 (32'h10031328) +`define MLDSA_REG_MLDSA_SIGNATURE_508 (32'h1328) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_509 (32'h1003132c) +`define MLDSA_REG_MLDSA_SIGNATURE_509 (32'h132c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_510 (32'h10031330) +`define MLDSA_REG_MLDSA_SIGNATURE_510 (32'h1330) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_511 (32'h10031334) +`define MLDSA_REG_MLDSA_SIGNATURE_511 (32'h1334) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_512 (32'h10031338) +`define MLDSA_REG_MLDSA_SIGNATURE_512 (32'h1338) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_513 (32'h1003133c) +`define MLDSA_REG_MLDSA_SIGNATURE_513 (32'h133c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_514 (32'h10031340) +`define MLDSA_REG_MLDSA_SIGNATURE_514 (32'h1340) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_515 (32'h10031344) +`define MLDSA_REG_MLDSA_SIGNATURE_515 (32'h1344) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_516 (32'h10031348) +`define MLDSA_REG_MLDSA_SIGNATURE_516 (32'h1348) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_517 (32'h1003134c) +`define MLDSA_REG_MLDSA_SIGNATURE_517 (32'h134c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_518 (32'h10031350) +`define MLDSA_REG_MLDSA_SIGNATURE_518 (32'h1350) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_519 (32'h10031354) +`define MLDSA_REG_MLDSA_SIGNATURE_519 (32'h1354) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_520 (32'h10031358) +`define MLDSA_REG_MLDSA_SIGNATURE_520 (32'h1358) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_521 (32'h1003135c) +`define MLDSA_REG_MLDSA_SIGNATURE_521 (32'h135c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_522 (32'h10031360) +`define MLDSA_REG_MLDSA_SIGNATURE_522 (32'h1360) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_523 (32'h10031364) +`define MLDSA_REG_MLDSA_SIGNATURE_523 (32'h1364) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_524 (32'h10031368) +`define MLDSA_REG_MLDSA_SIGNATURE_524 (32'h1368) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_525 (32'h1003136c) +`define MLDSA_REG_MLDSA_SIGNATURE_525 (32'h136c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_526 (32'h10031370) +`define MLDSA_REG_MLDSA_SIGNATURE_526 (32'h1370) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_527 (32'h10031374) +`define MLDSA_REG_MLDSA_SIGNATURE_527 (32'h1374) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_528 (32'h10031378) +`define MLDSA_REG_MLDSA_SIGNATURE_528 (32'h1378) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_529 (32'h1003137c) +`define MLDSA_REG_MLDSA_SIGNATURE_529 (32'h137c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_530 (32'h10031380) +`define MLDSA_REG_MLDSA_SIGNATURE_530 (32'h1380) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_531 (32'h10031384) +`define MLDSA_REG_MLDSA_SIGNATURE_531 (32'h1384) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_532 (32'h10031388) +`define MLDSA_REG_MLDSA_SIGNATURE_532 (32'h1388) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_533 (32'h1003138c) +`define MLDSA_REG_MLDSA_SIGNATURE_533 (32'h138c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_534 (32'h10031390) +`define MLDSA_REG_MLDSA_SIGNATURE_534 (32'h1390) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_535 (32'h10031394) +`define MLDSA_REG_MLDSA_SIGNATURE_535 (32'h1394) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_536 (32'h10031398) +`define MLDSA_REG_MLDSA_SIGNATURE_536 (32'h1398) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_537 (32'h1003139c) +`define MLDSA_REG_MLDSA_SIGNATURE_537 (32'h139c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_538 (32'h100313a0) +`define MLDSA_REG_MLDSA_SIGNATURE_538 (32'h13a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_539 (32'h100313a4) +`define MLDSA_REG_MLDSA_SIGNATURE_539 (32'h13a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_540 (32'h100313a8) +`define MLDSA_REG_MLDSA_SIGNATURE_540 (32'h13a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_541 (32'h100313ac) +`define MLDSA_REG_MLDSA_SIGNATURE_541 (32'h13ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_542 (32'h100313b0) +`define MLDSA_REG_MLDSA_SIGNATURE_542 (32'h13b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_543 (32'h100313b4) +`define MLDSA_REG_MLDSA_SIGNATURE_543 (32'h13b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_544 (32'h100313b8) +`define MLDSA_REG_MLDSA_SIGNATURE_544 (32'h13b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_545 (32'h100313bc) +`define MLDSA_REG_MLDSA_SIGNATURE_545 (32'h13bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_546 (32'h100313c0) +`define MLDSA_REG_MLDSA_SIGNATURE_546 (32'h13c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_547 (32'h100313c4) +`define MLDSA_REG_MLDSA_SIGNATURE_547 (32'h13c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_548 (32'h100313c8) +`define MLDSA_REG_MLDSA_SIGNATURE_548 (32'h13c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_549 (32'h100313cc) +`define MLDSA_REG_MLDSA_SIGNATURE_549 (32'h13cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_550 (32'h100313d0) +`define MLDSA_REG_MLDSA_SIGNATURE_550 (32'h13d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_551 (32'h100313d4) +`define MLDSA_REG_MLDSA_SIGNATURE_551 (32'h13d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_552 (32'h100313d8) +`define MLDSA_REG_MLDSA_SIGNATURE_552 (32'h13d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_553 (32'h100313dc) +`define MLDSA_REG_MLDSA_SIGNATURE_553 (32'h13dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_554 (32'h100313e0) +`define MLDSA_REG_MLDSA_SIGNATURE_554 (32'h13e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_555 (32'h100313e4) +`define MLDSA_REG_MLDSA_SIGNATURE_555 (32'h13e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_556 (32'h100313e8) +`define MLDSA_REG_MLDSA_SIGNATURE_556 (32'h13e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_557 (32'h100313ec) +`define MLDSA_REG_MLDSA_SIGNATURE_557 (32'h13ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_558 (32'h100313f0) +`define MLDSA_REG_MLDSA_SIGNATURE_558 (32'h13f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_559 (32'h100313f4) +`define MLDSA_REG_MLDSA_SIGNATURE_559 (32'h13f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_560 (32'h100313f8) +`define MLDSA_REG_MLDSA_SIGNATURE_560 (32'h13f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_561 (32'h100313fc) +`define MLDSA_REG_MLDSA_SIGNATURE_561 (32'h13fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_562 (32'h10031400) +`define MLDSA_REG_MLDSA_SIGNATURE_562 (32'h1400) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_563 (32'h10031404) +`define MLDSA_REG_MLDSA_SIGNATURE_563 (32'h1404) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_564 (32'h10031408) +`define MLDSA_REG_MLDSA_SIGNATURE_564 (32'h1408) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_565 (32'h1003140c) +`define MLDSA_REG_MLDSA_SIGNATURE_565 (32'h140c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_566 (32'h10031410) +`define MLDSA_REG_MLDSA_SIGNATURE_566 (32'h1410) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_567 (32'h10031414) +`define MLDSA_REG_MLDSA_SIGNATURE_567 (32'h1414) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_568 (32'h10031418) +`define MLDSA_REG_MLDSA_SIGNATURE_568 (32'h1418) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_569 (32'h1003141c) +`define MLDSA_REG_MLDSA_SIGNATURE_569 (32'h141c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_570 (32'h10031420) +`define MLDSA_REG_MLDSA_SIGNATURE_570 (32'h1420) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_571 (32'h10031424) +`define MLDSA_REG_MLDSA_SIGNATURE_571 (32'h1424) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_572 (32'h10031428) +`define MLDSA_REG_MLDSA_SIGNATURE_572 (32'h1428) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_573 (32'h1003142c) +`define MLDSA_REG_MLDSA_SIGNATURE_573 (32'h142c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_574 (32'h10031430) +`define MLDSA_REG_MLDSA_SIGNATURE_574 (32'h1430) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_575 (32'h10031434) +`define MLDSA_REG_MLDSA_SIGNATURE_575 (32'h1434) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_576 (32'h10031438) +`define MLDSA_REG_MLDSA_SIGNATURE_576 (32'h1438) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_577 (32'h1003143c) +`define MLDSA_REG_MLDSA_SIGNATURE_577 (32'h143c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_578 (32'h10031440) +`define MLDSA_REG_MLDSA_SIGNATURE_578 (32'h1440) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_579 (32'h10031444) +`define MLDSA_REG_MLDSA_SIGNATURE_579 (32'h1444) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_580 (32'h10031448) +`define MLDSA_REG_MLDSA_SIGNATURE_580 (32'h1448) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_581 (32'h1003144c) +`define MLDSA_REG_MLDSA_SIGNATURE_581 (32'h144c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_582 (32'h10031450) +`define MLDSA_REG_MLDSA_SIGNATURE_582 (32'h1450) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_583 (32'h10031454) +`define MLDSA_REG_MLDSA_SIGNATURE_583 (32'h1454) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_584 (32'h10031458) +`define MLDSA_REG_MLDSA_SIGNATURE_584 (32'h1458) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_585 (32'h1003145c) +`define MLDSA_REG_MLDSA_SIGNATURE_585 (32'h145c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_586 (32'h10031460) +`define MLDSA_REG_MLDSA_SIGNATURE_586 (32'h1460) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_587 (32'h10031464) +`define MLDSA_REG_MLDSA_SIGNATURE_587 (32'h1464) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_588 (32'h10031468) +`define MLDSA_REG_MLDSA_SIGNATURE_588 (32'h1468) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_589 (32'h1003146c) +`define MLDSA_REG_MLDSA_SIGNATURE_589 (32'h146c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_590 (32'h10031470) +`define MLDSA_REG_MLDSA_SIGNATURE_590 (32'h1470) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_591 (32'h10031474) +`define MLDSA_REG_MLDSA_SIGNATURE_591 (32'h1474) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_592 (32'h10031478) +`define MLDSA_REG_MLDSA_SIGNATURE_592 (32'h1478) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_593 (32'h1003147c) +`define MLDSA_REG_MLDSA_SIGNATURE_593 (32'h147c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_594 (32'h10031480) +`define MLDSA_REG_MLDSA_SIGNATURE_594 (32'h1480) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_595 (32'h10031484) +`define MLDSA_REG_MLDSA_SIGNATURE_595 (32'h1484) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_596 (32'h10031488) +`define MLDSA_REG_MLDSA_SIGNATURE_596 (32'h1488) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_597 (32'h1003148c) +`define MLDSA_REG_MLDSA_SIGNATURE_597 (32'h148c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_598 (32'h10031490) +`define MLDSA_REG_MLDSA_SIGNATURE_598 (32'h1490) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_599 (32'h10031494) +`define MLDSA_REG_MLDSA_SIGNATURE_599 (32'h1494) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_600 (32'h10031498) +`define MLDSA_REG_MLDSA_SIGNATURE_600 (32'h1498) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_601 (32'h1003149c) +`define MLDSA_REG_MLDSA_SIGNATURE_601 (32'h149c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_602 (32'h100314a0) +`define MLDSA_REG_MLDSA_SIGNATURE_602 (32'h14a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_603 (32'h100314a4) +`define MLDSA_REG_MLDSA_SIGNATURE_603 (32'h14a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_604 (32'h100314a8) +`define MLDSA_REG_MLDSA_SIGNATURE_604 (32'h14a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_605 (32'h100314ac) +`define MLDSA_REG_MLDSA_SIGNATURE_605 (32'h14ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_606 (32'h100314b0) +`define MLDSA_REG_MLDSA_SIGNATURE_606 (32'h14b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_607 (32'h100314b4) +`define MLDSA_REG_MLDSA_SIGNATURE_607 (32'h14b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_608 (32'h100314b8) +`define MLDSA_REG_MLDSA_SIGNATURE_608 (32'h14b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_609 (32'h100314bc) +`define MLDSA_REG_MLDSA_SIGNATURE_609 (32'h14bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_610 (32'h100314c0) +`define MLDSA_REG_MLDSA_SIGNATURE_610 (32'h14c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_611 (32'h100314c4) +`define MLDSA_REG_MLDSA_SIGNATURE_611 (32'h14c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_612 (32'h100314c8) +`define MLDSA_REG_MLDSA_SIGNATURE_612 (32'h14c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_613 (32'h100314cc) +`define MLDSA_REG_MLDSA_SIGNATURE_613 (32'h14cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_614 (32'h100314d0) +`define MLDSA_REG_MLDSA_SIGNATURE_614 (32'h14d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_615 (32'h100314d4) +`define MLDSA_REG_MLDSA_SIGNATURE_615 (32'h14d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_616 (32'h100314d8) +`define MLDSA_REG_MLDSA_SIGNATURE_616 (32'h14d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_617 (32'h100314dc) +`define MLDSA_REG_MLDSA_SIGNATURE_617 (32'h14dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_618 (32'h100314e0) +`define MLDSA_REG_MLDSA_SIGNATURE_618 (32'h14e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_619 (32'h100314e4) +`define MLDSA_REG_MLDSA_SIGNATURE_619 (32'h14e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_620 (32'h100314e8) +`define MLDSA_REG_MLDSA_SIGNATURE_620 (32'h14e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_621 (32'h100314ec) +`define MLDSA_REG_MLDSA_SIGNATURE_621 (32'h14ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_622 (32'h100314f0) +`define MLDSA_REG_MLDSA_SIGNATURE_622 (32'h14f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_623 (32'h100314f4) +`define MLDSA_REG_MLDSA_SIGNATURE_623 (32'h14f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_624 (32'h100314f8) +`define MLDSA_REG_MLDSA_SIGNATURE_624 (32'h14f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_625 (32'h100314fc) +`define MLDSA_REG_MLDSA_SIGNATURE_625 (32'h14fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_626 (32'h10031500) +`define MLDSA_REG_MLDSA_SIGNATURE_626 (32'h1500) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_627 (32'h10031504) +`define MLDSA_REG_MLDSA_SIGNATURE_627 (32'h1504) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_628 (32'h10031508) +`define MLDSA_REG_MLDSA_SIGNATURE_628 (32'h1508) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_629 (32'h1003150c) +`define MLDSA_REG_MLDSA_SIGNATURE_629 (32'h150c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_630 (32'h10031510) +`define MLDSA_REG_MLDSA_SIGNATURE_630 (32'h1510) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_631 (32'h10031514) +`define MLDSA_REG_MLDSA_SIGNATURE_631 (32'h1514) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_632 (32'h10031518) +`define MLDSA_REG_MLDSA_SIGNATURE_632 (32'h1518) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_633 (32'h1003151c) +`define MLDSA_REG_MLDSA_SIGNATURE_633 (32'h151c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_634 (32'h10031520) +`define MLDSA_REG_MLDSA_SIGNATURE_634 (32'h1520) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_635 (32'h10031524) +`define MLDSA_REG_MLDSA_SIGNATURE_635 (32'h1524) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_636 (32'h10031528) +`define MLDSA_REG_MLDSA_SIGNATURE_636 (32'h1528) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_637 (32'h1003152c) +`define MLDSA_REG_MLDSA_SIGNATURE_637 (32'h152c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_638 (32'h10031530) +`define MLDSA_REG_MLDSA_SIGNATURE_638 (32'h1530) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_639 (32'h10031534) +`define MLDSA_REG_MLDSA_SIGNATURE_639 (32'h1534) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_640 (32'h10031538) +`define MLDSA_REG_MLDSA_SIGNATURE_640 (32'h1538) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_641 (32'h1003153c) +`define MLDSA_REG_MLDSA_SIGNATURE_641 (32'h153c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_642 (32'h10031540) +`define MLDSA_REG_MLDSA_SIGNATURE_642 (32'h1540) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_643 (32'h10031544) +`define MLDSA_REG_MLDSA_SIGNATURE_643 (32'h1544) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_644 (32'h10031548) +`define MLDSA_REG_MLDSA_SIGNATURE_644 (32'h1548) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_645 (32'h1003154c) +`define MLDSA_REG_MLDSA_SIGNATURE_645 (32'h154c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_646 (32'h10031550) +`define MLDSA_REG_MLDSA_SIGNATURE_646 (32'h1550) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_647 (32'h10031554) +`define MLDSA_REG_MLDSA_SIGNATURE_647 (32'h1554) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_648 (32'h10031558) +`define MLDSA_REG_MLDSA_SIGNATURE_648 (32'h1558) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_649 (32'h1003155c) +`define MLDSA_REG_MLDSA_SIGNATURE_649 (32'h155c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_650 (32'h10031560) +`define MLDSA_REG_MLDSA_SIGNATURE_650 (32'h1560) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_651 (32'h10031564) +`define MLDSA_REG_MLDSA_SIGNATURE_651 (32'h1564) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_652 (32'h10031568) +`define MLDSA_REG_MLDSA_SIGNATURE_652 (32'h1568) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_653 (32'h1003156c) +`define MLDSA_REG_MLDSA_SIGNATURE_653 (32'h156c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_654 (32'h10031570) +`define MLDSA_REG_MLDSA_SIGNATURE_654 (32'h1570) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_655 (32'h10031574) +`define MLDSA_REG_MLDSA_SIGNATURE_655 (32'h1574) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_656 (32'h10031578) +`define MLDSA_REG_MLDSA_SIGNATURE_656 (32'h1578) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_657 (32'h1003157c) +`define MLDSA_REG_MLDSA_SIGNATURE_657 (32'h157c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_658 (32'h10031580) +`define MLDSA_REG_MLDSA_SIGNATURE_658 (32'h1580) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_659 (32'h10031584) +`define MLDSA_REG_MLDSA_SIGNATURE_659 (32'h1584) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_660 (32'h10031588) +`define MLDSA_REG_MLDSA_SIGNATURE_660 (32'h1588) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_661 (32'h1003158c) +`define MLDSA_REG_MLDSA_SIGNATURE_661 (32'h158c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_662 (32'h10031590) +`define MLDSA_REG_MLDSA_SIGNATURE_662 (32'h1590) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_663 (32'h10031594) +`define MLDSA_REG_MLDSA_SIGNATURE_663 (32'h1594) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_664 (32'h10031598) +`define MLDSA_REG_MLDSA_SIGNATURE_664 (32'h1598) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_665 (32'h1003159c) +`define MLDSA_REG_MLDSA_SIGNATURE_665 (32'h159c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_666 (32'h100315a0) +`define MLDSA_REG_MLDSA_SIGNATURE_666 (32'h15a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_667 (32'h100315a4) +`define MLDSA_REG_MLDSA_SIGNATURE_667 (32'h15a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_668 (32'h100315a8) +`define MLDSA_REG_MLDSA_SIGNATURE_668 (32'h15a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_669 (32'h100315ac) +`define MLDSA_REG_MLDSA_SIGNATURE_669 (32'h15ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_670 (32'h100315b0) +`define MLDSA_REG_MLDSA_SIGNATURE_670 (32'h15b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_671 (32'h100315b4) +`define MLDSA_REG_MLDSA_SIGNATURE_671 (32'h15b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_672 (32'h100315b8) +`define MLDSA_REG_MLDSA_SIGNATURE_672 (32'h15b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_673 (32'h100315bc) +`define MLDSA_REG_MLDSA_SIGNATURE_673 (32'h15bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_674 (32'h100315c0) +`define MLDSA_REG_MLDSA_SIGNATURE_674 (32'h15c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_675 (32'h100315c4) +`define MLDSA_REG_MLDSA_SIGNATURE_675 (32'h15c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_676 (32'h100315c8) +`define MLDSA_REG_MLDSA_SIGNATURE_676 (32'h15c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_677 (32'h100315cc) +`define MLDSA_REG_MLDSA_SIGNATURE_677 (32'h15cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_678 (32'h100315d0) +`define MLDSA_REG_MLDSA_SIGNATURE_678 (32'h15d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_679 (32'h100315d4) +`define MLDSA_REG_MLDSA_SIGNATURE_679 (32'h15d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_680 (32'h100315d8) +`define MLDSA_REG_MLDSA_SIGNATURE_680 (32'h15d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_681 (32'h100315dc) +`define MLDSA_REG_MLDSA_SIGNATURE_681 (32'h15dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_682 (32'h100315e0) +`define MLDSA_REG_MLDSA_SIGNATURE_682 (32'h15e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_683 (32'h100315e4) +`define MLDSA_REG_MLDSA_SIGNATURE_683 (32'h15e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_684 (32'h100315e8) +`define MLDSA_REG_MLDSA_SIGNATURE_684 (32'h15e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_685 (32'h100315ec) +`define MLDSA_REG_MLDSA_SIGNATURE_685 (32'h15ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_686 (32'h100315f0) +`define MLDSA_REG_MLDSA_SIGNATURE_686 (32'h15f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_687 (32'h100315f4) +`define MLDSA_REG_MLDSA_SIGNATURE_687 (32'h15f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_688 (32'h100315f8) +`define MLDSA_REG_MLDSA_SIGNATURE_688 (32'h15f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_689 (32'h100315fc) +`define MLDSA_REG_MLDSA_SIGNATURE_689 (32'h15fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_690 (32'h10031600) +`define MLDSA_REG_MLDSA_SIGNATURE_690 (32'h1600) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_691 (32'h10031604) +`define MLDSA_REG_MLDSA_SIGNATURE_691 (32'h1604) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_692 (32'h10031608) +`define MLDSA_REG_MLDSA_SIGNATURE_692 (32'h1608) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_693 (32'h1003160c) +`define MLDSA_REG_MLDSA_SIGNATURE_693 (32'h160c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_694 (32'h10031610) +`define MLDSA_REG_MLDSA_SIGNATURE_694 (32'h1610) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_695 (32'h10031614) +`define MLDSA_REG_MLDSA_SIGNATURE_695 (32'h1614) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_696 (32'h10031618) +`define MLDSA_REG_MLDSA_SIGNATURE_696 (32'h1618) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_697 (32'h1003161c) +`define MLDSA_REG_MLDSA_SIGNATURE_697 (32'h161c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_698 (32'h10031620) +`define MLDSA_REG_MLDSA_SIGNATURE_698 (32'h1620) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_699 (32'h10031624) +`define MLDSA_REG_MLDSA_SIGNATURE_699 (32'h1624) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_700 (32'h10031628) +`define MLDSA_REG_MLDSA_SIGNATURE_700 (32'h1628) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_701 (32'h1003162c) +`define MLDSA_REG_MLDSA_SIGNATURE_701 (32'h162c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_702 (32'h10031630) +`define MLDSA_REG_MLDSA_SIGNATURE_702 (32'h1630) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_703 (32'h10031634) +`define MLDSA_REG_MLDSA_SIGNATURE_703 (32'h1634) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_704 (32'h10031638) +`define MLDSA_REG_MLDSA_SIGNATURE_704 (32'h1638) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_705 (32'h1003163c) +`define MLDSA_REG_MLDSA_SIGNATURE_705 (32'h163c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_706 (32'h10031640) +`define MLDSA_REG_MLDSA_SIGNATURE_706 (32'h1640) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_707 (32'h10031644) +`define MLDSA_REG_MLDSA_SIGNATURE_707 (32'h1644) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_708 (32'h10031648) +`define MLDSA_REG_MLDSA_SIGNATURE_708 (32'h1648) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_709 (32'h1003164c) +`define MLDSA_REG_MLDSA_SIGNATURE_709 (32'h164c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_710 (32'h10031650) +`define MLDSA_REG_MLDSA_SIGNATURE_710 (32'h1650) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_711 (32'h10031654) +`define MLDSA_REG_MLDSA_SIGNATURE_711 (32'h1654) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_712 (32'h10031658) +`define MLDSA_REG_MLDSA_SIGNATURE_712 (32'h1658) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_713 (32'h1003165c) +`define MLDSA_REG_MLDSA_SIGNATURE_713 (32'h165c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_714 (32'h10031660) +`define MLDSA_REG_MLDSA_SIGNATURE_714 (32'h1660) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_715 (32'h10031664) +`define MLDSA_REG_MLDSA_SIGNATURE_715 (32'h1664) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_716 (32'h10031668) +`define MLDSA_REG_MLDSA_SIGNATURE_716 (32'h1668) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_717 (32'h1003166c) +`define MLDSA_REG_MLDSA_SIGNATURE_717 (32'h166c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_718 (32'h10031670) +`define MLDSA_REG_MLDSA_SIGNATURE_718 (32'h1670) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_719 (32'h10031674) +`define MLDSA_REG_MLDSA_SIGNATURE_719 (32'h1674) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_720 (32'h10031678) +`define MLDSA_REG_MLDSA_SIGNATURE_720 (32'h1678) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_721 (32'h1003167c) +`define MLDSA_REG_MLDSA_SIGNATURE_721 (32'h167c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_722 (32'h10031680) +`define MLDSA_REG_MLDSA_SIGNATURE_722 (32'h1680) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_723 (32'h10031684) +`define MLDSA_REG_MLDSA_SIGNATURE_723 (32'h1684) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_724 (32'h10031688) +`define MLDSA_REG_MLDSA_SIGNATURE_724 (32'h1688) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_725 (32'h1003168c) +`define MLDSA_REG_MLDSA_SIGNATURE_725 (32'h168c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_726 (32'h10031690) +`define MLDSA_REG_MLDSA_SIGNATURE_726 (32'h1690) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_727 (32'h10031694) +`define MLDSA_REG_MLDSA_SIGNATURE_727 (32'h1694) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_728 (32'h10031698) +`define MLDSA_REG_MLDSA_SIGNATURE_728 (32'h1698) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_729 (32'h1003169c) +`define MLDSA_REG_MLDSA_SIGNATURE_729 (32'h169c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_730 (32'h100316a0) +`define MLDSA_REG_MLDSA_SIGNATURE_730 (32'h16a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_731 (32'h100316a4) +`define MLDSA_REG_MLDSA_SIGNATURE_731 (32'h16a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_732 (32'h100316a8) +`define MLDSA_REG_MLDSA_SIGNATURE_732 (32'h16a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_733 (32'h100316ac) +`define MLDSA_REG_MLDSA_SIGNATURE_733 (32'h16ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_734 (32'h100316b0) +`define MLDSA_REG_MLDSA_SIGNATURE_734 (32'h16b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_735 (32'h100316b4) +`define MLDSA_REG_MLDSA_SIGNATURE_735 (32'h16b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_736 (32'h100316b8) +`define MLDSA_REG_MLDSA_SIGNATURE_736 (32'h16b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_737 (32'h100316bc) +`define MLDSA_REG_MLDSA_SIGNATURE_737 (32'h16bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_738 (32'h100316c0) +`define MLDSA_REG_MLDSA_SIGNATURE_738 (32'h16c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_739 (32'h100316c4) +`define MLDSA_REG_MLDSA_SIGNATURE_739 (32'h16c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_740 (32'h100316c8) +`define MLDSA_REG_MLDSA_SIGNATURE_740 (32'h16c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_741 (32'h100316cc) +`define MLDSA_REG_MLDSA_SIGNATURE_741 (32'h16cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_742 (32'h100316d0) +`define MLDSA_REG_MLDSA_SIGNATURE_742 (32'h16d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_743 (32'h100316d4) +`define MLDSA_REG_MLDSA_SIGNATURE_743 (32'h16d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_744 (32'h100316d8) +`define MLDSA_REG_MLDSA_SIGNATURE_744 (32'h16d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_745 (32'h100316dc) +`define MLDSA_REG_MLDSA_SIGNATURE_745 (32'h16dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_746 (32'h100316e0) +`define MLDSA_REG_MLDSA_SIGNATURE_746 (32'h16e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_747 (32'h100316e4) +`define MLDSA_REG_MLDSA_SIGNATURE_747 (32'h16e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_748 (32'h100316e8) +`define MLDSA_REG_MLDSA_SIGNATURE_748 (32'h16e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_749 (32'h100316ec) +`define MLDSA_REG_MLDSA_SIGNATURE_749 (32'h16ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_750 (32'h100316f0) +`define MLDSA_REG_MLDSA_SIGNATURE_750 (32'h16f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_751 (32'h100316f4) +`define MLDSA_REG_MLDSA_SIGNATURE_751 (32'h16f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_752 (32'h100316f8) +`define MLDSA_REG_MLDSA_SIGNATURE_752 (32'h16f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_753 (32'h100316fc) +`define MLDSA_REG_MLDSA_SIGNATURE_753 (32'h16fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_754 (32'h10031700) +`define MLDSA_REG_MLDSA_SIGNATURE_754 (32'h1700) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_755 (32'h10031704) +`define MLDSA_REG_MLDSA_SIGNATURE_755 (32'h1704) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_756 (32'h10031708) +`define MLDSA_REG_MLDSA_SIGNATURE_756 (32'h1708) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_757 (32'h1003170c) +`define MLDSA_REG_MLDSA_SIGNATURE_757 (32'h170c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_758 (32'h10031710) +`define MLDSA_REG_MLDSA_SIGNATURE_758 (32'h1710) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_759 (32'h10031714) +`define MLDSA_REG_MLDSA_SIGNATURE_759 (32'h1714) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_760 (32'h10031718) +`define MLDSA_REG_MLDSA_SIGNATURE_760 (32'h1718) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_761 (32'h1003171c) +`define MLDSA_REG_MLDSA_SIGNATURE_761 (32'h171c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_762 (32'h10031720) +`define MLDSA_REG_MLDSA_SIGNATURE_762 (32'h1720) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_763 (32'h10031724) +`define MLDSA_REG_MLDSA_SIGNATURE_763 (32'h1724) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_764 (32'h10031728) +`define MLDSA_REG_MLDSA_SIGNATURE_764 (32'h1728) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_765 (32'h1003172c) +`define MLDSA_REG_MLDSA_SIGNATURE_765 (32'h172c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_766 (32'h10031730) +`define MLDSA_REG_MLDSA_SIGNATURE_766 (32'h1730) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_767 (32'h10031734) +`define MLDSA_REG_MLDSA_SIGNATURE_767 (32'h1734) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_768 (32'h10031738) +`define MLDSA_REG_MLDSA_SIGNATURE_768 (32'h1738) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_769 (32'h1003173c) +`define MLDSA_REG_MLDSA_SIGNATURE_769 (32'h173c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_770 (32'h10031740) +`define MLDSA_REG_MLDSA_SIGNATURE_770 (32'h1740) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_771 (32'h10031744) +`define MLDSA_REG_MLDSA_SIGNATURE_771 (32'h1744) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_772 (32'h10031748) +`define MLDSA_REG_MLDSA_SIGNATURE_772 (32'h1748) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_773 (32'h1003174c) +`define MLDSA_REG_MLDSA_SIGNATURE_773 (32'h174c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_774 (32'h10031750) +`define MLDSA_REG_MLDSA_SIGNATURE_774 (32'h1750) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_775 (32'h10031754) +`define MLDSA_REG_MLDSA_SIGNATURE_775 (32'h1754) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_776 (32'h10031758) +`define MLDSA_REG_MLDSA_SIGNATURE_776 (32'h1758) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_777 (32'h1003175c) +`define MLDSA_REG_MLDSA_SIGNATURE_777 (32'h175c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_778 (32'h10031760) +`define MLDSA_REG_MLDSA_SIGNATURE_778 (32'h1760) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_779 (32'h10031764) +`define MLDSA_REG_MLDSA_SIGNATURE_779 (32'h1764) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_780 (32'h10031768) +`define MLDSA_REG_MLDSA_SIGNATURE_780 (32'h1768) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_781 (32'h1003176c) +`define MLDSA_REG_MLDSA_SIGNATURE_781 (32'h176c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_782 (32'h10031770) +`define MLDSA_REG_MLDSA_SIGNATURE_782 (32'h1770) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_783 (32'h10031774) +`define MLDSA_REG_MLDSA_SIGNATURE_783 (32'h1774) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_784 (32'h10031778) +`define MLDSA_REG_MLDSA_SIGNATURE_784 (32'h1778) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_785 (32'h1003177c) +`define MLDSA_REG_MLDSA_SIGNATURE_785 (32'h177c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_786 (32'h10031780) +`define MLDSA_REG_MLDSA_SIGNATURE_786 (32'h1780) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_787 (32'h10031784) +`define MLDSA_REG_MLDSA_SIGNATURE_787 (32'h1784) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_788 (32'h10031788) +`define MLDSA_REG_MLDSA_SIGNATURE_788 (32'h1788) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_789 (32'h1003178c) +`define MLDSA_REG_MLDSA_SIGNATURE_789 (32'h178c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_790 (32'h10031790) +`define MLDSA_REG_MLDSA_SIGNATURE_790 (32'h1790) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_791 (32'h10031794) +`define MLDSA_REG_MLDSA_SIGNATURE_791 (32'h1794) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_792 (32'h10031798) +`define MLDSA_REG_MLDSA_SIGNATURE_792 (32'h1798) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_793 (32'h1003179c) +`define MLDSA_REG_MLDSA_SIGNATURE_793 (32'h179c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_794 (32'h100317a0) +`define MLDSA_REG_MLDSA_SIGNATURE_794 (32'h17a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_795 (32'h100317a4) +`define MLDSA_REG_MLDSA_SIGNATURE_795 (32'h17a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_796 (32'h100317a8) +`define MLDSA_REG_MLDSA_SIGNATURE_796 (32'h17a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_797 (32'h100317ac) +`define MLDSA_REG_MLDSA_SIGNATURE_797 (32'h17ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_798 (32'h100317b0) +`define MLDSA_REG_MLDSA_SIGNATURE_798 (32'h17b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_799 (32'h100317b4) +`define MLDSA_REG_MLDSA_SIGNATURE_799 (32'h17b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_800 (32'h100317b8) +`define MLDSA_REG_MLDSA_SIGNATURE_800 (32'h17b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_801 (32'h100317bc) +`define MLDSA_REG_MLDSA_SIGNATURE_801 (32'h17bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_802 (32'h100317c0) +`define MLDSA_REG_MLDSA_SIGNATURE_802 (32'h17c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_803 (32'h100317c4) +`define MLDSA_REG_MLDSA_SIGNATURE_803 (32'h17c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_804 (32'h100317c8) +`define MLDSA_REG_MLDSA_SIGNATURE_804 (32'h17c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_805 (32'h100317cc) +`define MLDSA_REG_MLDSA_SIGNATURE_805 (32'h17cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_806 (32'h100317d0) +`define MLDSA_REG_MLDSA_SIGNATURE_806 (32'h17d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_807 (32'h100317d4) +`define MLDSA_REG_MLDSA_SIGNATURE_807 (32'h17d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_808 (32'h100317d8) +`define MLDSA_REG_MLDSA_SIGNATURE_808 (32'h17d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_809 (32'h100317dc) +`define MLDSA_REG_MLDSA_SIGNATURE_809 (32'h17dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_810 (32'h100317e0) +`define MLDSA_REG_MLDSA_SIGNATURE_810 (32'h17e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_811 (32'h100317e4) +`define MLDSA_REG_MLDSA_SIGNATURE_811 (32'h17e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_812 (32'h100317e8) +`define MLDSA_REG_MLDSA_SIGNATURE_812 (32'h17e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_813 (32'h100317ec) +`define MLDSA_REG_MLDSA_SIGNATURE_813 (32'h17ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_814 (32'h100317f0) +`define MLDSA_REG_MLDSA_SIGNATURE_814 (32'h17f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_815 (32'h100317f4) +`define MLDSA_REG_MLDSA_SIGNATURE_815 (32'h17f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_816 (32'h100317f8) +`define MLDSA_REG_MLDSA_SIGNATURE_816 (32'h17f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_817 (32'h100317fc) +`define MLDSA_REG_MLDSA_SIGNATURE_817 (32'h17fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_818 (32'h10031800) +`define MLDSA_REG_MLDSA_SIGNATURE_818 (32'h1800) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_819 (32'h10031804) +`define MLDSA_REG_MLDSA_SIGNATURE_819 (32'h1804) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_820 (32'h10031808) +`define MLDSA_REG_MLDSA_SIGNATURE_820 (32'h1808) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_821 (32'h1003180c) +`define MLDSA_REG_MLDSA_SIGNATURE_821 (32'h180c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_822 (32'h10031810) +`define MLDSA_REG_MLDSA_SIGNATURE_822 (32'h1810) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_823 (32'h10031814) +`define MLDSA_REG_MLDSA_SIGNATURE_823 (32'h1814) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_824 (32'h10031818) +`define MLDSA_REG_MLDSA_SIGNATURE_824 (32'h1818) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_825 (32'h1003181c) +`define MLDSA_REG_MLDSA_SIGNATURE_825 (32'h181c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_826 (32'h10031820) +`define MLDSA_REG_MLDSA_SIGNATURE_826 (32'h1820) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_827 (32'h10031824) +`define MLDSA_REG_MLDSA_SIGNATURE_827 (32'h1824) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_828 (32'h10031828) +`define MLDSA_REG_MLDSA_SIGNATURE_828 (32'h1828) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_829 (32'h1003182c) +`define MLDSA_REG_MLDSA_SIGNATURE_829 (32'h182c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_830 (32'h10031830) +`define MLDSA_REG_MLDSA_SIGNATURE_830 (32'h1830) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_831 (32'h10031834) +`define MLDSA_REG_MLDSA_SIGNATURE_831 (32'h1834) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_832 (32'h10031838) +`define MLDSA_REG_MLDSA_SIGNATURE_832 (32'h1838) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_833 (32'h1003183c) +`define MLDSA_REG_MLDSA_SIGNATURE_833 (32'h183c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_834 (32'h10031840) +`define MLDSA_REG_MLDSA_SIGNATURE_834 (32'h1840) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_835 (32'h10031844) +`define MLDSA_REG_MLDSA_SIGNATURE_835 (32'h1844) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_836 (32'h10031848) +`define MLDSA_REG_MLDSA_SIGNATURE_836 (32'h1848) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_837 (32'h1003184c) +`define MLDSA_REG_MLDSA_SIGNATURE_837 (32'h184c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_838 (32'h10031850) +`define MLDSA_REG_MLDSA_SIGNATURE_838 (32'h1850) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_839 (32'h10031854) +`define MLDSA_REG_MLDSA_SIGNATURE_839 (32'h1854) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_840 (32'h10031858) +`define MLDSA_REG_MLDSA_SIGNATURE_840 (32'h1858) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_841 (32'h1003185c) +`define MLDSA_REG_MLDSA_SIGNATURE_841 (32'h185c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_842 (32'h10031860) +`define MLDSA_REG_MLDSA_SIGNATURE_842 (32'h1860) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_843 (32'h10031864) +`define MLDSA_REG_MLDSA_SIGNATURE_843 (32'h1864) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_844 (32'h10031868) +`define MLDSA_REG_MLDSA_SIGNATURE_844 (32'h1868) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_845 (32'h1003186c) +`define MLDSA_REG_MLDSA_SIGNATURE_845 (32'h186c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_846 (32'h10031870) +`define MLDSA_REG_MLDSA_SIGNATURE_846 (32'h1870) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_847 (32'h10031874) +`define MLDSA_REG_MLDSA_SIGNATURE_847 (32'h1874) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_848 (32'h10031878) +`define MLDSA_REG_MLDSA_SIGNATURE_848 (32'h1878) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_849 (32'h1003187c) +`define MLDSA_REG_MLDSA_SIGNATURE_849 (32'h187c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_850 (32'h10031880) +`define MLDSA_REG_MLDSA_SIGNATURE_850 (32'h1880) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_851 (32'h10031884) +`define MLDSA_REG_MLDSA_SIGNATURE_851 (32'h1884) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_852 (32'h10031888) +`define MLDSA_REG_MLDSA_SIGNATURE_852 (32'h1888) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_853 (32'h1003188c) +`define MLDSA_REG_MLDSA_SIGNATURE_853 (32'h188c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_854 (32'h10031890) +`define MLDSA_REG_MLDSA_SIGNATURE_854 (32'h1890) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_855 (32'h10031894) +`define MLDSA_REG_MLDSA_SIGNATURE_855 (32'h1894) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_856 (32'h10031898) +`define MLDSA_REG_MLDSA_SIGNATURE_856 (32'h1898) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_857 (32'h1003189c) +`define MLDSA_REG_MLDSA_SIGNATURE_857 (32'h189c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_858 (32'h100318a0) +`define MLDSA_REG_MLDSA_SIGNATURE_858 (32'h18a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_859 (32'h100318a4) +`define MLDSA_REG_MLDSA_SIGNATURE_859 (32'h18a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_860 (32'h100318a8) +`define MLDSA_REG_MLDSA_SIGNATURE_860 (32'h18a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_861 (32'h100318ac) +`define MLDSA_REG_MLDSA_SIGNATURE_861 (32'h18ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_862 (32'h100318b0) +`define MLDSA_REG_MLDSA_SIGNATURE_862 (32'h18b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_863 (32'h100318b4) +`define MLDSA_REG_MLDSA_SIGNATURE_863 (32'h18b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_864 (32'h100318b8) +`define MLDSA_REG_MLDSA_SIGNATURE_864 (32'h18b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_865 (32'h100318bc) +`define MLDSA_REG_MLDSA_SIGNATURE_865 (32'h18bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_866 (32'h100318c0) +`define MLDSA_REG_MLDSA_SIGNATURE_866 (32'h18c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_867 (32'h100318c4) +`define MLDSA_REG_MLDSA_SIGNATURE_867 (32'h18c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_868 (32'h100318c8) +`define MLDSA_REG_MLDSA_SIGNATURE_868 (32'h18c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_869 (32'h100318cc) +`define MLDSA_REG_MLDSA_SIGNATURE_869 (32'h18cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_870 (32'h100318d0) +`define MLDSA_REG_MLDSA_SIGNATURE_870 (32'h18d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_871 (32'h100318d4) +`define MLDSA_REG_MLDSA_SIGNATURE_871 (32'h18d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_872 (32'h100318d8) +`define MLDSA_REG_MLDSA_SIGNATURE_872 (32'h18d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_873 (32'h100318dc) +`define MLDSA_REG_MLDSA_SIGNATURE_873 (32'h18dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_874 (32'h100318e0) +`define MLDSA_REG_MLDSA_SIGNATURE_874 (32'h18e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_875 (32'h100318e4) +`define MLDSA_REG_MLDSA_SIGNATURE_875 (32'h18e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_876 (32'h100318e8) +`define MLDSA_REG_MLDSA_SIGNATURE_876 (32'h18e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_877 (32'h100318ec) +`define MLDSA_REG_MLDSA_SIGNATURE_877 (32'h18ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_878 (32'h100318f0) +`define MLDSA_REG_MLDSA_SIGNATURE_878 (32'h18f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_879 (32'h100318f4) +`define MLDSA_REG_MLDSA_SIGNATURE_879 (32'h18f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_880 (32'h100318f8) +`define MLDSA_REG_MLDSA_SIGNATURE_880 (32'h18f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_881 (32'h100318fc) +`define MLDSA_REG_MLDSA_SIGNATURE_881 (32'h18fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_882 (32'h10031900) +`define MLDSA_REG_MLDSA_SIGNATURE_882 (32'h1900) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_883 (32'h10031904) +`define MLDSA_REG_MLDSA_SIGNATURE_883 (32'h1904) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_884 (32'h10031908) +`define MLDSA_REG_MLDSA_SIGNATURE_884 (32'h1908) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_885 (32'h1003190c) +`define MLDSA_REG_MLDSA_SIGNATURE_885 (32'h190c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_886 (32'h10031910) +`define MLDSA_REG_MLDSA_SIGNATURE_886 (32'h1910) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_887 (32'h10031914) +`define MLDSA_REG_MLDSA_SIGNATURE_887 (32'h1914) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_888 (32'h10031918) +`define MLDSA_REG_MLDSA_SIGNATURE_888 (32'h1918) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_889 (32'h1003191c) +`define MLDSA_REG_MLDSA_SIGNATURE_889 (32'h191c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_890 (32'h10031920) +`define MLDSA_REG_MLDSA_SIGNATURE_890 (32'h1920) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_891 (32'h10031924) +`define MLDSA_REG_MLDSA_SIGNATURE_891 (32'h1924) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_892 (32'h10031928) +`define MLDSA_REG_MLDSA_SIGNATURE_892 (32'h1928) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_893 (32'h1003192c) +`define MLDSA_REG_MLDSA_SIGNATURE_893 (32'h192c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_894 (32'h10031930) +`define MLDSA_REG_MLDSA_SIGNATURE_894 (32'h1930) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_895 (32'h10031934) +`define MLDSA_REG_MLDSA_SIGNATURE_895 (32'h1934) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_896 (32'h10031938) +`define MLDSA_REG_MLDSA_SIGNATURE_896 (32'h1938) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_897 (32'h1003193c) +`define MLDSA_REG_MLDSA_SIGNATURE_897 (32'h193c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_898 (32'h10031940) +`define MLDSA_REG_MLDSA_SIGNATURE_898 (32'h1940) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_899 (32'h10031944) +`define MLDSA_REG_MLDSA_SIGNATURE_899 (32'h1944) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_900 (32'h10031948) +`define MLDSA_REG_MLDSA_SIGNATURE_900 (32'h1948) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_901 (32'h1003194c) +`define MLDSA_REG_MLDSA_SIGNATURE_901 (32'h194c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_902 (32'h10031950) +`define MLDSA_REG_MLDSA_SIGNATURE_902 (32'h1950) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_903 (32'h10031954) +`define MLDSA_REG_MLDSA_SIGNATURE_903 (32'h1954) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_904 (32'h10031958) +`define MLDSA_REG_MLDSA_SIGNATURE_904 (32'h1958) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_905 (32'h1003195c) +`define MLDSA_REG_MLDSA_SIGNATURE_905 (32'h195c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_906 (32'h10031960) +`define MLDSA_REG_MLDSA_SIGNATURE_906 (32'h1960) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_907 (32'h10031964) +`define MLDSA_REG_MLDSA_SIGNATURE_907 (32'h1964) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_908 (32'h10031968) +`define MLDSA_REG_MLDSA_SIGNATURE_908 (32'h1968) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_909 (32'h1003196c) +`define MLDSA_REG_MLDSA_SIGNATURE_909 (32'h196c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_910 (32'h10031970) +`define MLDSA_REG_MLDSA_SIGNATURE_910 (32'h1970) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_911 (32'h10031974) +`define MLDSA_REG_MLDSA_SIGNATURE_911 (32'h1974) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_912 (32'h10031978) +`define MLDSA_REG_MLDSA_SIGNATURE_912 (32'h1978) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_913 (32'h1003197c) +`define MLDSA_REG_MLDSA_SIGNATURE_913 (32'h197c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_914 (32'h10031980) +`define MLDSA_REG_MLDSA_SIGNATURE_914 (32'h1980) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_915 (32'h10031984) +`define MLDSA_REG_MLDSA_SIGNATURE_915 (32'h1984) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_916 (32'h10031988) +`define MLDSA_REG_MLDSA_SIGNATURE_916 (32'h1988) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_917 (32'h1003198c) +`define MLDSA_REG_MLDSA_SIGNATURE_917 (32'h198c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_918 (32'h10031990) +`define MLDSA_REG_MLDSA_SIGNATURE_918 (32'h1990) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_919 (32'h10031994) +`define MLDSA_REG_MLDSA_SIGNATURE_919 (32'h1994) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_920 (32'h10031998) +`define MLDSA_REG_MLDSA_SIGNATURE_920 (32'h1998) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_921 (32'h1003199c) +`define MLDSA_REG_MLDSA_SIGNATURE_921 (32'h199c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_922 (32'h100319a0) +`define MLDSA_REG_MLDSA_SIGNATURE_922 (32'h19a0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_923 (32'h100319a4) +`define MLDSA_REG_MLDSA_SIGNATURE_923 (32'h19a4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_924 (32'h100319a8) +`define MLDSA_REG_MLDSA_SIGNATURE_924 (32'h19a8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_925 (32'h100319ac) +`define MLDSA_REG_MLDSA_SIGNATURE_925 (32'h19ac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_926 (32'h100319b0) +`define MLDSA_REG_MLDSA_SIGNATURE_926 (32'h19b0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_927 (32'h100319b4) +`define MLDSA_REG_MLDSA_SIGNATURE_927 (32'h19b4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_928 (32'h100319b8) +`define MLDSA_REG_MLDSA_SIGNATURE_928 (32'h19b8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_929 (32'h100319bc) +`define MLDSA_REG_MLDSA_SIGNATURE_929 (32'h19bc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_930 (32'h100319c0) +`define MLDSA_REG_MLDSA_SIGNATURE_930 (32'h19c0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_931 (32'h100319c4) +`define MLDSA_REG_MLDSA_SIGNATURE_931 (32'h19c4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_932 (32'h100319c8) +`define MLDSA_REG_MLDSA_SIGNATURE_932 (32'h19c8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_933 (32'h100319cc) +`define MLDSA_REG_MLDSA_SIGNATURE_933 (32'h19cc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_934 (32'h100319d0) +`define MLDSA_REG_MLDSA_SIGNATURE_934 (32'h19d0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_935 (32'h100319d4) +`define MLDSA_REG_MLDSA_SIGNATURE_935 (32'h19d4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_936 (32'h100319d8) +`define MLDSA_REG_MLDSA_SIGNATURE_936 (32'h19d8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_937 (32'h100319dc) +`define MLDSA_REG_MLDSA_SIGNATURE_937 (32'h19dc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_938 (32'h100319e0) +`define MLDSA_REG_MLDSA_SIGNATURE_938 (32'h19e0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_939 (32'h100319e4) +`define MLDSA_REG_MLDSA_SIGNATURE_939 (32'h19e4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_940 (32'h100319e8) +`define MLDSA_REG_MLDSA_SIGNATURE_940 (32'h19e8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_941 (32'h100319ec) +`define MLDSA_REG_MLDSA_SIGNATURE_941 (32'h19ec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_942 (32'h100319f0) +`define MLDSA_REG_MLDSA_SIGNATURE_942 (32'h19f0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_943 (32'h100319f4) +`define MLDSA_REG_MLDSA_SIGNATURE_943 (32'h19f4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_944 (32'h100319f8) +`define MLDSA_REG_MLDSA_SIGNATURE_944 (32'h19f8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_945 (32'h100319fc) +`define MLDSA_REG_MLDSA_SIGNATURE_945 (32'h19fc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_946 (32'h10031a00) +`define MLDSA_REG_MLDSA_SIGNATURE_946 (32'h1a00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_947 (32'h10031a04) +`define MLDSA_REG_MLDSA_SIGNATURE_947 (32'h1a04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_948 (32'h10031a08) +`define MLDSA_REG_MLDSA_SIGNATURE_948 (32'h1a08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_949 (32'h10031a0c) +`define MLDSA_REG_MLDSA_SIGNATURE_949 (32'h1a0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_950 (32'h10031a10) +`define MLDSA_REG_MLDSA_SIGNATURE_950 (32'h1a10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_951 (32'h10031a14) +`define MLDSA_REG_MLDSA_SIGNATURE_951 (32'h1a14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_952 (32'h10031a18) +`define MLDSA_REG_MLDSA_SIGNATURE_952 (32'h1a18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_953 (32'h10031a1c) +`define MLDSA_REG_MLDSA_SIGNATURE_953 (32'h1a1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_954 (32'h10031a20) +`define MLDSA_REG_MLDSA_SIGNATURE_954 (32'h1a20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_955 (32'h10031a24) +`define MLDSA_REG_MLDSA_SIGNATURE_955 (32'h1a24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_956 (32'h10031a28) +`define MLDSA_REG_MLDSA_SIGNATURE_956 (32'h1a28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_957 (32'h10031a2c) +`define MLDSA_REG_MLDSA_SIGNATURE_957 (32'h1a2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_958 (32'h10031a30) +`define MLDSA_REG_MLDSA_SIGNATURE_958 (32'h1a30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_959 (32'h10031a34) +`define MLDSA_REG_MLDSA_SIGNATURE_959 (32'h1a34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_960 (32'h10031a38) +`define MLDSA_REG_MLDSA_SIGNATURE_960 (32'h1a38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_961 (32'h10031a3c) +`define MLDSA_REG_MLDSA_SIGNATURE_961 (32'h1a3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_962 (32'h10031a40) +`define MLDSA_REG_MLDSA_SIGNATURE_962 (32'h1a40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_963 (32'h10031a44) +`define MLDSA_REG_MLDSA_SIGNATURE_963 (32'h1a44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_964 (32'h10031a48) +`define MLDSA_REG_MLDSA_SIGNATURE_964 (32'h1a48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_965 (32'h10031a4c) +`define MLDSA_REG_MLDSA_SIGNATURE_965 (32'h1a4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_966 (32'h10031a50) +`define MLDSA_REG_MLDSA_SIGNATURE_966 (32'h1a50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_967 (32'h10031a54) +`define MLDSA_REG_MLDSA_SIGNATURE_967 (32'h1a54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_968 (32'h10031a58) +`define MLDSA_REG_MLDSA_SIGNATURE_968 (32'h1a58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_969 (32'h10031a5c) +`define MLDSA_REG_MLDSA_SIGNATURE_969 (32'h1a5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_970 (32'h10031a60) +`define MLDSA_REG_MLDSA_SIGNATURE_970 (32'h1a60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_971 (32'h10031a64) +`define MLDSA_REG_MLDSA_SIGNATURE_971 (32'h1a64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_972 (32'h10031a68) +`define MLDSA_REG_MLDSA_SIGNATURE_972 (32'h1a68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_973 (32'h10031a6c) +`define MLDSA_REG_MLDSA_SIGNATURE_973 (32'h1a6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_974 (32'h10031a70) +`define MLDSA_REG_MLDSA_SIGNATURE_974 (32'h1a70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_975 (32'h10031a74) +`define MLDSA_REG_MLDSA_SIGNATURE_975 (32'h1a74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_976 (32'h10031a78) +`define MLDSA_REG_MLDSA_SIGNATURE_976 (32'h1a78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_977 (32'h10031a7c) +`define MLDSA_REG_MLDSA_SIGNATURE_977 (32'h1a7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_978 (32'h10031a80) +`define MLDSA_REG_MLDSA_SIGNATURE_978 (32'h1a80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_979 (32'h10031a84) +`define MLDSA_REG_MLDSA_SIGNATURE_979 (32'h1a84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_980 (32'h10031a88) +`define MLDSA_REG_MLDSA_SIGNATURE_980 (32'h1a88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_981 (32'h10031a8c) +`define MLDSA_REG_MLDSA_SIGNATURE_981 (32'h1a8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_982 (32'h10031a90) +`define MLDSA_REG_MLDSA_SIGNATURE_982 (32'h1a90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_983 (32'h10031a94) +`define MLDSA_REG_MLDSA_SIGNATURE_983 (32'h1a94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_984 (32'h10031a98) +`define MLDSA_REG_MLDSA_SIGNATURE_984 (32'h1a98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_985 (32'h10031a9c) +`define MLDSA_REG_MLDSA_SIGNATURE_985 (32'h1a9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_986 (32'h10031aa0) +`define MLDSA_REG_MLDSA_SIGNATURE_986 (32'h1aa0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_987 (32'h10031aa4) +`define MLDSA_REG_MLDSA_SIGNATURE_987 (32'h1aa4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_988 (32'h10031aa8) +`define MLDSA_REG_MLDSA_SIGNATURE_988 (32'h1aa8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_989 (32'h10031aac) +`define MLDSA_REG_MLDSA_SIGNATURE_989 (32'h1aac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_990 (32'h10031ab0) +`define MLDSA_REG_MLDSA_SIGNATURE_990 (32'h1ab0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_991 (32'h10031ab4) +`define MLDSA_REG_MLDSA_SIGNATURE_991 (32'h1ab4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_992 (32'h10031ab8) +`define MLDSA_REG_MLDSA_SIGNATURE_992 (32'h1ab8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_993 (32'h10031abc) +`define MLDSA_REG_MLDSA_SIGNATURE_993 (32'h1abc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_994 (32'h10031ac0) +`define MLDSA_REG_MLDSA_SIGNATURE_994 (32'h1ac0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_995 (32'h10031ac4) +`define MLDSA_REG_MLDSA_SIGNATURE_995 (32'h1ac4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_996 (32'h10031ac8) +`define MLDSA_REG_MLDSA_SIGNATURE_996 (32'h1ac8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_997 (32'h10031acc) +`define MLDSA_REG_MLDSA_SIGNATURE_997 (32'h1acc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_998 (32'h10031ad0) +`define MLDSA_REG_MLDSA_SIGNATURE_998 (32'h1ad0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_999 (32'h10031ad4) +`define MLDSA_REG_MLDSA_SIGNATURE_999 (32'h1ad4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1000 (32'h10031ad8) +`define MLDSA_REG_MLDSA_SIGNATURE_1000 (32'h1ad8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1001 (32'h10031adc) +`define MLDSA_REG_MLDSA_SIGNATURE_1001 (32'h1adc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1002 (32'h10031ae0) +`define MLDSA_REG_MLDSA_SIGNATURE_1002 (32'h1ae0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1003 (32'h10031ae4) +`define MLDSA_REG_MLDSA_SIGNATURE_1003 (32'h1ae4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1004 (32'h10031ae8) +`define MLDSA_REG_MLDSA_SIGNATURE_1004 (32'h1ae8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1005 (32'h10031aec) +`define MLDSA_REG_MLDSA_SIGNATURE_1005 (32'h1aec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1006 (32'h10031af0) +`define MLDSA_REG_MLDSA_SIGNATURE_1006 (32'h1af0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1007 (32'h10031af4) +`define MLDSA_REG_MLDSA_SIGNATURE_1007 (32'h1af4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1008 (32'h10031af8) +`define MLDSA_REG_MLDSA_SIGNATURE_1008 (32'h1af8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1009 (32'h10031afc) +`define MLDSA_REG_MLDSA_SIGNATURE_1009 (32'h1afc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1010 (32'h10031b00) +`define MLDSA_REG_MLDSA_SIGNATURE_1010 (32'h1b00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1011 (32'h10031b04) +`define MLDSA_REG_MLDSA_SIGNATURE_1011 (32'h1b04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1012 (32'h10031b08) +`define MLDSA_REG_MLDSA_SIGNATURE_1012 (32'h1b08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1013 (32'h10031b0c) +`define MLDSA_REG_MLDSA_SIGNATURE_1013 (32'h1b0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1014 (32'h10031b10) +`define MLDSA_REG_MLDSA_SIGNATURE_1014 (32'h1b10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1015 (32'h10031b14) +`define MLDSA_REG_MLDSA_SIGNATURE_1015 (32'h1b14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1016 (32'h10031b18) +`define MLDSA_REG_MLDSA_SIGNATURE_1016 (32'h1b18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1017 (32'h10031b1c) +`define MLDSA_REG_MLDSA_SIGNATURE_1017 (32'h1b1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1018 (32'h10031b20) +`define MLDSA_REG_MLDSA_SIGNATURE_1018 (32'h1b20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1019 (32'h10031b24) +`define MLDSA_REG_MLDSA_SIGNATURE_1019 (32'h1b24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1020 (32'h10031b28) +`define MLDSA_REG_MLDSA_SIGNATURE_1020 (32'h1b28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1021 (32'h10031b2c) +`define MLDSA_REG_MLDSA_SIGNATURE_1021 (32'h1b2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1022 (32'h10031b30) +`define MLDSA_REG_MLDSA_SIGNATURE_1022 (32'h1b30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1023 (32'h10031b34) +`define MLDSA_REG_MLDSA_SIGNATURE_1023 (32'h1b34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1024 (32'h10031b38) +`define MLDSA_REG_MLDSA_SIGNATURE_1024 (32'h1b38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1025 (32'h10031b3c) +`define MLDSA_REG_MLDSA_SIGNATURE_1025 (32'h1b3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1026 (32'h10031b40) +`define MLDSA_REG_MLDSA_SIGNATURE_1026 (32'h1b40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1027 (32'h10031b44) +`define MLDSA_REG_MLDSA_SIGNATURE_1027 (32'h1b44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1028 (32'h10031b48) +`define MLDSA_REG_MLDSA_SIGNATURE_1028 (32'h1b48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1029 (32'h10031b4c) +`define MLDSA_REG_MLDSA_SIGNATURE_1029 (32'h1b4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1030 (32'h10031b50) +`define MLDSA_REG_MLDSA_SIGNATURE_1030 (32'h1b50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1031 (32'h10031b54) +`define MLDSA_REG_MLDSA_SIGNATURE_1031 (32'h1b54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1032 (32'h10031b58) +`define MLDSA_REG_MLDSA_SIGNATURE_1032 (32'h1b58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1033 (32'h10031b5c) +`define MLDSA_REG_MLDSA_SIGNATURE_1033 (32'h1b5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1034 (32'h10031b60) +`define MLDSA_REG_MLDSA_SIGNATURE_1034 (32'h1b60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1035 (32'h10031b64) +`define MLDSA_REG_MLDSA_SIGNATURE_1035 (32'h1b64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1036 (32'h10031b68) +`define MLDSA_REG_MLDSA_SIGNATURE_1036 (32'h1b68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1037 (32'h10031b6c) +`define MLDSA_REG_MLDSA_SIGNATURE_1037 (32'h1b6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1038 (32'h10031b70) +`define MLDSA_REG_MLDSA_SIGNATURE_1038 (32'h1b70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1039 (32'h10031b74) +`define MLDSA_REG_MLDSA_SIGNATURE_1039 (32'h1b74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1040 (32'h10031b78) +`define MLDSA_REG_MLDSA_SIGNATURE_1040 (32'h1b78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1041 (32'h10031b7c) +`define MLDSA_REG_MLDSA_SIGNATURE_1041 (32'h1b7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1042 (32'h10031b80) +`define MLDSA_REG_MLDSA_SIGNATURE_1042 (32'h1b80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1043 (32'h10031b84) +`define MLDSA_REG_MLDSA_SIGNATURE_1043 (32'h1b84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1044 (32'h10031b88) +`define MLDSA_REG_MLDSA_SIGNATURE_1044 (32'h1b88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1045 (32'h10031b8c) +`define MLDSA_REG_MLDSA_SIGNATURE_1045 (32'h1b8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1046 (32'h10031b90) +`define MLDSA_REG_MLDSA_SIGNATURE_1046 (32'h1b90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1047 (32'h10031b94) +`define MLDSA_REG_MLDSA_SIGNATURE_1047 (32'h1b94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1048 (32'h10031b98) +`define MLDSA_REG_MLDSA_SIGNATURE_1048 (32'h1b98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1049 (32'h10031b9c) +`define MLDSA_REG_MLDSA_SIGNATURE_1049 (32'h1b9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1050 (32'h10031ba0) +`define MLDSA_REG_MLDSA_SIGNATURE_1050 (32'h1ba0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1051 (32'h10031ba4) +`define MLDSA_REG_MLDSA_SIGNATURE_1051 (32'h1ba4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1052 (32'h10031ba8) +`define MLDSA_REG_MLDSA_SIGNATURE_1052 (32'h1ba8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1053 (32'h10031bac) +`define MLDSA_REG_MLDSA_SIGNATURE_1053 (32'h1bac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1054 (32'h10031bb0) +`define MLDSA_REG_MLDSA_SIGNATURE_1054 (32'h1bb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1055 (32'h10031bb4) +`define MLDSA_REG_MLDSA_SIGNATURE_1055 (32'h1bb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1056 (32'h10031bb8) +`define MLDSA_REG_MLDSA_SIGNATURE_1056 (32'h1bb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1057 (32'h10031bbc) +`define MLDSA_REG_MLDSA_SIGNATURE_1057 (32'h1bbc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1058 (32'h10031bc0) +`define MLDSA_REG_MLDSA_SIGNATURE_1058 (32'h1bc0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1059 (32'h10031bc4) +`define MLDSA_REG_MLDSA_SIGNATURE_1059 (32'h1bc4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1060 (32'h10031bc8) +`define MLDSA_REG_MLDSA_SIGNATURE_1060 (32'h1bc8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1061 (32'h10031bcc) +`define MLDSA_REG_MLDSA_SIGNATURE_1061 (32'h1bcc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1062 (32'h10031bd0) +`define MLDSA_REG_MLDSA_SIGNATURE_1062 (32'h1bd0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1063 (32'h10031bd4) +`define MLDSA_REG_MLDSA_SIGNATURE_1063 (32'h1bd4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1064 (32'h10031bd8) +`define MLDSA_REG_MLDSA_SIGNATURE_1064 (32'h1bd8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1065 (32'h10031bdc) +`define MLDSA_REG_MLDSA_SIGNATURE_1065 (32'h1bdc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1066 (32'h10031be0) +`define MLDSA_REG_MLDSA_SIGNATURE_1066 (32'h1be0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1067 (32'h10031be4) +`define MLDSA_REG_MLDSA_SIGNATURE_1067 (32'h1be4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1068 (32'h10031be8) +`define MLDSA_REG_MLDSA_SIGNATURE_1068 (32'h1be8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1069 (32'h10031bec) +`define MLDSA_REG_MLDSA_SIGNATURE_1069 (32'h1bec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1070 (32'h10031bf0) +`define MLDSA_REG_MLDSA_SIGNATURE_1070 (32'h1bf0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1071 (32'h10031bf4) +`define MLDSA_REG_MLDSA_SIGNATURE_1071 (32'h1bf4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1072 (32'h10031bf8) +`define MLDSA_REG_MLDSA_SIGNATURE_1072 (32'h1bf8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1073 (32'h10031bfc) +`define MLDSA_REG_MLDSA_SIGNATURE_1073 (32'h1bfc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1074 (32'h10031c00) +`define MLDSA_REG_MLDSA_SIGNATURE_1074 (32'h1c00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1075 (32'h10031c04) +`define MLDSA_REG_MLDSA_SIGNATURE_1075 (32'h1c04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1076 (32'h10031c08) +`define MLDSA_REG_MLDSA_SIGNATURE_1076 (32'h1c08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1077 (32'h10031c0c) +`define MLDSA_REG_MLDSA_SIGNATURE_1077 (32'h1c0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1078 (32'h10031c10) +`define MLDSA_REG_MLDSA_SIGNATURE_1078 (32'h1c10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1079 (32'h10031c14) +`define MLDSA_REG_MLDSA_SIGNATURE_1079 (32'h1c14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1080 (32'h10031c18) +`define MLDSA_REG_MLDSA_SIGNATURE_1080 (32'h1c18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1081 (32'h10031c1c) +`define MLDSA_REG_MLDSA_SIGNATURE_1081 (32'h1c1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1082 (32'h10031c20) +`define MLDSA_REG_MLDSA_SIGNATURE_1082 (32'h1c20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1083 (32'h10031c24) +`define MLDSA_REG_MLDSA_SIGNATURE_1083 (32'h1c24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1084 (32'h10031c28) +`define MLDSA_REG_MLDSA_SIGNATURE_1084 (32'h1c28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1085 (32'h10031c2c) +`define MLDSA_REG_MLDSA_SIGNATURE_1085 (32'h1c2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1086 (32'h10031c30) +`define MLDSA_REG_MLDSA_SIGNATURE_1086 (32'h1c30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1087 (32'h10031c34) +`define MLDSA_REG_MLDSA_SIGNATURE_1087 (32'h1c34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1088 (32'h10031c38) +`define MLDSA_REG_MLDSA_SIGNATURE_1088 (32'h1c38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1089 (32'h10031c3c) +`define MLDSA_REG_MLDSA_SIGNATURE_1089 (32'h1c3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1090 (32'h10031c40) +`define MLDSA_REG_MLDSA_SIGNATURE_1090 (32'h1c40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1091 (32'h10031c44) +`define MLDSA_REG_MLDSA_SIGNATURE_1091 (32'h1c44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1092 (32'h10031c48) +`define MLDSA_REG_MLDSA_SIGNATURE_1092 (32'h1c48) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1093 (32'h10031c4c) +`define MLDSA_REG_MLDSA_SIGNATURE_1093 (32'h1c4c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1094 (32'h10031c50) +`define MLDSA_REG_MLDSA_SIGNATURE_1094 (32'h1c50) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1095 (32'h10031c54) +`define MLDSA_REG_MLDSA_SIGNATURE_1095 (32'h1c54) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1096 (32'h10031c58) +`define MLDSA_REG_MLDSA_SIGNATURE_1096 (32'h1c58) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1097 (32'h10031c5c) +`define MLDSA_REG_MLDSA_SIGNATURE_1097 (32'h1c5c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1098 (32'h10031c60) +`define MLDSA_REG_MLDSA_SIGNATURE_1098 (32'h1c60) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1099 (32'h10031c64) +`define MLDSA_REG_MLDSA_SIGNATURE_1099 (32'h1c64) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1100 (32'h10031c68) +`define MLDSA_REG_MLDSA_SIGNATURE_1100 (32'h1c68) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1101 (32'h10031c6c) +`define MLDSA_REG_MLDSA_SIGNATURE_1101 (32'h1c6c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1102 (32'h10031c70) +`define MLDSA_REG_MLDSA_SIGNATURE_1102 (32'h1c70) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1103 (32'h10031c74) +`define MLDSA_REG_MLDSA_SIGNATURE_1103 (32'h1c74) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1104 (32'h10031c78) +`define MLDSA_REG_MLDSA_SIGNATURE_1104 (32'h1c78) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1105 (32'h10031c7c) +`define MLDSA_REG_MLDSA_SIGNATURE_1105 (32'h1c7c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1106 (32'h10031c80) +`define MLDSA_REG_MLDSA_SIGNATURE_1106 (32'h1c80) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1107 (32'h10031c84) +`define MLDSA_REG_MLDSA_SIGNATURE_1107 (32'h1c84) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1108 (32'h10031c88) +`define MLDSA_REG_MLDSA_SIGNATURE_1108 (32'h1c88) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1109 (32'h10031c8c) +`define MLDSA_REG_MLDSA_SIGNATURE_1109 (32'h1c8c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1110 (32'h10031c90) +`define MLDSA_REG_MLDSA_SIGNATURE_1110 (32'h1c90) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1111 (32'h10031c94) +`define MLDSA_REG_MLDSA_SIGNATURE_1111 (32'h1c94) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1112 (32'h10031c98) +`define MLDSA_REG_MLDSA_SIGNATURE_1112 (32'h1c98) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1113 (32'h10031c9c) +`define MLDSA_REG_MLDSA_SIGNATURE_1113 (32'h1c9c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1114 (32'h10031ca0) +`define MLDSA_REG_MLDSA_SIGNATURE_1114 (32'h1ca0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1115 (32'h10031ca4) +`define MLDSA_REG_MLDSA_SIGNATURE_1115 (32'h1ca4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1116 (32'h10031ca8) +`define MLDSA_REG_MLDSA_SIGNATURE_1116 (32'h1ca8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1117 (32'h10031cac) +`define MLDSA_REG_MLDSA_SIGNATURE_1117 (32'h1cac) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1118 (32'h10031cb0) +`define MLDSA_REG_MLDSA_SIGNATURE_1118 (32'h1cb0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1119 (32'h10031cb4) +`define MLDSA_REG_MLDSA_SIGNATURE_1119 (32'h1cb4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1120 (32'h10031cb8) +`define MLDSA_REG_MLDSA_SIGNATURE_1120 (32'h1cb8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1121 (32'h10031cbc) +`define MLDSA_REG_MLDSA_SIGNATURE_1121 (32'h1cbc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1122 (32'h10031cc0) +`define MLDSA_REG_MLDSA_SIGNATURE_1122 (32'h1cc0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1123 (32'h10031cc4) +`define MLDSA_REG_MLDSA_SIGNATURE_1123 (32'h1cc4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1124 (32'h10031cc8) +`define MLDSA_REG_MLDSA_SIGNATURE_1124 (32'h1cc8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1125 (32'h10031ccc) +`define MLDSA_REG_MLDSA_SIGNATURE_1125 (32'h1ccc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1126 (32'h10031cd0) +`define MLDSA_REG_MLDSA_SIGNATURE_1126 (32'h1cd0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1127 (32'h10031cd4) +`define MLDSA_REG_MLDSA_SIGNATURE_1127 (32'h1cd4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1128 (32'h10031cd8) +`define MLDSA_REG_MLDSA_SIGNATURE_1128 (32'h1cd8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1129 (32'h10031cdc) +`define MLDSA_REG_MLDSA_SIGNATURE_1129 (32'h1cdc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1130 (32'h10031ce0) +`define MLDSA_REG_MLDSA_SIGNATURE_1130 (32'h1ce0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1131 (32'h10031ce4) +`define MLDSA_REG_MLDSA_SIGNATURE_1131 (32'h1ce4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1132 (32'h10031ce8) +`define MLDSA_REG_MLDSA_SIGNATURE_1132 (32'h1ce8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1133 (32'h10031cec) +`define MLDSA_REG_MLDSA_SIGNATURE_1133 (32'h1cec) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1134 (32'h10031cf0) +`define MLDSA_REG_MLDSA_SIGNATURE_1134 (32'h1cf0) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1135 (32'h10031cf4) +`define MLDSA_REG_MLDSA_SIGNATURE_1135 (32'h1cf4) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1136 (32'h10031cf8) +`define MLDSA_REG_MLDSA_SIGNATURE_1136 (32'h1cf8) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1137 (32'h10031cfc) +`define MLDSA_REG_MLDSA_SIGNATURE_1137 (32'h1cfc) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1138 (32'h10031d00) +`define MLDSA_REG_MLDSA_SIGNATURE_1138 (32'h1d00) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1139 (32'h10031d04) +`define MLDSA_REG_MLDSA_SIGNATURE_1139 (32'h1d04) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1140 (32'h10031d08) +`define MLDSA_REG_MLDSA_SIGNATURE_1140 (32'h1d08) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1141 (32'h10031d0c) +`define MLDSA_REG_MLDSA_SIGNATURE_1141 (32'h1d0c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1142 (32'h10031d10) +`define MLDSA_REG_MLDSA_SIGNATURE_1142 (32'h1d10) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1143 (32'h10031d14) +`define MLDSA_REG_MLDSA_SIGNATURE_1143 (32'h1d14) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1144 (32'h10031d18) +`define MLDSA_REG_MLDSA_SIGNATURE_1144 (32'h1d18) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1145 (32'h10031d1c) +`define MLDSA_REG_MLDSA_SIGNATURE_1145 (32'h1d1c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1146 (32'h10031d20) +`define MLDSA_REG_MLDSA_SIGNATURE_1146 (32'h1d20) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1147 (32'h10031d24) +`define MLDSA_REG_MLDSA_SIGNATURE_1147 (32'h1d24) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1148 (32'h10031d28) +`define MLDSA_REG_MLDSA_SIGNATURE_1148 (32'h1d28) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1149 (32'h10031d2c) +`define MLDSA_REG_MLDSA_SIGNATURE_1149 (32'h1d2c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1150 (32'h10031d30) +`define MLDSA_REG_MLDSA_SIGNATURE_1150 (32'h1d30) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1151 (32'h10031d34) +`define MLDSA_REG_MLDSA_SIGNATURE_1151 (32'h1d34) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1152 (32'h10031d38) +`define MLDSA_REG_MLDSA_SIGNATURE_1152 (32'h1d38) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1153 (32'h10031d3c) +`define MLDSA_REG_MLDSA_SIGNATURE_1153 (32'h1d3c) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1154 (32'h10031d40) +`define MLDSA_REG_MLDSA_SIGNATURE_1154 (32'h1d40) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1155 (32'h10031d44) +`define MLDSA_REG_MLDSA_SIGNATURE_1155 (32'h1d44) +`define CLP_MLDSA_REG_MLDSA_SIGNATURE_1156 (32'h10031d48) +`define MLDSA_REG_MLDSA_SIGNATURE_1156 (32'h1d48) +`define CLP_MLDSA_REG_MLDSA_PRIVKEY_OUT (32'h10032000) +`define MLDSA_REG_MLDSA_PRIVKEY_OUT (32'h2000) +`define CLP_MLDSA_REG_MLDSA_PRIVKEY_IN (32'h10034000) +`define MLDSA_REG_MLDSA_PRIVKEY_IN (32'h4000) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_START (32'h10036000) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R (32'h10036000) +`define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R (32'h6000) +`define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_ERROR_EN_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_ERROR_EN_MASK (32'h1) +`define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_NOTIF_EN_LOW (1) +`define MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_NOTIF_EN_MASK (32'h2) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R (32'h10036004) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R (32'h6004) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_INTERNAL_EN_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_INTERNAL_EN_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R (32'h10036008) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R (32'h6008) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R_NOTIF_CMD_DONE_EN_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R_NOTIF_CMD_DONE_EN_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R (32'h1003600c) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R (32'h600c) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R_AGG_STS_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_GLOBAL_INTR_R_AGG_STS_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R (32'h10036010) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R (32'h6010) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R_AGG_STS_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_GLOBAL_INTR_R_AGG_STS_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R (32'h10036014) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R (32'h6014) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R (32'h10036018) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R (32'h6018) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R (32'h1003601c) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R (32'h601c) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R_ERROR_INTERNAL_TRIG_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_TRIG_R_ERROR_INTERNAL_TRIG_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R (32'h10036020) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R (32'h6020) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R_NOTIF_CMD_DONE_TRIG_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_TRIG_R_NOTIF_CMD_DONE_TRIG_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_R (32'h10036100) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_R (32'h6100) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_R (32'h10036180) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_R (32'h6180) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R (32'h10036200) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R (32'h6200) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R_PULSE_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_COUNT_INCR_R_PULSE_MASK (32'h1) +`define CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R (32'h10036204) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R (32'h6204) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_LOW (0) +`define MLDSA_REG_INTR_BLOCK_RF_NOTIF_CMD_DONE_INTR_COUNT_INCR_R_PULSE_MASK (32'h1) `define CLP_SPI_HOST_REG_BASE_ADDR (32'h20000000) `define CLP_SPI_HOST_REG_INTERRUPT_STATE (32'h20000000) `define SPI_HOST_REG_INTERRUPT_STATE (32'h0) diff --git a/src/integration/rtl/caliptra_top.sv b/src/integration/rtl/caliptra_top.sv index 5bedde743..eb3fa80a0 100755 --- a/src/integration/rtl/caliptra_top.sv +++ b/src/integration/rtl/caliptra_top.sv @@ -214,6 +214,8 @@ module caliptra_top wire sha512_notif_intr; wire sha256_error_intr; wire sha256_notif_intr; + wire mldsa_error_intr; + wire mldsa_notif_intr; wire qspi_error_intr; wire qspi_notif_intr; wire uart_error_intr; @@ -356,6 +358,7 @@ end always_comb ahb_lite_resp_disable[`CALIPTRA_SLAVE_SEL_IMEM] = 1'b0; always_comb ahb_lite_resp_disable[`CALIPTRA_SLAVE_SEL_CSRNG] = 1'b0; always_comb ahb_lite_resp_disable[`CALIPTRA_SLAVE_SEL_ENTROPY_SRC] = 1'b0; + always_comb ahb_lite_resp_disable[`CALIPTRA_SLAVE_SEL_MLDSA] = 1'b0; //=========================================================================- // RTL instance @@ -404,6 +407,8 @@ always_comb begin intr[`VEER_INTR_VEC_SOC_IFC_NOTIF-1] = soc_ifc_notif_intr; intr[`VEER_INTR_VEC_SHA_ERROR -1] = sha_error_intr; intr[`VEER_INTR_VEC_SHA_NOTIF -1] = sha_notif_intr; + intr[`VEER_INTR_VEC_MLDSA_ERROR -1] = mldsa_error_intr; + intr[`VEER_INTR_VEC_MLDSA_NOTIF -1] = mldsa_notif_intr; intr[NUM_INTR-1:`VEER_INTR_VEC_MAX_ASSIGNED] = '0; end @@ -896,6 +901,28 @@ hmac_ctrl #( ); +mldsa_top #( + .AHB_DATA_WIDTH(`CALIPTRA_AHB_HDATA_SIZE), + .AHB_ADDR_WIDTH(`CALIPTRA_SLAVE_ADDR_WIDTH(`CALIPTRA_SLAVE_SEL_MLDSA)), + .CLIENT_DATA_WIDTH(`CALIPTRA_AHB_HDATA_SIZE/2) //TODO confirm +) mldsa ( + .clk (clk_cg), + .rst_b (cptra_noncore_rst_b), + //TODO: pwrgood + .haddr_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].haddr[`CALIPTRA_SLAVE_ADDR_WIDTH(`CALIPTRA_SLAVE_SEL_MLDSA)-1:0]), + .hwdata_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hwdata), + .hsel_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hsel), + .hwrite_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hwrite), + .hready_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hready), + .htrans_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].htrans), + .hsize_i (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hsize), + .hresp_o (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hresp), + .hreadyout_o (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hreadyout), + .hrdata_o (responder_inst[`CALIPTRA_SLAVE_SEL_MLDSA].hrdata), + .error_intr (mldsa_error_intr), + .notif_intr (mldsa_notif_intr) +); + kv #( .AHB_ADDR_WIDTH(`CALIPTRA_SLAVE_ADDR_WIDTH(`CALIPTRA_SLAVE_SEL_KV)), .AHB_DATA_WIDTH(`CALIPTRA_AHB_HDATA_SIZE) diff --git a/src/integration/rtl/config_defines.svh b/src/integration/rtl/config_defines.svh index 1a52b4002..2ce4b994d 100755 --- a/src/integration/rtl/config_defines.svh +++ b/src/integration/rtl/config_defines.svh @@ -18,7 +18,7 @@ // Uncomment to enable Caliptra Internal TRNG //`define CALIPTRA_INTERNAL_TRNG - `define CALIPTRA_AHB_SLAVES_NUM 5'd17 // Number of slaves AHB + `define CALIPTRA_AHB_SLAVES_NUM 5'd18 // Number of slaves AHB `define CALIPTRA_AHB_MASTERS_NUM 4'd1 // Number of masters AHB `define CALIPTRA_AHB_HADDR_SIZE 32 // bit-width AHB address haddr `define CALIPTRA_AHB_HDATA_SIZE 64 // bit-width AHB data @@ -30,9 +30,9 @@ `define CALIPTRA_SOC_SEC_STATE_WIDTH 3 // AHB Address Map - `define CALIPTRA_SLAVE_NAMES {"ENTROPY_SRC", "CSRNG" , "IMEM" , "SHA256" , "VEER_ICCM_DMA" , "VEER_DCCM_DMA" , "SOC_IFC" , "I3C" , "UART" , "QSPI" , "SHA512" , "DATAVAULT" , "PCRVAULT" , "KEYVAULT" , "HMAC" , "ECC" , "DOE_CTRL" } /* Array of names for peripherals */ - `define CALIPTRA_SLAVE_BASE_ADDR {32'h2000_3000, 32'h2000_2000, 32'h0000_0000, 32'h1002_8000, 32'h4000_0000 , 32'h5000_0000 , 32'h3000_0000, 32'hFFFF_FFFF, 32'h2000_1000, 32'h2000_0000, 32'h1002_0000, 32'h1001_C000, 32'h1001_A000, 32'h1001_8000, 32'h1001_0000, 32'h1000_8000, 32'h1000_0000} /* Array with slave base address */ - `define CALIPTRA_SLAVE_MASK_ADDR {32'h2000_3FFF, 32'h2000_2FFF, 32'h0000_BFFF, 32'h1002_FFFF, 32'h4001_FFFF , 32'h5001_FFFF , 32'h3003_FFFF, 32'hFFFF_FFFF, 32'h2000_1FFF, 32'h2000_0FFF, 32'h1002_7FFF, 32'h1001_DFFF, 32'h1001_BFFF, 32'h1001_9FFF, 32'h1001_0FFF, 32'h1000_FFFF, 32'h1000_7FFF} /* Array with slave offset address */ + `define CALIPTRA_SLAVE_NAMES {"ENTROPY_SRC", "CSRNG" , "IMEM" , "SHA256" , "VEER_ICCM_DMA" , "VEER_DCCM_DMA" , "SOC_IFC" , "I3C" , "UART" , "QSPI" , "SHA512" , "DATAVAULT" , "PCRVAULT" , "KEYVAULT" , "HMAC" , "ECC" , "DOE_CTRL", "MLDSA" } /* Array of names for peripherals */ + `define CALIPTRA_SLAVE_BASE_ADDR { 32'h1003_0000, 32'h2000_3000, 32'h2000_2000, 32'h0000_0000, 32'h1002_8000, 32'h4000_0000 , 32'h5000_0000 , 32'h3000_0000, 32'hFFFF_FFFF, 32'h2000_1000, 32'h2000_0000, 32'h1002_0000, 32'h1001_C000, 32'h1001_A000, 32'h1001_8000, 32'h1001_0000, 32'h1000_8000, 32'h1000_0000} /* Array with slave base address */ + `define CALIPTRA_SLAVE_MASK_ADDR { 32'h1003_7FFF, 32'h2000_3FFF, 32'h2000_2FFF, 32'h0000_BFFF, 32'h1002_FFFF, 32'h4001_FFFF , 32'h5001_FFFF , 32'h3003_FFFF, 32'hFFFF_FFFF, 32'h2000_1FFF, 32'h2000_0FFF, 32'h1002_7FFF, 32'h1001_DFFF, 32'h1001_BFFF, 32'h1001_9FFF, 32'h1001_0FFF, 32'h1000_FFFF, 32'h1000_7FFF} /* Array with slave offset address */ `define CALIPTRA_SLAVE_ADDR_MASK (`CALIPTRA_SLAVE_BASE_ADDR ^ `CALIPTRA_SLAVE_MASK_ADDR) /* Array indicating meaningful address bits for each slave */ `define CALIPTRA_SLAVE_ADDR_WIDTH(n) $clog2((`CALIPTRA_SLAVE_ADDR_MASK >> (`CALIPTRA_AHB_HADDR_SIZE*n)) & {`CALIPTRA_AHB_HADDR_SIZE{1'b1}}) /* Decode address width for each slave from assigned BASE/MASK address */ `define CALIPTRA_SLAVE_SEL_DOE 0 @@ -52,6 +52,7 @@ `define CALIPTRA_SLAVE_SEL_IMEM 14 `define CALIPTRA_SLAVE_SEL_CSRNG 15 `define CALIPTRA_SLAVE_SEL_ENTROPY_SRC 16 + `define CALIPTRA_SLAVE_SEL_MLDSA 17 // Interrupt Assignments // NOTE Vector 0 is reserved by VeeR @@ -77,8 +78,10 @@ `define VEER_INTR_VEC_SOC_IFC_NOTIF 20 `define VEER_INTR_VEC_SHA_ERROR 21 `define VEER_INTR_VEC_SHA_NOTIF 22 + `define VEER_INTR_VEC_MLDSA_ERROR 23 + `define VEER_INTR_VEC_MLDSA_NOTIF 24 // Used to tie-off unused upper intr bits - `define VEER_INTR_VEC_MAX_ASSIGNED `VEER_INTR_VEC_SHA_NOTIF + `define VEER_INTR_VEC_MAX_ASSIGNED `VEER_INTR_VEC_MLDSA_NOTIF //`define CALIPTRA_KV_NUM_READ 6 //`define CALIPTRA_KV_NUM_WRITE 4 diff --git a/src/integration/tb/caliptra_top_tb_services.sv b/src/integration/tb/caliptra_top_tb_services.sv index 5eaf68bd6..0e4c6b82f 100644 --- a/src/integration/tb/caliptra_top_tb_services.sv +++ b/src/integration/tb/caliptra_top_tb_services.sv @@ -224,6 +224,18 @@ module caliptra_top_tb_services sha256_wntz_test_vector_t sha256_wntz_test_vector; + typedef struct packed { + logic [0:7][31:0] seed; + logic [0:647][31:0] pubkey; + logic [0:1223][31:0] privkey; + logic [0:15][31:0] msg; + logic [0:1156][31:0] signature; + logic [0:15][31:0] verify_res; + logic [0:7][31:0] sign_rnd; + } mldsa_test_vector_t; + + mldsa_test_vector_t mldsa_test_vector; + // Upwards name referencing per 23.8 of IEEE 1800-2017 `define DEC caliptra_top_dut.rvtop.veer.dec @@ -250,6 +262,10 @@ module caliptra_top_tb_services // 8'h9a - Inject invalid zero sign_s into ECC // 8'ha0: 8'ha7 - Inject HMAC_KEY to kv_key register // 8'hc0: 8'hc7 - Inject SHA_BLOCK to kv_key register + // 8'hd9 - Perform mldsa keygen + // 8'hda - Perform mldsa signing + // 8'hdb - Perform mldsa verify + // 8'hdc - Perform mldsa keygen+signing // 8'hdd - Inject random block input to SHA256 WNTZ module // 8'hde - ICCM SRAM force loop read (requires read params written to other bytes of generic wires) // 8'hdf - DCCM SRAM force loop read (requires read params written to other bytes of generic wires) @@ -558,6 +574,84 @@ module caliptra_top_tb_services assert_ss_tran <= 'b0; end end + + //MLDSA + logic mldsa_keygen, mldsa_signing, mldsa_verify, mldsa_keygen_signing; + always @(negedge clk or negedge cptra_rst_b) begin + if (!cptra_rst_b) begin + mldsa_keygen <= 'b0; + mldsa_signing <= 'b0; + mldsa_verify <= 'b0; + end + else if ((WriteData[7:0] == 8'hd9) && mailbox_write) begin + mldsa_keygen <= 'b1; + mldsa_signing <= 'b0; + mldsa_verify <= 'b0; + $display("In keygen branch\n"); + end + //unlock debug mode + else if ((WriteData[7:0] == 8'hda) && mailbox_write) begin + mldsa_keygen <= 'b0; + mldsa_signing <= 'b1; + mldsa_verify <= 'b0; + $display("In signing branch\n"); + end + else if((WriteData[7:0] == 8'hdb) && mailbox_write) begin + mldsa_keygen <= 'b0; + mldsa_signing <= 'b0; + mldsa_verify <= 'b1; + $display("In verify branch\n"); + end + end + + generate + for (genvar dword = 0; dword < 8; dword++) begin + always@(negedge clk) begin + //Inject mldsa seed + if (mldsa_keygen) begin + force caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_SEED[dword].SEED.value = {mldsa_test_vector.seed[7-dword][7:0], mldsa_test_vector.seed[7-dword][15:8], mldsa_test_vector.seed[7-dword][23:16], mldsa_test_vector.seed[7-dword][31:24]}; + end + else + release caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_SEED[dword].SEED.value; + + //Inject mldsa sign_rnd + if (mldsa_signing) + force caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_SIGN_RND[dword].SIGN_RND.value = {mldsa_test_vector.sign_rnd[7-dword][7:0], mldsa_test_vector.sign_rnd[7-dword][15:8], mldsa_test_vector.sign_rnd[7-dword][23:16], mldsa_test_vector.sign_rnd[7-dword][31:24]}; + else + release caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_SIGN_RND[dword].SIGN_RND.value; + end + end + + for (genvar dword = 0; dword < 16; dword++) begin + always@(negedge clk) begin + //Inject mldsa msg + if (mldsa_signing) + force caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_MSG[dword].MSG.value = {mldsa_test_vector.msg[15-dword][7:0], mldsa_test_vector.msg[15-dword][15:8], mldsa_test_vector.msg[15-dword][23:16], mldsa_test_vector.msg[15-dword][31:24]}; + else + release caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_MSG[dword].MSG.value; + end + end + + // for (genvar dword = 0; dword < 648; dword++) begin + // always@(negedge clk) begin + // //Inject mldsa pubkey + // if (mldsa_verify) + // force caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_PUBKEY[dword].PUBKEY.value = {mldsa_test_vector.pubkey[647-dword][7:0], mldsa_test_vector.pubkey[647-dword][15:8], mldsa_test_vector.pubkey[647-dword][23:16], mldsa_test_vector.pubkey[647-dword][31:24]}; + // else + // release caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_PUBKEY[dword].PUBKEY.value; + // end + // end + + // for (genvar dword = 0; dword < 1157; dword++) begin + // always@(negedge clk) begin + // //Inject mldsa signature + // if (mldsa_verify) + // force caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_SIGNATURE[dword].SIGNATURE.value = {mldsa_test_vector.signature[1156-dword][7:0], mldsa_test_vector.signature[1156-dword][15:8], mldsa_test_vector.signature[1156-dword][23:16], mldsa_test_vector.signature[1156-dword][31:24]}; + // else + // release caliptra_top_dut.mldsa.mldsa_reg_inst.hwif_out.MLDSA_SIGNATURE[dword].SIGNATURE.value; + // end + // end + endgenerate //Randomized wntz generate @@ -798,6 +892,89 @@ endgenerate //IV_NO endtask + // task mldsa_input_hex_gen (input int mode); //mode = CTRL.value-1 + // int fd_r; + // string outfile; + // outfile = "mldsa_input.hex"; + + // logic [7:0][31:0] seed; + // logic [15:0][31:0] msg; + // logic [1223:0][31:0] privkey; + // logic [647:0][31:0] pubkey; + // logic [1156:0][31:0] signature; + // fd_r = $fopen(outfile, "w"); + + // seed = $urandom(); + // if (mode == 0) begin //keygen + // $fwrite(fd_r, "%2h", mode); //write cmd (in this case mode-1) as a 2 digit number + // $fwrite(fd_r, "%h", seed); //write random seed 8*4 bytes + // end + // // else if (mode == 1) begin //sign + // // $fwrite(fd_r, "%2h", mode); //write cmd + // // $fwrite(fd_r, "%128h", 1); //write msg + // // $fwrite(fd_r, "%h", privkey); //write privkey + // // end + // // else if (mode == 2) begin //verify + // // $fwrite(fd_r, "%2h", mode); //write cmd + // // $fwrite(fd_r, "%128h", 1); //write msg + // // $fwrite(fd_r, "%h", pubkey); //write pubkey - ideally comes from keygen step. TODO: fixme + // // $fwrite(fd_r, "%h", signature); + // // end + // endtask + + // task mldsa_output_hex_gen (); + // string infile, outfile; + // begin + // infile = "mldsa_input.hex"; + // outfile = "mldsa_output.hex"; + // $system("./test_dilithium5 mldsa_input.hex mldsa_output.hex"); + + // if (!UVM_TB) mldsa_read_test_vectors(outfile); + // end + // endtask + + task mldsa_testvector_generator (); + string file_name; + begin + + // $system("./test_dilithium5 mldsa_input.hex mldsa_output.hex"); + + file_name = "smoke_test_mldsa_vector.hex"; + if (!UVM_TB) mldsa_read_test_vectors(file_name); + end + endtask // mldsa_test + + task static mldsa_read_test_vectors (input string fname); + integer values_per_test_vector; + int fd_r; + string line_read; + begin + // // ATTN: Must match the number of fields generated by gen_mm_test_vectors.py script + values_per_test_vector = 7; + + fd_r = $fopen(fname, "r"); + if (fd_r == 0) + $error("Can't open file %s", fname); + + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.seed)); + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.pubkey)); + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.privkey)); + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.msg)); + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.signature)); + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.verify_res)); + void'($fgets(line_read, fd_r)); + void'($sscanf(line_read, "%h", mldsa_test_vector.sign_rnd)); + + $fclose(fd_r); + end + endtask + task ecc_testvector_generator (); string file_name; begin @@ -1277,7 +1454,8 @@ endgenerate //IV_NO ecc_testvector_generator(); doe_testvector_generator(); sha256_wntz_testvector_generator(); - + + mldsa_testvector_generator(); //Note: Both obf_key_uds and obf_key_fe are the same //for(int dword = 0; dword < `CLP_OBF_KEY_DWORDS; dword++) begin // cptra_obf_key_tb[dword] = doe_test_vector.obf_key_uds[(`CLP_OBF_KEY_DWORDS-1)-dword]; diff --git a/src/integration/test_suites/c_intr_handler/c_intr_handler.c b/src/integration/test_suites/c_intr_handler/c_intr_handler.c index 01e11447c..3caa8e26d 100644 --- a/src/integration/test_suites/c_intr_handler/c_intr_handler.c +++ b/src/integration/test_suites/c_intr_handler/c_intr_handler.c @@ -57,6 +57,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main(void) { diff --git a/src/integration/test_suites/c_intr_handler/caliptra_isr.h b/src/integration/test_suites/c_intr_handler/caliptra_isr.h index 517e72b37..b5b56434d 100644 --- a/src/integration/test_suites/c_intr_handler/caliptra_isr.h +++ b/src/integration/test_suites/c_intr_handler/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -222,5 +224,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/caliptra_demo/caliptra_isr.h b/src/integration/test_suites/caliptra_demo/caliptra_isr.h index 983bd1b2b..c058fd396 100644 --- a/src/integration/test_suites/caliptra_demo/caliptra_isr.h +++ b/src/integration/test_suites/caliptra_demo/caliptra_isr.h @@ -183,5 +183,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/caliptra_fmc/caliptra_isr.h b/src/integration/test_suites/caliptra_fmc/caliptra_isr.h index 542d6572b..4908c9288 100644 --- a/src/integration/test_suites/caliptra_fmc/caliptra_isr.h +++ b/src/integration/test_suites/caliptra_fmc/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -251,5 +253,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/caliptra_rt/caliptra_isr.h b/src/integration/test_suites/caliptra_rt/caliptra_isr.h index 1f7d023bc..7a4aa06eb 100644 --- a/src/integration/test_suites/caliptra_rt/caliptra_isr.h +++ b/src/integration/test_suites/caliptra_rt/caliptra_isr.h @@ -54,6 +54,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -247,5 +249,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/caliptra_rt/caliptra_rt.c b/src/integration/test_suites/caliptra_rt/caliptra_rt.c index 88121c44a..72006f8fe 100644 --- a/src/integration/test_suites/caliptra_rt/caliptra_rt.c +++ b/src/integration/test_suites/caliptra_rt/caliptra_rt.c @@ -72,6 +72,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; #define CLEAR_INTR_FLAG_SAFELY(flag, mask) \ csr_clr_bits_mstatus(MSTATUS_MIE_BIT_MASK); \ diff --git a/src/integration/test_suites/caliptra_top/caliptra_isr.h b/src/integration/test_suites/caliptra_top/caliptra_isr.h index 3fd30343d..b15b21f55 100644 --- a/src/integration/test_suites/caliptra_top/caliptra_isr.h +++ b/src/integration/test_suites/caliptra_top/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -231,5 +233,26 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() { + volatile uint32_t * reg = (volatile uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R); + uint32_t sts = *reg; + if (sts != 0) { + cptra_intr_rcv.mldsa_error = 0xFFFFFFFF; + VPRINTF(FATAL,"caliptra_top (ROM) val image does not support interrupts!\n"); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_mldsa_notif_intr() { + volatile uint32_t * reg = (volatile uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + if (sts != 0) { + cptra_intr_rcv.mldsa_notif = 0xFFFFFFFF; + VPRINTF(FATAL,"caliptra_top (ROM) val image does not support interrupts!\n"); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/hello_world_iccm/caliptra_isr.h b/src/integration/test_suites/hello_world_iccm/caliptra_isr.h index 8f5779e04..eb000775b 100644 --- a/src/integration/test_suites/hello_world_iccm/caliptra_isr.h +++ b/src/integration/test_suites/hello_world_iccm/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/iccm_lock/caliptra_isr.h b/src/integration/test_suites/iccm_lock/caliptra_isr.h index 0bdef173f..2a3458ff7 100644 --- a/src/integration/test_suites/iccm_lock/caliptra_isr.h +++ b/src/integration/test_suites/iccm_lock/caliptra_isr.h @@ -54,6 +54,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -241,5 +243,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/iccm_lock/iccm_lock.c b/src/integration/test_suites/iccm_lock/iccm_lock.c index 416c449fc..1a953fbb6 100644 --- a/src/integration/test_suites/iccm_lock/iccm_lock.c +++ b/src/integration/test_suites/iccm_lock/iccm_lock.c @@ -57,6 +57,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; extern uintptr_t iccm_code0_start, iccm_code0_end; diff --git a/src/integration/test_suites/includes/caliptra_defines.h b/src/integration/test_suites/includes/caliptra_defines.h index 4214fdd3b..c55109588 100644 --- a/src/integration/test_suites/includes/caliptra_defines.h +++ b/src/integration/test_suites/includes/caliptra_defines.h @@ -79,6 +79,14 @@ #define STATUS_READY_BIT 0x0 #define STATUS_VALID_BIT 0x1 +/* ---- MLDSA ----*/ +#define MLDSA_CMD_KEYGEN 0x1 +#define MLDSA_CMD_SIGNING 0x2 +#define MLDSA_CMD_VERIFYING 0x3 +#define MLDSA_CMD_KEYGEN_SIGN 0x4 +// #define STATUS_READY_BIT 0x0 +// #define STATUS_VALID_BIT 0x1 + /* ---- Interrupts ---- */ #define VEER_INTR_VEC_DOE_ERROR 1 #define VEER_INTR_VEC_DOE_NOTIF 2 @@ -102,8 +110,10 @@ #define VEER_INTR_VEC_SOC_IFC_NOTIF 20 #define VEER_INTR_VEC_SHA512_ACC_ERROR 21 #define VEER_INTR_VEC_SHA512_ACC_NOTIF 22 +#define VEER_INTR_VEC_MLDSA_ERROR 23 +#define VEER_INTR_VEC_MLDSA_NOTIF 24 // Used to tie-off unused upper intr bits -#define VEER_INTR_VEC_MAX_ASSIGNED VEER_INTR_VEC_SHA512_ACC_NOTIF +#define VEER_INTR_VEC_MAX_ASSIGNED VEER_INTR_VEC_MLDSA_NOTIF #define VEER_INTR_PRIO_DOE_ERROR 8 #define VEER_INTR_PRIO_DOE_NOTIF 7 @@ -127,6 +137,8 @@ #define VEER_INTR_PRIO_I3C_NOTIF 3 #define VEER_INTR_PRIO_SOC_IFC_ERROR 8 #define VEER_INTR_PRIO_SOC_IFC_NOTIF 7 +#define VEER_INTR_PRIO_MLDSA_ERROR 8 +#define VEER_INTR_PRIO_MLDSA_NOTIF 7 #endif // CALIPTRA_DEFINES_H diff --git a/src/integration/test_suites/infinite_loop/caliptra_isr.h b/src/integration/test_suites/infinite_loop/caliptra_isr.h index 7bd443326..53dc7a897 100644 --- a/src/integration/test_suites/infinite_loop/caliptra_isr.h +++ b/src/integration/test_suites/infinite_loop/caliptra_isr.h @@ -49,6 +49,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; ////////////////////////////////////////////////////////////////////////////// @@ -87,4 +89,7 @@ inline void service_soc_ifc_notif_intr () {return;} inline void service_sha512_acc_error_intr() {return;} inline void service_sha512_acc_notif_intr() {return;} +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() {return;} + #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/libs/caliptra_isr/caliptra_isr.c b/src/integration/test_suites/libs/caliptra_isr/caliptra_isr.c index 459b00eea..d4d49d0c9 100644 --- a/src/integration/test_suites/libs/caliptra_isr/caliptra_isr.c +++ b/src/integration/test_suites/libs/caliptra_isr/caliptra_isr.c @@ -66,6 +66,8 @@ static void nonstd_veer_isr_sha512_error (void) __attribute__ ((interrupt ("mac static void nonstd_veer_isr_sha512_notif (void) __attribute__ ((interrupt ("machine"))); static void nonstd_veer_isr_sha256_error (void) __attribute__ ((interrupt ("machine"))); static void nonstd_veer_isr_sha256_notif (void) __attribute__ ((interrupt ("machine"))); +static void nonstd_veer_isr_mldsa_error (void) __attribute__ ((interrupt ("machine"))); +static void nonstd_veer_isr_mldsa_notif (void) __attribute__ ((interrupt ("machine"))); static void nonstd_veer_isr_qspi_error (void) __attribute__ ((interrupt ("machine"))); static void nonstd_veer_isr_qspi_notif (void) __attribute__ ((interrupt ("machine"))); static void nonstd_veer_isr_uart_error (void) __attribute__ ((interrupt ("machine"))); @@ -101,10 +103,10 @@ static void (* const nonstd_veer_isr_18) (void) = std_rv_nop_machine ; static void (* const nonstd_veer_isr_19) (void) = nonstd_veer_isr_soc_ifc_error; // | static void (* const nonstd_veer_isr_20) (void) = nonstd_veer_isr_soc_ifc_notif; // | static void (* const nonstd_veer_isr_21) (void) = nonstd_veer_isr_sha512_acc_error;// | -static void (* const nonstd_veer_isr_22) (void) = nonstd_veer_isr_sha512_acc_notif;// -------' -static void (* const nonstd_veer_isr_23) (void) = std_rv_nop_machine; // --------| -static void (* const nonstd_veer_isr_24) (void) = std_rv_nop_machine; // | -static void (* const nonstd_veer_isr_25) (void) = std_rv_nop_machine; // | +static void (* const nonstd_veer_isr_22) (void) = nonstd_veer_isr_sha512_acc_notif;// | +static void (* const nonstd_veer_isr_23) (void) = nonstd_veer_isr_mldsa_error ; // | +static void (* const nonstd_veer_isr_24) (void) = nonstd_veer_isr_mldsa_notif ; //-------.| +static void (* const nonstd_veer_isr_25) (void) = std_rv_nop_machine; // -------'| static void (* const nonstd_veer_isr_26) (void) = std_rv_nop_machine; // Unimplemented ISR static void (* const nonstd_veer_isr_27) (void) = std_rv_nop_machine; // | static void (* const nonstd_veer_isr_28) (void) = std_rv_nop_machine; // | @@ -177,6 +179,7 @@ void init_interrupts(void) { volatile uint32_t * const sha512_reg = (uint32_t*) CLP_SHA512_REG_BASE_ADDR; volatile uint32_t * const sha256_reg = (uint32_t*) CLP_SHA256_REG_BASE_ADDR; volatile uint32_t * const sha512_acc_csr = (uint32_t*) CLP_SHA512_ACC_CSR_BASE_ADDR; + volatile uint32_t * const mldsa_reg = (uint32_t*) CLP_MLDSA_REG_BASE_ADDR; volatile uint32_t * const mtime_l = (uint32_t*) CLP_SOC_IFC_REG_INTERNAL_RV_MTIME_L; volatile uint32_t * const mtime_h = (uint32_t*) CLP_SOC_IFC_REG_INTERNAL_RV_MTIME_H; volatile uint32_t * const mtimecmp_l = (uint32_t*) CLP_SOC_IFC_REG_INTERNAL_RV_MTIMECMP_L; @@ -240,6 +243,8 @@ void init_interrupts(void) { meipls[VEER_INTR_VEC_SOC_IFC_NOTIF ] = VEER_INTR_PRIO_SOC_IFC_NOTIF ; __asm__ volatile ("fence"); meipls[VEER_INTR_VEC_SHA512_ACC_ERROR] = VEER_INTR_PRIO_SHA512_ACC_ERROR; __asm__ volatile ("fence"); meipls[VEER_INTR_VEC_SHA512_ACC_NOTIF] = VEER_INTR_PRIO_SHA512_ACC_NOTIF; __asm__ volatile ("fence"); + meipls[VEER_INTR_VEC_MLDSA_ERROR ] = VEER_INTR_PRIO_MLDSA_ERROR ; __asm__ volatile ("fence"); + meipls[VEER_INTR_VEC_MLDSA_NOTIF ] = VEER_INTR_PRIO_MLDSA_NOTIF ; __asm__ volatile ("fence"); for (uint8_t undef = VEER_INTR_VEC_MAX_ASSIGNED+1; undef <= RV_PIC_TOTAL_INT; undef++) { meipls[undef] = 0; __asm__ volatile ("fence"); // Set to 0 meaning NEVER interrupt } @@ -305,6 +310,12 @@ void init_interrupts(void) { sha256_reg[SHA256_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R/sizeof(uint32_t)] = SHA256_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_ERROR_EN_MASK | SHA256_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_NOTIF_EN_MASK; + // MLDSA + mldsa_reg[MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R /sizeof(uint32_t)] = MLDSA_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_INTERNAL_EN_MASK; + mldsa_reg[MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R /sizeof(uint32_t)] = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTR_EN_R_NOTIF_CMD_DONE_EN_MASK; + mldsa_reg[MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R/sizeof(uint32_t)] = MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_ERROR_EN_MASK | + MLDSA_REG_INTR_BLOCK_RF_GLOBAL_INTR_EN_R_NOTIF_EN_MASK; + // Mailbox // Clear DEBUG locked, which is always set on reset deassertion due to rst_val != TB input val soc_ifc_reg[SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R /sizeof(uint32_t)] = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; @@ -703,7 +714,9 @@ static void nonstd_veer_isr_0 (void) { * service_soc_ifc_error_intr \ * service_soc_ifc_notif_intr \ * service_sha512_acc_error_intr \ - * service_sha512_acc_notif_intr \ + * service_sha512_acc_notif_intr + * service_mldsa_error_intr \ + * service_mldsa_notif_intr \ */ \ service_##name##_intr(); \ \ @@ -774,4 +787,9 @@ nonstd_veer_isr(soc_ifc_notif) nonstd_veer_isr(sha512_acc_error) // Non-Standard Vectored Interrupt Handler (SHA Notification = vector 22) nonstd_veer_isr(sha512_acc_notif) +// Non-Standard Vectored Interrupt Handler (SHA Error = vector 23) +nonstd_veer_isr(mldsa_error) +// Non-Standard Vectored Interrupt Handler (SHA Notification = vector 24) +nonstd_veer_isr(mldsa_notif) + diff --git a/src/integration/test_suites/libs/mldsa/mldsa.c b/src/integration/test_suites/libs/mldsa/mldsa.c new file mode 100644 index 000000000..edb855698 --- /dev/null +++ b/src/integration/test_suites/libs/mldsa/mldsa.c @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + +#include "caliptra_defines.h" +//#include "riscv_hw_if.h" +//#include +//#include +#include "printf.h" +#include "mldsa.h" +#include "caliptra_isr.h" + +extern volatile caliptra_intr_received_s cptra_intr_rcv; + +void wait_for_mldsa_intr(){ + printf("MLDSA flow in progress...\n"); + while((cptra_intr_rcv.mldsa_error == 0) & (cptra_intr_rcv.mldsa_notif == 0)){ + __asm__ volatile ("wfi"); // "Wait for interrupt" + // Sleep during MLDSA operation to allow ISR to execute and show idle time in sims + for (uint16_t slp = 0; slp < 100; slp++) { + __asm__ volatile ("nop"); // Sleep loop as "nop" + } + }; + //printf("Received MLDSA error intr with status = %d\n", cptra_intr_rcv.mldsa_error); + printf("Received MLDSA notif/ err intr with status = %d/ %d\n", cptra_intr_rcv.mldsa_notif, cptra_intr_rcv.mldsa_error); +} + +void mldsa_zeroize(){ + printf("MLDSA zeroize flow.\n"); + lsu_write_32(CLP_MLDSA_REG_MLDSA_CTRL, (1 << MLDSA_REG_MLDSA_CTRL_ZEROIZE_LOW) & MLDSA_REG_MLDSA_CTRL_ZEROIZE_MASK); +} + + + +void mldsa_keygen_flow(uint32_t seed[8], uint32_t sign_rnd[8], uint32_t entropy[16], uint32_t privkey[1224], uint32_t pubkey[648]){ + uint16_t offset; + volatile uint32_t * reg_ptr; + uint8_t fail_cmd = 0x1; + + uint32_t mldsa_privkey [1224]; + uint32_t mldsa_pubkey [648]; + + // wait for MLDSA to be ready + printf("Waiting for mldsa status ready in keygen\n"); + while((lsu_read_32(CLP_MLDSA_REG_MLDSA_STATUS) & MLDSA_REG_MLDSA_STATUS_READY_MASK) == 0); + + //TODO: modify below after KV intf is ready + // if(seed.kv_intf){ + // // Program MLDSA_SEED Read with 12 dwords from seed_kv_id + // lsu_write_32(CLP_MLDSA_REG_MLDSA_KV_RD_SEED_CTRL, (MLDSA_REG_MLDSA_KV_RD_SEED_CTRL_READ_EN_MASK | + // ((seed.kv_id << MLDSA_REG_MLDSA_KV_RD_SEED_CTRL_READ_ENTRY_LOW) & MLDSA_REG_MLDSA_KV_RD_SEED_CTRL_READ_ENTRY_MASK))); + + // // Try to overwrite MLDSA SEED from keyvault + // reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_SEED_0; + // while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SEED_11) { + // *reg_ptr++ = 0; + // } + + // // Check that MLDSA SEED is loaded + // while((lsu_read_32(CLP_MLDSA_REG_MLDSA_KV_RD_SEED_STATUS) & MLDSA_REG_MLDSA_KV_RD_SEED_STATUS_VALID_MASK) == 0); + // } + // else{ + // printf("Writing seed from tb\n"); + // printf("%c", 0xd9); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_SEED_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SEED_7) { + *reg_ptr++ = seed[offset++]; + } + // } + + // if (privkey.kv_intf){ + // // set privkey DEST to write + // lsu_write_32(CLP_MLDSA_REG_MLDSA_KV_WR_PKEY_CTRL, (MLDSA_REG_MLDSA_KV_WR_PKEY_CTRL_WRITE_EN_MASK | + // MLDSA_REG_MLDSA_KV_WR_PKEY_CTRL_MLDSA_PKEY_DEST_VALID_MASK | + // ((privkey.kv_id << MLDSA_REG_MLDSA_KV_WR_PKEY_CTRL_WRITE_ENTRY_LOW) & MLDSA_REG_MLDSA_KV_WR_PKEY_CTRL_WRITE_ENTRY_MASK))); + // } + + // Write MLDSA ENTROPY + printf("Writing entropy\n"); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_ENTROPY_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_ENTROPY_15) { + *reg_ptr++ = entropy[offset++]; + } + + printf("\nMLDSA KEYGEN\n"); + // Enable MLDSA KEYGEN core + lsu_write_32(CLP_MLDSA_REG_MLDSA_CTRL, MLDSA_CMD_KEYGEN); + + // // wait for MLDSA KEYGEN process to be done + wait_for_mldsa_intr(); + + // if (privkey.kv_intf){ + // printf("Wait for KV write\n"); + // // check dest done + // while((lsu_read_32(CLP_MLDSA_REG_MLDSA_KV_WR_PKEY_STATUS) & MLDSA_REG_MLDSA_KV_WR_PKEY_STATUS_VALID_MASK) == 0); + // } + // else{ + // Read the data back from MLDSA register + printf("Load PRIVKEY data from MLDSA\n"); + reg_ptr = (uint32_t *) CLP_MLDSA_REG_MLDSA_PRIVKEY_OUT; + offset = 0; + while (offset <= 1223) { + mldsa_privkey[offset] = *reg_ptr; + if (mldsa_privkey[offset] != privkey[offset]) { + printf("At offset [%d], mldsa_privkey data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_privkey[offset]); + printf("Expected data: 0x%x\n", privkey[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + // } + + // Read the data back from MLDSA register + printf("Load PUBKEY data from MLDSA\n"); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_PUBKEY_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_PUBKEY_647) { + mldsa_pubkey[offset] = *reg_ptr; + if (mldsa_pubkey[offset] != pubkey[offset]) { + printf("At offset [%d], mldsa_pubkey data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_pubkey[offset]); + printf("Expected data: 0x%x\n", pubkey[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + +} + +void mldsa_keygen_signing_flow(uint32_t seed[8], uint32_t sign_rnd[8], uint32_t msg[16], uint32_t privkey[1224], uint32_t pubkey[648], uint32_t sign[1157]) { + uint16_t offset; + volatile uint32_t * reg_ptr; + uint8_t fail_cmd = 0x1; + + uint32_t mldsa_privkey [1224]; + uint32_t mldsa_pubkey [648]; + uint32_t mldsa_sign [1157]; + + // wait for MLDSA to be ready + printf("Waiting for mldsa status ready in keygen\n"); + while((lsu_read_32(CLP_MLDSA_REG_MLDSA_STATUS) & MLDSA_REG_MLDSA_STATUS_READY_MASK) == 0); + + //Program mldsa seed + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_SEED_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SEED_7) { + *reg_ptr++ = seed[offset++]; + } + + // Program MLDSA MSG + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_MSG_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_MSG_15) { + *reg_ptr++ = msg[offset++]; + } + + // Program MLDSA Sign Rnd + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_SIGN_RND_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SIGN_RND_7) { + *reg_ptr++ = sign_rnd[offset++]; + } + + // Enable MLDSA SIGNING core + printf("\nMLDSA KEYGEN + SIGNING\n"); + lsu_write_32(CLP_MLDSA_REG_MLDSA_CTRL, MLDSA_CMD_KEYGEN_SIGN); + + // wait for MLDSA SIGNING process to be done + wait_for_mldsa_intr(); + + printf("Load PRIVKEY data from MLDSA\n"); + reg_ptr = (uint32_t *) CLP_MLDSA_REG_MLDSA_PRIVKEY_OUT; + offset = 0; + while (offset <= 1223) { + mldsa_privkey[offset] = *reg_ptr; + if (mldsa_privkey[offset] != privkey[offset]) { + printf("At offset [%d], mldsa_privkey data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_privkey[offset]); + printf("Expected data: 0x%x\n", privkey[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + + // Read the data back from MLDSA register + printf("Load PUBKEY data from MLDSA\n"); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_PUBKEY_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_PUBKEY_647) { + mldsa_pubkey[offset] = *reg_ptr; + if (mldsa_pubkey[offset] != pubkey[offset]) { + printf("At offset [%d], mldsa_pubkey data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_pubkey[offset]); + printf("Expected data: 0x%x\n", pubkey[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + + // Read the data back from MLDSA register + printf("Load SIGN data from MLDSA\n"); + reg_ptr = (uint32_t *) CLP_MLDSA_REG_MLDSA_SIGNATURE_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SIGNATURE_1156) { + mldsa_sign[offset] = *reg_ptr; + if (mldsa_sign[offset] != sign[offset]) { + printf("At offset [%d], mldsa_sign data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_sign[offset]); + printf("Expected data: 0x%x\n", sign[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + + +} + + +void mldsa_signing_flow(uint32_t privkey[1224], uint32_t msg[16], uint32_t entropy[16], uint32_t sign[1157]){ + uint16_t offset; + volatile uint32_t * reg_ptr; + uint8_t fail_cmd = 0x1; + + uint32_t mldsa_sign [1157]; + +// wait for MLDSA to be ready + printf("Waiting for mldsa status ready\n"); + while((lsu_read_32(CLP_MLDSA_REG_MLDSA_STATUS) & MLDSA_REG_MLDSA_STATUS_READY_MASK) == 0); + +// if (privkey.kv_intf){ +// //inject privkey to kv key reg +// //suppose privkey is stored by mldsa_keygen +// printf("Inject PRIVKEY from kv to MLDSA\n"); + +// // Program MLDSA_PRIVKEY Read with 12 dwords from privkey_kv_id +// lsu_write_32(CLP_MLDSA_REG_MLDSA_KV_RD_PKEY_CTRL, (MLDSA_REG_MLDSA_KV_RD_PKEY_CTRL_READ_EN_MASK | +// ((privkey.kv_id << MLDSA_REG_MLDSA_KV_RD_PKEY_CTRL_READ_ENTRY_LOW) & MLDSA_REG_MLDSA_KV_RD_PKEY_CTRL_READ_ENTRY_MASK))); + +// // Try to overwrite MLDSA PRIVKEY from key vault +// reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_PRIVKEY_IN_0; +// while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_PRIVKEY_IN_11) { +// *reg_ptr++ = 0; +// } + +// // Check that MLDSA PRIVKEY is loaded +// while((lsu_read_32(CLP_MLDSA_REG_MLDSA_KV_RD_PKEY_STATUS) & MLDSA_REG_MLDSA_KV_RD_PKEY_STATUS_VALID_MASK) == 0); +// } +// else{ + // Program MLDSA PRIVKEY + printf("Writing privkey\n"); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_PRIVKEY_IN; + offset = 0; + while (offset <= 1223) { + // printf("offset = %0d, value = %x, reg ptr = %0d\n", offset++, privkey[offset++], reg_ptr); + *reg_ptr++ = privkey[offset++]; + } +// } + + + // Program MLDSA MSG + printf("Writing msg\n"); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_MSG_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_MSG_15) { + *reg_ptr++ = msg[offset++]; + } + + // Program MLDSA ENTROPY + printf("Writing entropy\n"); + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_ENTROPY_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_ENTROPY_15) { + *reg_ptr++ = entropy[offset++]; + } + + // Enable MLDSA SIGNING core + printf("\nMLDSA SIGNING\n"); + lsu_write_32(CLP_MLDSA_REG_MLDSA_CTRL, MLDSA_CMD_SIGNING); + + // wait for MLDSA SIGNING process to be done + wait_for_mldsa_intr(); + + // // Read the data back from MLDSA register + printf("Load SIGN data from MLDSA\n"); + reg_ptr = (uint32_t *) CLP_MLDSA_REG_MLDSA_SIGNATURE_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SIGNATURE_1156) { + mldsa_sign[offset] = *reg_ptr; + if (mldsa_sign[offset] != sign[offset]) { + printf("At offset [%d], mldsa_sign data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_sign[offset]); + printf("Expected data: 0x%x\n", sign[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + +} + +void mldsa_verifying_flow(uint32_t msg[16], uint32_t pubkey[648], uint32_t sign[1157], uint32_t verifyres[16]){ + uint16_t offset; + volatile uint32_t * reg_ptr; + uint8_t fail_cmd = 0x1; + + uint32_t mldsa_verifyres [16]; + + // wait for MLDSA to be ready + while((lsu_read_32(CLP_MLDSA_REG_MLDSA_STATUS) & MLDSA_REG_MLDSA_STATUS_READY_MASK) == 0); + + // Program MLDSA MSG + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_MSG_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_MSG_15) { + *reg_ptr++ = msg[offset++]; + } + + // Program MLDSA PUBKEY + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_PUBKEY_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_PUBKEY_647) { + *reg_ptr++ = pubkey[offset++]; + } + + + // Program MLDSA SIGNATURE + reg_ptr = (uint32_t*) CLP_MLDSA_REG_MLDSA_SIGNATURE_0; + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_SIGNATURE_1156) { + *reg_ptr++ = sign[offset++]; + } + + + // Enable MLDSA VERIFYING core + printf("\nMLDSA VERIFYING\n"); + lsu_write_32(CLP_MLDSA_REG_MLDSA_CTRL, MLDSA_CMD_VERIFYING); + + // wait for MLDSA VERIFYING process to be done + wait_for_mldsa_intr(); + + reg_ptr = (uint32_t *) CLP_MLDSA_REG_MLDSA_VERIFY_RES_0; + // Read the data back from MLDSA register + printf("Load VERIFY_RES data from MLDSA\n"); + offset = 0; + while (reg_ptr <= (uint32_t*) CLP_MLDSA_REG_MLDSA_VERIFY_RES_15) { + mldsa_verifyres[offset] = *reg_ptr; + if (mldsa_verifyres[offset] != verifyres[offset]) { + printf("At offset [%d], mldsa_verifyres data mismatch!\n", offset); + printf("Actual data: 0x%x\n", mldsa_verifyres[offset]); + printf("Expected data: 0x%x\n", verifyres[offset]); + printf("%c", fail_cmd); + while(1); + } + reg_ptr++; + offset++; + } + +} diff --git a/src/integration/test_suites/libs/mldsa/mldsa.h b/src/integration/test_suites/libs/mldsa/mldsa.h new file mode 100644 index 000000000..fdbf053f0 --- /dev/null +++ b/src/integration/test_suites/libs/mldsa/mldsa.h @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + +#ifndef MLDSA_H + #define MLDSA_H + +#include "caliptra_defines.h" +#include "caliptra_reg.h" +#include "riscv_hw_if.h" + +typedef uint8_t BOOL; +#define FALSE 0u +#define TRUE 1u + +// typedef struct { +// BOOL kv_intf; +// uint8_t kv_id; +// uint32_t data[12]; +// }ecc_io; + +// void ecc_keygen_flow(ecc_io seed, ecc_io nonce, ecc_io iv, ecc_io privkey, ecc_io pubkey_x, ecc_io pubkey_y); +// void ecc_signing_flow(ecc_io privkey, ecc_io msg, ecc_io iv, ecc_io sign_r, ecc_io sign_s); +// void ecc_verifying_flow(ecc_io msg, ecc_io pubkey_x, ecc_io pubkey_y, ecc_io sign_r, ecc_io sign_s); +// void ecc_pcr_signing_flow(ecc_io iv, ecc_io sign_r, ecc_io sign_s); +void mldsa_zeroize(); +void wait_for_mldsa_intr(); +void mldsa_keygen_flow(uint32_t seed[8], uint32_t sign_rnd[8], uint32_t entropy[16], uint32_t privkey[1224], uint32_t pubkey[648]); +void mldsa_signing_flow(uint32_t privkey[1224], uint32_t msg[16], uint32_t entropy[16], uint32_t sign[1157]); +void mldsa_verifying_flow(uint32_t msg[16], uint32_t pubkey[648], uint32_t sign[1157], uint32_t verifyres[16]); +void mldsa_keygen_signing_flow(uint32_t seed[8], uint32_t sign_rnd[8], uint32_t msg[16], uint32_t privkey[1224], uint32_t pubkey[648], uint32_t sign[1157]); +#endif diff --git a/src/integration/test_suites/libs/riscv_hw_if/link.ld b/src/integration/test_suites/libs/riscv_hw_if/link.ld index 08c7b8dce..83a09ceac 100644 --- a/src/integration/test_suites/libs/riscv_hw_if/link.ld +++ b/src/integration/test_suites/libs/riscv_hw_if/link.ld @@ -64,6 +64,6 @@ SECTIONS { /* Stack is at the end of DCCM after .data_iccm2 */ . = ALIGN(iccm_code2_end,16); - STACK = ALIGN(16) + 0x4000; + STACK = ALIGN(16) + 0x8000; ASSERT( (STACK < 0x50020000), "ERROR: Stack overflows the DCCM -- note: lower half of DCCM is allocated in the validation image for remote firmware images") } diff --git a/src/integration/test_suites/memCpy_ROM_to_dccm/caliptra_isr.h b/src/integration/test_suites/memCpy_ROM_to_dccm/caliptra_isr.h index 8f5779e04..eb000775b 100644 --- a/src/integration/test_suites/memCpy_ROM_to_dccm/caliptra_isr.h +++ b/src/integration/test_suites/memCpy_ROM_to_dccm/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/memCpy_dccm_to_iccm/caliptra_isr.h b/src/integration/test_suites/memCpy_dccm_to_iccm/caliptra_isr.h index 8f5779e04..eb000775b 100644 --- a/src/integration/test_suites/memCpy_dccm_to_iccm/caliptra_isr.h +++ b/src/integration/test_suites/memCpy_dccm_to_iccm/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + // cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/pv_hash_and_sign/caliptra_isr.h b/src/integration/test_suites/pv_hash_and_sign/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/pv_hash_and_sign/caliptra_isr.h +++ b/src/integration/test_suites/pv_hash_and_sign/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/pv_hash_and_sign/pv_hash_and_sign.c b/src/integration/test_suites/pv_hash_and_sign/pv_hash_and_sign.c index f23b86f12..ec1552163 100644 --- a/src/integration/test_suites/pv_hash_and_sign/pv_hash_and_sign.c +++ b/src/integration/test_suites/pv_hash_and_sign/pv_hash_and_sign.c @@ -54,6 +54,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/pv_hash_reset/caliptra_isr.h b/src/integration/test_suites/pv_hash_reset/caliptra_isr.h index 23b511c4b..49a033751 100644 --- a/src/integration/test_suites/pv_hash_reset/caliptra_isr.h +++ b/src/integration/test_suites/pv_hash_reset/caliptra_isr.h @@ -65,6 +65,8 @@ inline void service_soc_ifc_error_intr () {printf("ERROR");} inline void service_soc_ifc_notif_intr () {printf("ERROR");} inline void service_sha512_acc_error_intr() {printf("ERROR");} inline void service_sha512_acc_notif_intr() {printf("ERROR");} +inline void service_mldsa_error_intr() {printf("ERROR");} +inline void service_mldsa_notif_intr() {printf("ERROR");} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/randomized_pcr_signing/caliptra_isr.h b/src/integration/test_suites/randomized_pcr_signing/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/randomized_pcr_signing/caliptra_isr.h +++ b/src/integration/test_suites/randomized_pcr_signing/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/randomized_pcr_signing/randomized_pcr_signing.c b/src/integration/test_suites/randomized_pcr_signing/randomized_pcr_signing.c index 1b6ff2e68..618358da7 100644 --- a/src/integration/test_suites/randomized_pcr_signing/randomized_pcr_signing.c +++ b/src/integration/test_suites/randomized_pcr_signing/randomized_pcr_signing.c @@ -51,6 +51,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_ahb_mux/caliptra_isr.h b/src/integration/test_suites/smoke_test_ahb_mux/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_ahb_mux/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_ahb_mux/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_cg_wdt/caliptra_isr.h b/src/integration/test_suites/smoke_test_cg_wdt/caliptra_isr.h index 6f27a6427..7487a6e88 100644 --- a/src/integration/test_suites/smoke_test_cg_wdt/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_cg_wdt/caliptra_isr.h @@ -58,6 +58,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -128,5 +130,8 @@ inline void service_soc_ifc_notif_intr () { inline void service_sha512_acc_error_intr() {printf("ERROR");} inline void service_sha512_acc_notif_intr() {printf("ERROR");} +inline void service_mldsa_error_intr() {printf("ERROR");} +inline void service_mldsa_notif_intr() {printf("ERROR");} + #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_cg_wdt/smoke_test_cg_wdt.c b/src/integration/test_suites/smoke_test_cg_wdt/smoke_test_cg_wdt.c index ecbc2b28d..8a2824bcc 100644 --- a/src/integration/test_suites/smoke_test_cg_wdt/smoke_test_cg_wdt.c +++ b/src/integration/test_suites/smoke_test_cg_wdt/smoke_test_cg_wdt.c @@ -72,6 +72,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_clk_gating/caliptra_isr.h b/src/integration/test_suites/smoke_test_clk_gating/caliptra_isr.h index 2eb00407e..0d6cf4a8a 100644 --- a/src/integration/test_suites/smoke_test_clk_gating/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_clk_gating/caliptra_isr.h @@ -58,6 +58,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -144,6 +146,8 @@ inline void service_soc_ifc_notif_intr () { } inline void service_sha512_acc_error_intr() {printf("ERROR");} inline void service_sha512_acc_notif_intr() {printf("ERROR");} +inline void service_mldsa_error_intr() {printf("ERROR");} +inline void service_mldsa_notif_intr() {printf("ERROR");} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c b/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c index 114abc7d3..dfbba0146 100644 --- a/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c +++ b/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c @@ -53,6 +53,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_datavault_basic/caliptra_isr.h b/src/integration/test_suites/smoke_test_datavault_basic/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_datavault_basic/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_datavault_basic/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_datavault_basic/smoke_test_datavault_basic.c b/src/integration/test_suites/smoke_test_datavault_basic/smoke_test_datavault_basic.c index 78f5a809f..ec73be4c7 100644 --- a/src/integration/test_suites/smoke_test_datavault_basic/smoke_test_datavault_basic.c +++ b/src/integration/test_suites/smoke_test_datavault_basic/smoke_test_datavault_basic.c @@ -58,6 +58,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; #ifndef MY_RANDOM_SEED diff --git a/src/integration/test_suites/smoke_test_datavault_lock/caliptra_isr.h b/src/integration/test_suites/smoke_test_datavault_lock/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_datavault_lock/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_datavault_lock/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_datavault_lock/smoke_test_datavault_lock.c b/src/integration/test_suites/smoke_test_datavault_lock/smoke_test_datavault_lock.c index 1a995fc73..4df61118e 100644 --- a/src/integration/test_suites/smoke_test_datavault_lock/smoke_test_datavault_lock.c +++ b/src/integration/test_suites/smoke_test_datavault_lock/smoke_test_datavault_lock.c @@ -58,6 +58,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; #ifndef MY_RANDOM_SEED diff --git a/src/integration/test_suites/smoke_test_datavault_mini/caliptra_isr.h b/src/integration/test_suites/smoke_test_datavault_mini/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_datavault_mini/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_datavault_mini/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c b/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c index b402e7a68..d220e6e0a 100644 --- a/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c +++ b/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c @@ -65,6 +65,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_datavault_reset/caliptra_isr.h b/src/integration/test_suites/smoke_test_datavault_reset/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_datavault_reset/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_datavault_reset/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_datavault_reset/smoke_test_datavault_reset.c b/src/integration/test_suites/smoke_test_datavault_reset/smoke_test_datavault_reset.c index c0a40a93d..838e8034d 100644 --- a/src/integration/test_suites/smoke_test_datavault_reset/smoke_test_datavault_reset.c +++ b/src/integration/test_suites/smoke_test_datavault_reset/smoke_test_datavault_reset.c @@ -57,6 +57,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; #ifndef MY_RANDOM_SEED diff --git a/src/integration/test_suites/smoke_test_doe_cg/caliptra_isr.h b/src/integration/test_suites/smoke_test_doe_cg/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_doe_cg/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_doe_cg/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_doe_cg/smoke_test_doe_cg.c b/src/integration/test_suites/smoke_test_doe_cg/smoke_test_doe_cg.c index 04ab79691..2504f15b6 100644 --- a/src/integration/test_suites/smoke_test_doe_cg/smoke_test_doe_cg.c +++ b/src/integration/test_suites/smoke_test_doe_cg/smoke_test_doe_cg.c @@ -78,6 +78,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_doe_rand/caliptra_isr.h b/src/integration/test_suites/smoke_test_doe_rand/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_doe_rand/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_doe_rand/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_doe_rand/smoke_test_doe_rand.c b/src/integration/test_suites/smoke_test_doe_rand/smoke_test_doe_rand.c index 4609650e4..545ffd2bd 100644 --- a/src/integration/test_suites/smoke_test_doe_rand/smoke_test_doe_rand.c +++ b/src/integration/test_suites/smoke_test_doe_rand/smoke_test_doe_rand.c @@ -77,6 +77,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_doe_scan/caliptra_isr.h b/src/integration/test_suites/smoke_test_doe_scan/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_doe_scan/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_doe_scan/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_doe_scan/smoke_test_doe_scan.c b/src/integration/test_suites/smoke_test_doe_scan/smoke_test_doe_scan.c index d2966ca31..7cdd8d5f6 100644 --- a/src/integration/test_suites/smoke_test_doe_scan/smoke_test_doe_scan.c +++ b/src/integration/test_suites/smoke_test_doe_scan/smoke_test_doe_scan.c @@ -78,6 +78,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_ecc/caliptra_isr.h b/src/integration/test_suites/smoke_test_ecc/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_ecc/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_ecc/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_ecc/smoke_test_ecc.c b/src/integration/test_suites/smoke_test_ecc/smoke_test_ecc.c index 164d9ed50..6bf146bd9 100644 --- a/src/integration/test_suites/smoke_test_ecc/smoke_test_ecc.c +++ b/src/integration/test_suites/smoke_test_ecc/smoke_test_ecc.c @@ -51,6 +51,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; /* ECC test vector: diff --git a/src/integration/test_suites/smoke_test_ecc_errortrigger/caliptra_isr.h b/src/integration/test_suites/smoke_test_ecc_errortrigger/caliptra_isr.h index d5a7efebb..d72cf1bf3 100644 --- a/src/integration/test_suites/smoke_test_ecc_errortrigger/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_ecc_errortrigger/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -252,5 +254,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_ecc_errortrigger/smoke_test_ecc_errortrigger.c b/src/integration/test_suites/smoke_test_ecc_errortrigger/smoke_test_ecc_errortrigger.c index 5233f778c..fa9f0d3d3 100644 --- a/src/integration/test_suites/smoke_test_ecc_errortrigger/smoke_test_ecc_errortrigger.c +++ b/src/integration/test_suites/smoke_test_ecc_errortrigger/smoke_test_ecc_errortrigger.c @@ -52,6 +52,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; /* ECC test vector: diff --git a/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/caliptra_isr.h b/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/smoke_test_fw_kv_backtoback_hmac.c b/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/smoke_test_fw_kv_backtoback_hmac.c index ec0ff622a..1cfa66ebf 100644 --- a/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/smoke_test_fw_kv_backtoback_hmac.c +++ b/src/integration/test_suites/smoke_test_fw_kv_backtoback_hmac/smoke_test_fw_kv_backtoback_hmac.c @@ -55,6 +55,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_hmac/caliptra_isr.h b/src/integration/test_suites/smoke_test_hmac/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_hmac/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_hmac/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_hmac/smoke_test_hmac.c b/src/integration/test_suites/smoke_test_hmac/smoke_test_hmac.c index f8a30856c..cb18e1f67 100644 --- a/src/integration/test_suites/smoke_test_hmac/smoke_test_hmac.c +++ b/src/integration/test_suites/smoke_test_hmac/smoke_test_hmac.c @@ -50,6 +50,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_hw_config/caliptra_isr.h b/src/integration/test_suites/smoke_test_hw_config/caliptra_isr.h index 7bf456414..c683c2cff 100644 --- a/src/integration/test_suites/smoke_test_hw_config/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_hw_config/caliptra_isr.h @@ -55,6 +55,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -189,5 +191,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_hw_config/smoke_test_hw_config.c b/src/integration/test_suites/smoke_test_hw_config/smoke_test_hw_config.c index 78647dcc9..9e609685f 100644 --- a/src/integration/test_suites/smoke_test_hw_config/smoke_test_hw_config.c +++ b/src/integration/test_suites/smoke_test_hw_config/smoke_test_hw_config.c @@ -57,6 +57,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main(void) { diff --git a/src/integration/test_suites/smoke_test_iccm_reset/caliptra_isr.h b/src/integration/test_suites/smoke_test_iccm_reset/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_iccm_reset/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_iccm_reset/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_iccm_reset/smoke_test_iccm_reset.c b/src/integration/test_suites/smoke_test_iccm_reset/smoke_test_iccm_reset.c index c1c3ef473..19a156464 100644 --- a/src/integration/test_suites/smoke_test_iccm_reset/smoke_test_iccm_reset.c +++ b/src/integration/test_suites/smoke_test_iccm_reset/smoke_test_iccm_reset.c @@ -53,6 +53,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; extern uintptr_t iccm_code0_start, iccm_code0_end; diff --git a/src/integration/test_suites/smoke_test_kv/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_cg/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_cg/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_cg/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_cg/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_cg/smoke_test_kv_cg.c b/src/integration/test_suites/smoke_test_kv_cg/smoke_test_kv_cg.c index 6929ed929..7b14876fd 100644 --- a/src/integration/test_suites/smoke_test_kv_cg/smoke_test_kv_cg.c +++ b/src/integration/test_suites/smoke_test_kv_cg/smoke_test_kv_cg.c @@ -53,6 +53,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; uint32_t IV_DATA_UDS0 = 0x2eb94297; diff --git a/src/integration/test_suites/smoke_test_kv_crypto_flow/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_crypto_flow/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_crypto_flow/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_crypto_flow/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_crypto_flow/smoke_test_kv_crypto_flow.c b/src/integration/test_suites/smoke_test_kv_crypto_flow/smoke_test_kv_crypto_flow.c index 552140de5..fc4657153 100644 --- a/src/integration/test_suites/smoke_test_kv_crypto_flow/smoke_test_kv_crypto_flow.c +++ b/src/integration/test_suites/smoke_test_kv_crypto_flow/smoke_test_kv_crypto_flow.c @@ -65,6 +65,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; /* DOE test vector diff --git a/src/integration/test_suites/smoke_test_kv_ecc_flow/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_ecc_flow/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_ecc_flow/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_ecc_flow/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_ecc_flow/smoke_test_kv_ecc_flow.c b/src/integration/test_suites/smoke_test_kv_ecc_flow/smoke_test_kv_ecc_flow.c index 36d869c0d..80b11f8ee 100644 --- a/src/integration/test_suites/smoke_test_kv_ecc_flow/smoke_test_kv_ecc_flow.c +++ b/src/integration/test_suites/smoke_test_kv_ecc_flow/smoke_test_kv_ecc_flow.c @@ -51,6 +51,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; /* ECC test vector: diff --git a/src/integration/test_suites/smoke_test_kv_hmac_flow/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_hmac_flow/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_hmac_flow/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_hmac_flow/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_hmac_flow/smoke_test_kv_hmac_flow.c b/src/integration/test_suites/smoke_test_kv_hmac_flow/smoke_test_kv_hmac_flow.c index b69a3f962..f1f23cb51 100644 --- a/src/integration/test_suites/smoke_test_kv_hmac_flow/smoke_test_kv_hmac_flow.c +++ b/src/integration/test_suites/smoke_test_kv_hmac_flow/smoke_test_kv_hmac_flow.c @@ -55,6 +55,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/smoke_test_kv_hmac_multiblock_flow.c b/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/smoke_test_kv_hmac_multiblock_flow.c index f7fcd2d75..772ea8732 100644 --- a/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/smoke_test_kv_hmac_multiblock_flow.c +++ b/src/integration/test_suites/smoke_test_kv_hmac_multiblock_flow/smoke_test_kv_hmac_multiblock_flow.c @@ -56,6 +56,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_kv_securitystate/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_securitystate/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_securitystate/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_securitystate/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_securitystate/smoke_test_kv_securitystate.c b/src/integration/test_suites/smoke_test_kv_securitystate/smoke_test_kv_securitystate.c index e6221f101..8dc41cf7c 100644 --- a/src/integration/test_suites/smoke_test_kv_securitystate/smoke_test_kv_securitystate.c +++ b/src/integration/test_suites/smoke_test_kv_securitystate/smoke_test_kv_securitystate.c @@ -53,6 +53,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; volatile uint32_t * clear_secrets = (uint32_t *) CLP_KV_REG_CLEAR_SECRETS; diff --git a/src/integration/test_suites/smoke_test_kv_sha512_flow/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_sha512_flow/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_sha512_flow/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_sha512_flow/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_sha512_flow/smoke_test_kv_sha512_flow.c b/src/integration/test_suites/smoke_test_kv_sha512_flow/smoke_test_kv_sha512_flow.c index 54b2b6060..b17c002d5 100644 --- a/src/integration/test_suites/smoke_test_kv_sha512_flow/smoke_test_kv_sha512_flow.c +++ b/src/integration/test_suites/smoke_test_kv_sha512_flow/smoke_test_kv_sha512_flow.c @@ -55,6 +55,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_kv_uds_reset/caliptra_isr.h b/src/integration/test_suites/smoke_test_kv_uds_reset/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_kv_uds_reset/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_kv_uds_reset/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_kv_uds_reset/smoke_test_kv_uds_reset.c b/src/integration/test_suites/smoke_test_kv_uds_reset/smoke_test_kv_uds_reset.c index 829b5a4d0..9f796bf70 100644 --- a/src/integration/test_suites/smoke_test_kv_uds_reset/smoke_test_kv_uds_reset.c +++ b/src/integration/test_suites/smoke_test_kv_uds_reset/smoke_test_kv_uds_reset.c @@ -52,6 +52,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; uint32_t IV_DATA_UDS0 = 0x2eb94297; diff --git a/src/integration/test_suites/smoke_test_mbox/caliptra_isr.h b/src/integration/test_suites/smoke_test_mbox/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_mbox/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_mbox/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_mbox/smoke_test_mbox.c b/src/integration/test_suites/smoke_test_mbox/smoke_test_mbox.c index 1ad31280c..a18b8e392 100644 --- a/src/integration/test_suites/smoke_test_mbox/smoke_test_mbox.c +++ b/src/integration/test_suites/smoke_test_mbox/smoke_test_mbox.c @@ -52,6 +52,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main () { diff --git a/src/integration/test_suites/smoke_test_mbox_cg/caliptra_isr.h b/src/integration/test_suites/smoke_test_mbox_cg/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_mbox_cg/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_mbox_cg/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_mbox_cg/smoke_test_mbox_cg.c b/src/integration/test_suites/smoke_test_mbox_cg/smoke_test_mbox_cg.c index 9697d6e71..d2dd24701 100644 --- a/src/integration/test_suites/smoke_test_mbox_cg/smoke_test_mbox_cg.c +++ b/src/integration/test_suites/smoke_test_mbox_cg/smoke_test_mbox_cg.c @@ -53,6 +53,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main () { diff --git a/src/integration/test_suites/smoke_test_mldsa/caliptra_isr.h b/src/integration/test_suites/smoke_test_mldsa/caliptra_isr.h new file mode 100644 index 000000000..5aed80789 --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa/caliptra_isr.h @@ -0,0 +1,265 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// --------------------------------------------------------------------- +// File: caliptra_isr.h +// Description: +// Provides function declarations for use by external test files, so +// that the ISR functionality may behave like a library. +// TODO: +// This header file includes inline function definitions for event and +// test specific interrupt service behavior, so it should be copied and +// modified for each test. +// --------------------------------------------------------------------- + +#ifndef CALIPTRA_ISR_H + #define CALIPTRA_ISR_H + +#define EN_ISR_PRINTS 1 + +#include "caliptra_defines.h" +#include +#include "printf.h" + +/* --------------- symbols/typedefs --------------- */ +typedef struct { + uint32_t doe_error; + uint32_t doe_notif; + uint32_t ecc_error; + uint32_t ecc_notif; + uint32_t hmac_error; + uint32_t hmac_notif; + uint32_t kv_error; + uint32_t kv_notif; + uint32_t sha512_error; + uint32_t sha512_notif; + uint32_t sha256_error; + uint32_t sha256_notif; + uint32_t qspi_error; + uint32_t qspi_notif; + uint32_t uart_error; + uint32_t uart_notif; + uint32_t i3c_error; + uint32_t i3c_notif; + uint32_t soc_ifc_error; + uint32_t soc_ifc_notif; + uint32_t sha512_acc_error; + uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; +} caliptra_intr_received_s; //TODO: add mldsa intr +extern volatile caliptra_intr_received_s cptra_intr_rcv; + +////////////////////////////////////////////////////////////////////////////// +// Function Declarations +// + +// Performs all the CSR setup to configure and enable vectored external interrupts +void init_interrupts(void); + +// These inline functions are used to insert event-specific functionality into the +// otherwise generic ISR that gets laid down by the parameterized macro "nonstd_veer_isr" +inline void service_doe_error_intr() {return;} +inline void service_doe_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.doe_notif |= DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad doe_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_ecc_error_intr() {return;} +inline void service_ecc_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad ecc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_hmac_error_intr() {return;} +inline void service_hmac_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.hmac_notif |= HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad hmac_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_kv_error_intr() {return;} +inline void service_kv_notif_intr() {return;} +inline void service_sha512_error_intr() {return;} +inline void service_sha512_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha512_notif |= SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha512_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_sha256_error_intr() {return;} +inline void service_sha256_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha256_notif |= SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha256_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_qspi_error_intr() {return;} +inline void service_qspi_notif_intr() {return;} +inline void service_uart_error_intr() {return;} +inline void service_uart_notif_intr() {return;} +inline void service_i3c_error_intr() {return;} +inline void service_i3c_notif_intr() {return;} + +inline void service_soc_ifc_error_intr() { + uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad soc_ifc_error_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_soc_ifc_notif_intr () { + uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad soc_ifc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_sha512_acc_error_intr() {return;} +inline void service_sha512_acc_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha512_acc_notif |= SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha512_acc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + + +#endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.c b/src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.c new file mode 100644 index 000000000..e41f32445 --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.c @@ -0,0 +1,3247 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + +#include "caliptra_defines.h" +#include "caliptra_isr.h" +#include "riscv_hw_if.h" +#include "riscv-csr.h" +#include "printf.h" +#include "mldsa.h" + +volatile char* stdout = (char *)STDOUT; +volatile uint32_t intr_count = 0; +#ifdef CPT_VERBOSITY + enum printf_verbosity verbosity_g = CPT_VERBOSITY; +#else + enum printf_verbosity verbosity_g = LOW; +#endif + +volatile caliptra_intr_received_s cptra_intr_rcv = { + .doe_error = 0, + .doe_notif = 0, + .ecc_error = 0, + .ecc_notif = 0, + .hmac_error = 0, + .hmac_notif = 0, + .kv_error = 0, + .kv_notif = 0, + .sha512_error = 0, + .sha512_notif = 0, + .sha256_error = 0, + .sha256_notif = 0, + .qspi_error = 0, + .qspi_notif = 0, + .uart_error = 0, + .uart_notif = 0, + .i3c_error = 0, + .i3c_notif = 0, + .soc_ifc_error = 0, + .soc_ifc_notif = 0, + .sha512_acc_error = 0, + .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 +}; + + +void main() { + printf("----------------------------------\n"); + printf(" Running MLDSA Smoke Test !!\n"); + printf("----------------------------------\n"); + + uint32_t mldsa_msg[] = {0xafbdf91c, +0x942b5eb7, +0x3b7cc474, +0xe53c0521, +0x3fa41e7a, +0x2a826c58, +0x812f3065, +0xe7a289a6, +0xbee9169d, +0x145d9c81, +0xfbab6bbf, +0x7cb65e26, +0xd31d734e, +0x755d7aba, +0xb5db81ed, +0x9290fb80}; + + + +uint32_t mldsa_privkey[] = {0x75A8F4C9, +0x56C0D7DA, +0x6C7FE78F, +0xB03E722E, +0xD1FC4F2A, +0x5E244960, +0x0E616F61, +0x995A4A88, +0x6CC78EC2, +0x951CB85C, +0xEA8AD554, +0xF2BD8E5F, +0x41711246, +0x91225DB8, +0x3ACBA371, +0x8A8D7A58, +0xB3350F28, +0x761D9044, +0x8D83F17D, +0x0DD25DB8, +0xE6C97CC0, +0x7F7BED1E, +0xB59DFCAF, +0x2D7FC3C2, +0xBB2F81C8, +0xDF94AF42, +0x27242980, +0xE27B71F5, +0x373E3E1F, +0x51B55491, +0x477F2839, +0x27792DCA, +0x54268CCC, +0x32469996, +0x50CA0084, +0x002651C9, +0x18110BB1, +0x91034986, +0x59220844, +0x2050DC00, +0x5121B504, +0x9030650C, +0x4068D3A4, +0x1101060E, +0x62A83152, +0xC8051C08, +0x88D0282C, +0x49C80D13, +0xA940CA24, +0x4682A220, +0x23A77098, +0x8620D224, +0x418A3872, +0x09A22962, +0x284199A0, +0x111B3209, +0x9A86511A, +0x89400125, +0x9193A60D, +0xE3244D01, +0x306E9916, +0x6604C465, +0xA4C06801, +0xC0116292, +0x4522A511, +0x5A180600, +0x218E5A06, +0x255CA611, +0x63A48DE2, +0x362583C4, +0x4121154A, +0x9CA28901, +0x23885812, +0x918BA024, +0x42184ECC, +0x447064B2, +0x25C28604, +0x2243095A, +0x0049E204, +0x4C99A250, +0x50B44863, +0x148A81C6, +0x2D441401, +0xE2A48D1B, +0x258421B0, +0x11840605, +0x5396518C, +0x18600CA6, +0x44142512, +0x5B460893, +0x2886CB36, +0x805C9001, +0xE2B22998, +0x480604C7, +0x45139524, +0x4B284CA2, +0x148684B2, +0x31A2808D, +0x59B2010B, +0x02451091, +0x50C28609, +0x98324810, +0x97290CA4, +0x2592A665, +0x09864DD3, +0x34248C36, +0x21DB3406, +0x4B96408A, +0x146650C4, +0x0022094E, +0xDC964981, +0xA221D942, +0x450BA865, +0x62088DD2, +0x24060B16, +0x8DE31661, +0x9098300A, +0x0291CB26, +0x6A992881, +0x4AB688E2, +0xC851E2A8, +0x85543442, +0x40A6705B, +0xB8082118, +0x8401842D, +0x14084DA1, +0xA0204908, +0x09C82252, +0x6296088C, +0x92482289, +0x4DE24491, +0x12322A1C, +0x80609200, +0x89DC322A, +0xD1164198, +0x0680DB24, +0x05131609, +0xD4B88C89, +0x98112480, +0x65544830, +0x10244ED0, +0x12512303, +0x529A4666, +0x04445151, +0xB0850B47, +0x26D8940D, +0x543802DA, +0x08004B46, +0x32208785, +0x63B851DC, +0x30096432, +0x51549205, +0x9242101C, +0x1228C940, +0x6E98868D, +0x1B978C61, +0x064A4040, +0x4E99120E, +0x59066181, +0xC68D42C2, +0x04099411, +0x10868D58, +0xA4714AC6, +0x61810051, +0x13A791D8, +0x04261C11, +0x50E4900C, +0x93880991, +0x36256130, +0x2C594660, +0x00460402, +0xA7441C87, +0x6000C60D, +0xD8268E90, +0x342801A5, +0x600BA851, +0x890469E1, +0x00311938, +0x50A0904D, +0x80B43120, +0x8271C310, +0x621BC000, +0xD91030E3, +0x366861A0, +0x00242846, +0x52340119, +0x328001A6, +0x80C2C631, +0xDB90294C, +0x88492048, +0x05639069, +0x10303211, +0x062ACAA8, +0x60829429, +0x1A3792A1, +0x04695B48, +0x5002496A, +0x0AC20DD4, +0x08520106, +0x0EA1B22D, +0x02284251, +0x00308812, +0x86880248, +0x49A62063, +0x824D5AB8, +0x2404A070, +0x64282124, +0x218C5124, +0x461A306D, +0x12432043, +0x288C8806, +0x8020C640, +0xC31606D8, +0xB4515024, +0x52D0100C, +0x02B74C1B, +0x30509318, +0x91040406, +0xC9C08C92, +0x80651149, +0x2E123581, +0x44A88084, +0x2430C886, +0x41DA0245, +0x44B091C0, +0x90319902, +0x60123150, +0x53C288D3, +0xB60062B8, +0x705C9409, +0x1BA66001, +0x09050B41, +0x90514442, +0x2440415C, +0x9005D100, +0x4A04B441, +0xDCB29190, +0x4032C9B2, +0x701BC690, +0xE2C24548, +0xC44890C8, +0x2920296E, +0x21426C81, +0x800D2139, +0x4013B985, +0xD4B45199, +0x8491DC86, +0x0110230A, +0x82802890, +0x9211CB40, +0x4111C009, +0x60486D61, +0x460C8C90, +0x01490048, +0xD9004811, +0x08619824, +0x24500041, +0x03B83108, +0x86488302, +0x0524C160, +0x64C60D41, +0x02259120, +0x6D209791, +0xD2449141, +0x4440CC38, +0x9048424A, +0x1C321102, +0x45265A82, +0x50840270, +0x88B66811, +0x10621B07, +0x22234946, +0x81960C23, +0x383149C2, +0x89DAB865, +0x4A9864D9, +0x08401206, +0x6A101301, +0x5A3042DC, +0xB081C484, +0x40CB8624, +0x14490658, +0x886D1380, +0x1108A064, +0xD996800C, +0x165061A6, +0x4542308A, +0x11936C1A, +0x14824426, +0x0D429841, +0xA2A60800, +0x87484332, +0x4A23066E, +0x1C3061C2, +0x28620207, +0x600B8780, +0x53328E19, +0xC88CE084, +0x2111478A, +0x5244449B, +0x166C5880, +0x21C8048D, +0x20062409, +0xC8104B94, +0x68A10030, +0x14920C09, +0x122E4182, +0x805CA24D, +0xD2340E44, +0x908C4844, +0x91214000, +0x01C96809, +0x036CD328, +0x094B0806, +0xD806098C, +0x20801010, +0x48E12851, +0x438600D4, +0xB0018B14, +0x0C20B671, +0x12B7110C, +0x4020D300, +0x0862088A, +0x62266503, +0x28425922, +0x11488230, +0x21C46C1C, +0x25821A21, +0x0D03A82D, +0xDAA011A0, +0x22702003, +0x48419070, +0xD0160DE0, +0x484D8418, +0x4A9A1844, +0x8CC24920, +0x394C19A5, +0x4102C744, +0x1A2852DB, +0x86712434, +0x04943010, +0x21026181, +0x940C23C8, +0x81819640, +0x23151251, +0x3408A440, +0x8E8CB851, +0xA02282DA, +0x424620C8, +0x69CC8801, +0x20A6881A, +0xC96D4B92, +0x8853B84C, +0x90124A09, +0x094D5006, +0x8AA0C280, +0x62466940, +0x4880DC48, +0x66D43002, +0x0A366A20, +0xC631CB28, +0x52223930, +0x88A2080B, +0x32104014, +0x29A42868, +0x23028DD4, +0x108E02C3, +0x2484262A, +0x04B4450B, +0x494D8020, +0x45001162, +0x0C40840B, +0x39490434, +0x508A3806, +0x0A2645C8, +0x1644E094, +0x30114201, +0x01B76864, +0x82104A38, +0x120AB845, +0xD4C260E0, +0x0262CC30, +0x898B3629, +0xA1C82821, +0x09216434, +0x4261962D, +0xD1040081, +0x10455238, +0x4400232E, +0x14188E18, +0xB4098136, +0x4E604671, +0xA46666E7, +0xC3EDEF33, +0xD3BB22D2, +0x66AF551A, +0x9E8D856C, +0x8B9E6826, +0xA77B04BD, +0x5EE6373C, +0xA783F6BB, +0xCC93274A, +0x40DE303B, +0x27F24F07, +0x7EA155FF, +0x532CF96D, +0x668FF300, +0xED79A8CB, +0x199DE6D5, +0xE809AC4F, +0xD59187BC, +0x048E2C0D, +0x7958A09F, +0xF88C8207, +0x2AD300DF, +0xEB310D7B, +0x43577645, +0x99E8E72D, +0xBF6F48B9, +0x4F861728, +0x3E244EF8, +0x312DB99A, +0x36891E84, +0x8FE631B2, +0x7F095E4B, +0x4A140758, +0xA319CB19, +0x3BA87688, +0x31A849F5, +0x6C0D14FB, +0xDE09CC90, +0x4FFD6EFB, +0x8681DB22, +0x8AF4A2C6, +0x1CAF571A, +0x39CA3E53, +0xF9613AEA, +0x0F7DBAC8, +0x750352F0, +0xDA0806D4, +0x8602D4C8, +0x89F36371, +0x96A0A683, +0xD3A5603A, +0xB458BC36, +0x698989C4, +0x5BBA3C5B, +0xB23D80CF, +0xC58E2320, +0x492F49A9, +0xFE78FF59, +0xA1B2C81C, +0xC5D8F5E0, +0xEF55ECD4, +0x5EEF5F56, +0x337023AF, +0xA797EEA5, +0x2164FBE7, +0x06C8D922, +0xBFA0E641, +0xED31B8E9, +0x7F6DCAD6, +0xE37A6D41, +0xF14B5D98, +0xF94F9C82, +0xBDDC5E3C, +0xA0942E97, +0xEF10CE4E, +0x530BBF9E, +0x3EFE6B7A, +0x0BB89AE4, +0x4F1EEDD0, +0x72C1950F, +0x116327FD, +0x0007E53F, +0x6BF49D98, +0x5EF5598E, +0x43B4DEEB, +0x51D91D0B, +0xF4827B41, +0xE08DEC27, +0x3E148A35, +0xE97EE54A, +0xEAA4CFFC, +0xE575AE51, +0x79CC38D5, +0x6A494A33, +0x102FC319, +0xBBC0C88B, +0x5746C9FF, +0xDA533C7A, +0xFD95B7F4, +0x2C1E3276, +0x8DD7C63C, +0x9B1E7932, +0x9005EA3C, +0x06C16576, +0x8EA6F13F, +0x39010409, +0xD1501FA0, +0x88AF59A0, +0xBE340D54, +0x269F76BD, +0x79143770, +0x495769F6, +0x8505BBE4, +0xDFEBDD7F, +0xCB40032C, +0x668530E0, +0x12446F7B, +0x91669A07, +0x0B41C1C9, +0xE80DC01E, +0x1B3E4A8B, +0x6A4C38CA, +0xBCACB226, +0xE0319DCB, +0x174525E7, +0x50E96E43, +0xE76991B0, +0x43711549, +0x667942BC, +0xC13B9303, +0x22A86D18, +0x214C0822, +0xEDDA5108, +0x56916287, +0xEC59A739, +0xD2122ED1, +0xCD0D0454, +0xA7A12BCC, +0x1F6E261A, +0xA8277038, +0x4C96A78D, +0x2128EF6B, +0xDA7236BC, +0xF6D266CE, +0xC43B64C5, +0x5F7F66CD, +0x85E36246, +0xC8D52226, +0xCF123408, +0x7CF6336B, +0xFC0638D5, +0x3EC9E742, +0x016E5945, +0x46C730EB, +0x4E384E5B, +0x65EC5747, +0x7BE6A51D, +0x08B55391, +0x32BFB5FD, +0xABCB5D75, +0xD844700D, +0x55736504, +0x0CF15B6A, +0x3E44F155, +0xE0399C91, +0xE9EBAA29, +0x8F83CC33, +0x0E211D96, +0xA385A4D8, +0xC2B58B1C, +0x7D062AEB, +0x8FEE64BC, +0xB71DFA2A, +0x95C63764, +0x60B8712D, +0x198A1124, +0x9474FBCC, +0x842EBB83, +0x3302C2F8, +0x7C05AA86, +0x95A24D4F, +0xBB61222E, +0x9A652C0E, +0x6F83124A, +0x9718A78E, +0x3CA5B7E9, +0x95A0FD5B, +0x5779A52D, +0xBCD62A42, +0xA74282B9, +0x50E2012E, +0x34B442B6, +0xC3CDC698, +0x98BFC724, +0x51F2BAD9, +0x203F1688, +0x70ACF5E4, +0xDEC7C73A, +0xAA424876, +0x32797973, +0xC02576C0, +0x559069BC, +0xE9D1DEB7, +0xDE83EC3C, +0xA392EA23, +0x61A01B4C, +0x499819B8, +0x7955B4D2, +0xCADCE486, +0x12435ABC, +0x565045C8, +0x07174AE4, +0xE0CD6F0F, +0x1B4A2B2A, +0x68E0DE6C, +0xC43D3A43, +0x0866B0A9, +0x661D25A4, +0xC61F3930, +0x9DE0A73C, +0xAC07FF3F, +0x8EF9FF37, +0x5ADB5636, +0x68E7B24A, +0x57975396, +0x8776398A, +0x03985540, +0x439D882E, +0x5DA790FB, +0xC48C1602, +0xACBBB26A, +0x19A8FF7E, +0x40142DD5, +0xC04F8A58, +0x030AD3EC, +0x73D93CC8, +0x36FB33EB, +0x367AB837, +0xDCB2853B, +0xC8A920AB, +0x88DA45D3, +0x4EC9FAC7, +0x6E4C641D, +0xC9B024F6, +0x8C4C49D0, +0xF850FB19, +0x8AC08844, +0x2A489626, +0x5E638CF4, +0xDF499729, +0xB8EAB5A3, +0xD118066C, +0xA4041D79, +0x33708534, +0x8072FCDF, +0xED2F52E4, +0xE68A8EA9, +0xF7B517EC, +0xD1FB9FF2, +0xF4CECC47, +0x9DD3F6B0, +0x27AD0667, +0xECA482BE, +0xC3B66366, +0x70001679, +0xC98E2DE0, +0x0330FA4C, +0x52B88C7B, +0x3247D62B, +0x39AFD734, +0x5A3F21C9, +0xB67AD2C0, +0x401DE77C, +0x97F61E57, +0x82871136, +0x1AB5DD13, +0x0EF4E39D, +0xF62D6FAD, +0xC9332456, +0x4BE89DFF, +0x54514589, +0xE5D86920, +0x9F475CA5, +0xAA709643, +0xE34163DC, +0xF2F2543D, +0x7FEFD090, +0xFE5B879C, +0x45BBACEE, +0x50F4DC22, +0xE534D0E5, +0xACE33A38, +0xE52799D6, +0x4A28D647, +0xD01A3B9B, +0x2209D8D4, +0xB404D7E6, +0x685E77D3, +0xBD3AE5D9, +0xF8B92CE0, +0x75242638, +0xA443253C, +0xB8BD3B23, +0xF5722F56, +0x9F413F4C, +0x4101FDDC, +0x2CCB2869, +0x5FFBEA86, +0xB0C6B640, +0x26870C90, +0x9C9F6E51, +0x742204B1, +0xA97799C0, +0xDC6192DB, +0x410BADA1, +0x6AD8A837, +0x66D446C8, +0xB5E78849, +0x1095ADE0, +0x86A1D72B, +0x7A675AF5, +0x680367A9, +0x662B25C1, +0x778A838D, +0x861BA0CC, +0xC332F9BC, +0x77B38855, +0xECBC6850, +0x35820A93, +0x4C65568B, +0x27264253, +0xA0054ED9, +0xC89F6562, +0x8EB52E3D, +0x89AD8348, +0x58191987, +0xFAF8AE0B, +0x26FE6CCC, +0x3189863B, +0x828C2E5D, +0x76896EAC, +0x16431FC7, +0x427A3B8A, +0xB22A172C, +0x4511582D, +0xEA87A24A, +0xDB9746C8, +0xD562293C, +0x86F7BB0E, +0x9352D075, +0x0F6BF6D9, +0x5705E550, +0x66D33798, +0x785E4045, +0xB52D3655, +0x51CA9699, +0x45760693, +0x1535215E, +0x601E00B3, +0x354D5947, +0x204A4132, +0x89F914C9, +0x635DAB78, +0x7F8709A2, +0xE2A18A91, +0xA9DFCBDB, +0x89E976BF, +0xB5A8164C, +0xD74AF910, +0xA653F1E6, +0x963AFE79, +0x4BDD11CC, +0x6A43A8ED, +0x9D944C92, +0x4B05D17A, +0x4A578BC8, +0xCEC95C9F, +0x4D022263, +0x0D781CEA, +0x802FD7E0, +0x374640DE, +0x287D182B, +0x49312E6F, +0xA1E59948, +0xAF753C5E, +0x71AC862C, +0x42761C2B, +0x29B99D26, +0xE6F90176, +0xDFDB689A, +0x46628A37, +0x83C47D0E, +0x55EC089F, +0x5EC8E950, +0x6D10F218, +0xFE48F8B4, +0x19DBCE81, +0x6F18B66B, +0x60A25769, +0xF74E3BB1, +0xCCFE197D, +0x44D9F593, +0xBB2A2469, +0x64A0C3F9, +0xA8432CC9, +0xA4F1E121, +0x27E28ADA, +0x6201A41C, +0x50FAA872, +0x25F9682E, +0xCAADFCA1, +0xA8000EED, +0xEEF33B96, +0x11D2ED7D, +0x2EA2E1A2, +0xDCD34A44, +0x69328123, +0x9DE958AC, +0x55FA4D7B, +0x5CD84F6F, +0xC59FC0B8, +0xB136285A, +0x324B67D1, +0xF494F017, +0x839A026C, +0x44A7CC39, +0x93A979A6, +0xF9C8067C, +0x8E884C34, +0xEC6992EA, +0x0071E5D0, +0x7C107569, +0x5700A9C9, +0xAB84C9A5, +0x3F55D14D, +0x90D6ABCA, +0xA03FECBF, +0xFA0CE0DF, +0xFC2E1D34, +0x69985EBC, +0x98F75A76, +0xFF610A0B, +0x90F82DC4, +0x5058665A, +0xAAABD2F9, +0xAA753522, +0xC26659F5, +0x7FFE8D56, +0x8167E7C5, +0x107B4D04, +0xD823EB8E, +0xDEEE7D05, +0x7C381541, +0x950E13EA, +0xF62B54DE, +0x03FDDAD6, +0x044D6B47, +0x8913E674, +0x735A21B9, +0x47FFB28C, +0xC840D359, +0x73B7A599, +0x9789BA06, +0x512F2C9E, +0xF1A1E093, +0x752F4A94, +0x4AB19397, +0xCC2F8E0E, +0xE77E49C9, +0x05C42091, +0xC07EDAB5, +0x44BE8449, +0x05C2338E, +0x1400F51A, +0x18FE4256, +0x911BA3CC, +0x35CFE147, +0x029F0396, +0xA5D81FBE, +0x38FC18E9, +0xABFCC512, +0xB173E2D1, +0xA81DF25F, +0xE81F20AD, +0x07F782F6, +0x08C906FE, +0x3294B0FB, +0x0EC6D022, +0xE02B3153, +0xDC81161F, +0xFCEC3F5B, +0xF11719DC, +0xFB42492F, +0xCCFA33FD, +0xD66E0727, +0x240C4772, +0x3BD3E904, +0x83D0DA00, +0x2B7E672E, +0x9CD6D0E0, +0xB9140C5B, +0x5DFB6691, +0x33ED958D, +0x67D8776D, +0x6627246D, +0x4691025D, +0x309E5FA0, +0x8554DBC4, +0x87776898, +0x3C024510, +0x280151AF, +0xD429F437, +0xEC329C82, +0x6644BDD5, +0xA2C7E121, +0x5C682E07, +0xABDB7F23, +0x23F83C9E, +0x6562A9F9, +0xED195F97, +0x9BD22A40, +0x625D69AD, +0x544DBA34, +0x52157683, +0x2CB72049, +0x58CC800B, +0xAB4207E6, +0xAEC8B356, +0x8F1EB5F2, +0x549D7C07, +0x9249963C, +0x86F847EE, +0x2688C24B, +0xE4E95ED9, +0xF2B5B49F, +0xA5A415A9, +0x02ABF372, +0x79A16B95, +0x2BA393E5, +0xFA14DC15, +0xBA1D056B, +0xDA84824C, +0x7DAD55A5, +0xF0F810F3, +0x4D046A02, +0x4A842128, +0x31B37F91, +0x2C326FFF, +0xAD7DEC9B, +0xE81B44C0, +0x989E88C3, +0x7C2EFFEC, +0x74BBA627, +0xFEB61B12, +0xD7D0DD8B, +0x372AF5E5, +0x235E9FB0, +0x3FE1D340, +0xCBCE8F89, +0x0CA41CAD, +0xAB4E39F3, +0x00C05929, +0x3E714CD1, +0xE1545EF6, +0x80D0F81E, +0xC330BE8E, +0xEC657372, +0x28329E89, +0xFC877BC4, +0x618FB09E, +0x07FB8603, +0xCAEE7B18, +0x010C362E, +0x197B969C, +0xA949B2FD, +0x9DF1EB0A, +0xE0D2E2E9, +0x0049C1C1, +0xAB0187AE, +0x7900743F, +0x9F62AD7F, +0xF980FADB, +0x9B704719, +0x13F730CD, +0x9939F921, +0xC6277996, +0x360904FD, +0x43B61341, +0x1BDE79EC, +0x0106767B, +0xF36FC478, +0xC63754B5, +0x2D9578E2, +0xD1132110, +0x5B921F4A, +0xC2C89F7F, +0x22CF9DD8, +0x645FC283, +0xE3E1E33F, +0xD8BC1E15, +0x4C3FE314, +0xEEAB254A, +0x32465178, +0x3537BA88, +0xFFD0C6C2, +0x778B39A4, +0xB69D5A9A, +0xB9A1504E, +0x8C229422, +0x17E7445B, +0x33901080, +0x1B6EB3F1, +0xB9A14EF5, +0xFAC78BF2, +0xE5325041, +0xF58C5750, +0xA8913C7A, +0x2D9ABBCC, +0xFD713B81, +0x75C7E995, +0x4DC80E8A, +0x0157DC00, +0x2D602BBE, +0xE1F2CEB2, +0x7202DE0E, +0xB2DA573B, +0x78EC3E18, +0x31847042, +0x98C8FDEC, +0x6D720DE5, +0x33400C23, +0x48CEDCBD, +0xAADC77B8, +0x1322E5F1, +0xF8C5F762, +0x6FAFFF90, +0x54C770BD, +0xE6B40CB6, +0x781E2B59, +0xF88DA77D, +0x51AE942C, +0x8A866D60, +0x602F842F, +0xB565963B, +0x9A6BED84, +0xEE933923, +0x28930330, +0x59EE1342, +0xBE69F6BC, +0x234CB711, +0x2FB06D62, +0xCA58E66F, +0xE71EF4F2, +0x52D4A6B9, +0x6AB3A870, +0x90D99460, +0x78FC8C7B, +0xA42529D5, +0xADE2E058, +0x449E1A51, +0x1D69CC5F, +0x59D554B5, +0xA084CEC9, +0x7A707873, +0x91D8801C, +0x3FC2D1D8, +0x05BB34F6, +0xE7C0D6AD, +0x64656A77, +0x001F8C32, +0x5F35B671, +0xD30026D3, +0x80E88452, +0xB0994E2C, +0xC6C65AFD, +0x5FC3BD84, +0x77793CFD, +0x75251601, +0xA0D83A02, +0x71A1EB93, +0x56BF0D15, +0x0938D6A7, +0x783625EB, +0x40D0981A, +0xE8471C34, +0x99360A37, +0xC6FD1571, +0x3C904D53, +0x01DD799A, +0x4DDE2EA0, +0xAF6F3062, +0xCD407FF4, +0xE6471428, +0x8DF7269D, +0xF0D6E645, +0xCC015ABE, +0xC5B80321, +0x54C305FD, +0x698CAF15, +0x4E4A9FEE, +0x366F81B8, +0xE94B9764, +0x1A80380F, +0x2BFBAE1D, +0x9B3E441C, +0x8FBB5E9D, +0x17C36281, +0xB6E7357B, +0x1475FB07, +0xCFE27444, +0x89B4005D, +0x36D68B05, +0x3AE414A3, +0xABAFDABF, +0x6FBEFBA8, +0x698D202A, +0x3419EB54, +0x93DBDB1D, +0x3AA8E3D1, +0x5B5F00C4, +0xD63DACB7, +0xC12EB59D, +0xCA01B758, +0x75F39F4E, +0xC58D4D06, +0x38CC4BF8, +0x0B095023, +0x7C059C4D, +0x94269FFA, +0x0A6BEC85, +0x0FDE9CE9, +0xA602F3A7, +0xAA920062, +0x88D26D7E, +0x46D5283F, +0x2A1ECAA3, +0x9D96F234, +0x1A764985, +0xEC2E77BB, +0x2ACE8ECF, +0xEA13056C, +0x4FB82CC7, +0xCAF73AEB, +0xED283CB0, +0x9325DEEF, +0x5CD31C16, +0x718FAD00, +0xC30582DA, +0xC8DA374C, +0xE8F3522E, +0xA2751B28, +0x0B510445, +0x6E15B45F, +0x453FC276, +0x25BDE9D4, +0x2FF360C6, +0x8C6C469C, +0x75EE9F2F, +0x33790891, +0xB57444C2, +0x7C04030E, +0x8A9AFAB3, +0x4ACB6765, +0x9C1680F4, +0x2B5542A9, +0x9E7F174C, +0xD0B0449C, +0x18962466, +0x32A547F2, +0x2DAA7675, +0xEF737436, +0xDC13ABAD, +0xF2D318A9, +0x23BE7233, +0xAFC1C12B, +0xE2B68D6B, +0x07F394AC, +0xF9F1C21E, +0x5DED418E, +0x01EC49E4, +0x1332E9CF, +0x181224B1, +0x7CA718C5, +0x92271AF1, +0x8E76C50C, +0xD2231777, +0xC196A3C0, +0x0A9457E5, +0x3799AD6E, +0xA5B2F07E, +0x91CEAB58, +0x750FEB32, +0x5DA820CE, +0xE2882685, +0x35D0A9DA, +0x8762C754, +0xCF5E23E7, +0x239C5CDB, +0x8F9B7E95, +0x4D43C8D2, +0x3986E19C, +0x3F19F7DB, +0xB8208A3B, +0x7FAE5E3A, +0x4B36BD49, +0x9E847243, +0x45246038, +0x447BAA41, +0xFCC6727D, +0xF8CB273A, +0x98E5AA23, +0xB47FC976, +0xDDA9E361, +0xE58E332B, +0x96DAC60B, +0x54D8F6CF, +0x1DB959D0, +0xC32685BC, +0xA75C66D7, +0x46DDD40C, +0xAADCC15B, +0xCA8F1AA8, +0x654088BC, +0xBBB8B2A0, +0x9333D0C8, +0x2D11F813, +0x3DE13404, +0x6EAB0404, +0x73F1A98F, +0xB11E5DBA, +0x50F09FA7}; + + + uint32_t mldsa_seed[] = {0x0a004093, +0x27d15f67, +0x121d0737, +0xd5e4ce3f, +0x28fe43a2, +0xd4f06807, +0x858a7646, +0x9cf85c2d}; + + + uint32_t mldsa_sign_rnd[] = {0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000}; //deterministic signature + + + uint32_t mldsa_sign[] = {0x89E8DA09, +0xEDD3600C, +0x15A06D5B, +0x5CBCA92C, +0xADF08F43, +0x13D0C0E2, +0xB23E24B3, +0x29EEBD1D, +0x81DE6DEA, +0xE3F36797, +0xA494BA21, +0x21E0A274, +0xC3988770, +0x902E2CB3, +0x25B79FD1, +0xC6ED2197, +0xA6386D50, +0x174548C5, +0xEAC449A1, +0x166F864D, +0xCC6A72C6, +0x9CE883B7, +0x83496A8F, +0xB7D7CAC3, +0x11499633, +0x7082E3D4, +0x5913F541, +0x51184FAF, +0x4CC4A45E, +0x71055E82, +0xE1F07279, +0x006278D0, +0x0F427C13, +0x85800609, +0x418D46A6, +0xAC9EFC88, +0xE65C6532, +0xF2951B4C, +0x54A3EBAC, +0x4ABD047E, +0x9DBAD4AC, +0xBF9F1B67, +0xF53CDAE7, +0xC95D59CD, +0xE964C7F1, +0x644B2F2A, +0x2F2F3E1F, +0x8AEAEFE0, +0xFE7F6BF6, +0x20E04ECF, +0xD0C6409F, +0xABFC7105, +0x5B31BFC1, +0x24441C38, +0x8DF7B277, +0xDFF16EAA, +0xAD598580, +0x7DA36100, +0x7E316364, +0x6F44541A, +0x623271B2, +0x4ADB351C, +0xF68BAC7E, +0xBECF63B6, +0xC0ADDCF8, +0x0EE0440B, +0xD7946E95, +0xF188C2DE, +0xC36D3295, +0x24DC1B46, +0x738FB3FF, +0x0DA06FD3, +0x94424842, +0x2394569D, +0x3CFA33E6, +0x5CAB3E8C, +0x61DA6256, +0xDD396995, +0xBDEB151A, +0x5B7CDF42, +0x9914F35F, +0xFA6B7968, +0x07D70426, +0x715AF96B, +0x379DAE93, +0x0D51A071, +0x7817CBDA, +0x0EF43F0E, +0xA2BEDE04, +0xD9FD2C72, +0x870F2B81, +0x2818333C, +0x5EA491C3, +0x44F4D359, +0xEFFC9198, +0x4809A74E, +0x431DFEB0, +0x5EFA1BA6, +0x6924E4DE, +0xBA91E970, +0xA3ACBB2B, +0x34E27209, +0x2E18C4FF, +0x4CCB7302, +0xC0067CE9, +0x23C68C23, +0x3AAE99B7, +0x090B7038, +0xCEFA82AB, +0x19A34B94, +0xD21FC70A, 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+0x166C4C53, +0xA2D7E494, +0x855F3026, +0xC9536E95, +0x452C2DA7, +0x7C5932A8, +0x991CE2B7, +0x49DF5EA3, +0x9A72FD36, +0x19013550, +0xE68D0378, +0xA666F03D, +0x36959C7A, +0x811328A3, +0xA266F415, +0xAD052961, +0x3DA43882, +0xBD0BC1D8, +0xEFCB566A, +0xFCBE32E0, +0xF0182653, +0xA15A3201, +0xDBC23BAA, +0x4947D033, +0xEA45E01F, +0xB77BAAF7, +0x10F0A041, +0x7261A9DC, +0x1076FD8E, +0x5CC6D03F, +0xFDBA8229, +0xB978E892, +0x28409FC1, +0x03BC9D87, +0xFF0351FD, +0x31C573B5, +0x663C9870, +0x132EA055, +0x5F233FF9, +0x5F5C6FED, +0xD9462A42, +0x45EF0F25, +0x78E294BF, +0x608EEC39, +0xBB275C19, +0x2988C732, +0x776EFA6A, +0x240B63EE, +0xAB94D308, +0xD25BB249, +0x3B199F8E, +0x62868AF1, +0x493BF851, +0x3EC7F3C0, +0x1F9A8ACE, +0x1F6D3187, +0x695DE327, +0x7A0B4395, +0x7961D601, +0xB5DEC846, +0x47ADEA7F, +0xB37C1A00, +0x9A8ECD29, +0xC745D2CE, +0xA2FF0839, +0xB544D5E9, +0xFB20541A, +0x7E54F9CD, +0x6735083E, +0xB029373C, +0xE44A911A, +0x818156EE, +0xB8C83F5C, +0x722E217E, +0x06E664A3, +0x6DE2D766, +0x7A4C5E40, +0x2AB48760, +0x8075B851, +0x840C712E, +0xB6E281F2, +0xDF2F74C7, +0x83FFA293, +0x01899BC7, +0xF8ABA0E9, +0x9E1BF882, +0x5D5AAAE0, +0x2180A79E, +0x43B96D40, +0x738ED2FA, +0x28125016, +0x8151F9CF, +0x73EF2B56, +0xA2B3B33D, +0x0B7B62B4, +0x39F603F2, +0x54F6C4C9, +0x6E1F96CB, +0x10224F18, +0xEAEF81FB, +0x08D87035, +0x2375B9F9, +0x4E6A9E06, +0x0C282B47, +0x5D617F96, +0xA4E95456, +0x76192538, +0x516279CD, +0xD8DCFE05, +0x58B1C2F1, +0x144D5E61, +0x6D9DA9BE, +0xEE97A0A1, +0xA4000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000004, +0x0712151F, +0x242D3100}; //last byte 00 + + + uint32_t mldsa_entropy[] = {0x3401CEFA, + 0xE20A7376, + 0x49073AC1, + 0xA351E329, + 0x26DB9ED0, + 0xDB6B1CFF, + 0xAB0493DA, + 0xAFB93DDD, + 0xD83EDEA2, + 0x8A803D0D, + 0x003B2633, + 0xB9D0F1BF, + 0x3401CEFA, + 0xE20A7376, + 0x49073AC1, + 0xA351E329}; + + uint32_t mldsa_pubkey[] = {0x75A8F4C9, +0x56C0D7DA, +0x6C7FE78F, +0xB03E722E, +0xD1FC4F2A, +0x5E244960, +0x0E616F61, +0x995A4A88, +0xBABD9257, +0x1C680253, +0x9C86367B, +0xAC5D6C33, +0xEE7AD2F4, +0x7331681D, +0xAA2ECD32, +0x72A07C98, +0x88EF4FB3, +0xD7D7B553, +0x4D62D48D, +0xB4E7AAB9, +0xA3DCB673, +0x2CF5959D, +0x5ACD4B25, +0x8FD9AAD0, +0x57598DB1, +0xA8503DD8, +0xF788F9B5, +0x51423A93, +0xDEC204C8, +0xA67890B5, +0x33BDAD35, +0x44E65DD2, +0xDA8876E6, +0x803E5D77, +0xC6FA1F1C, +0x232AC032, +0x8C69650C, +0x63E23FD7, +0x24496B95, +0x236B585F, +0x76FD7C94, +0x9B0204DD, +0xF23E55C8, +0x83C88B34, +0xA55B2D3B, +0x377DE412, +0x2F9CBE78, +0x143EFC7A, +0xB9D23B98, +0x67F5F939, +0xDF336A02, +0x5653B525, +0xD7F23586, +0xF82C3AAD, +0x578883ED, +0xDAB3868A, +0x08115BD0, +0xC313AD31, +0xFF44F4F6, +0xB855025E, +0x5FF68B72, +0xC9D353CE, +0x54194914, +0xB266EF4D, +0x3F1F8740, +0x142A53D1, +0xC27BF5EF, +0x2D7E8840, +0x2C565079, +0x247080AE, +0x0D07D6D7, +0x568FB887, +0xFE18BCFD, +0x8261ED2E, +0xF494C18A, +0x8E6B8A20, +0x9781A4CD, +0x2CD32CF6, +0x1EA4474E, +0x74AA20A2, +0x2DA5FD0B, +0x4955DB1E, +0x2B9A6C3C, +0x38072C90, +0x42D2744A, +0x5810F3C3, +0xE9645B84, +0xDBFA7891, +0xF5BC4E41, +0xFDDD2DF1, +0xBACD84AE, +0x80BEE050, +0x2CACAC54, +0x7FD6521A, +0xEFCB4B95, +0xB58BCC19, +0x4C6B5A4E, +0x5214018B, +0x6F2BA80F, +0x21122004, +0xED559A86, +0x776826F3, +0xD777C25A, +0x283EADA7, +0xBD2004B8, +0x8E19D7B1, +0x5FEA24A1, +0x53C08F09, +0x36E896EA, +0x2ED175C0, +0x7A2CD400, +0x81D14708, +0x7F8E7E8B, +0x56BD438F, +0x7DAC54BA, +0x3A2D7255, +0x6BACAB5C, +0x6A6C8D63, +0x2ACF6E41, +0x1E1E9299, +0xF2A2FD4C, +0x6519AC22, +0x62ABE387, +0x4871039D, +0x177BFFE6, +0xD167821F, +0x05E46393, +0xB1FCD5A2, +0xCE192183, +0xFF741B18, +0x5280A379, +0x840C75B9, +0xEC706C16, +0x17DB9224, +0x958572BE, +0xF0158B00, +0x0F6C5BCE, +0x5066C4E3, +0x11509EFB, +0x92437C86, +0x5EF4F6C2, +0xE8493A26, +0xED8B2FD9, +0x9ADFC161, +0xA9059DFF, +0x794ED52A, +0xF6C83B78, +0x94FB2C79, +0x265468C2, +0x30CDDF36, +0xBFE6EBAF, +0x11463F0E, +0xF4CCC789, +0xEF23EECF, +0x3933638A, +0xC5ED3BFD, +0xC0122B79, +0x1EFD23D7, +0xC239BF96, +0x9B886EC3, +0x626CF86B, +0x9D012C28, +0x09EA6BA6, +0x3A4F8E77, +0xCBADB40F, +0x1A8B7C2B, +0x7AC21C00, +0xD3AC87D9, +0x8E61CE66, +0x91A7F5B2, +0x351D80D8, +0xED30B5A9, +0x006153A4, +0x878E5175, +0x69F192F9, +0x4F84BB9A, +0x4F35A45B, +0xB41EE126, +0xD93C19DB, +0x43A981C5, +0x7377DC9B, +0xCE867A76, +0xF2C49D0D, +0x9E8801A1, +0x726C8EEB, +0x70F7EBDF, +0xAC83E46A, +0x9CC27185, +0x02E590A9, +0xD70E82A9, +0xCCF56D33, +0x526C8E25, +0x75172C72, +0xE4259AA6, +0x39999175, +0x827B9380, +0x3C5B43E5, +0x0C8833A8, +0x0CC52A11, +0xB2C959B5, +0x572DEA35, +0x924E1233, +0x7BED0E92, +0xA4EFDA31, +0xE1E161B2, +0xB57B4828, +0xE9D95685, +0xE7DB7AC7, +0x95186A8B, +0x966F90CA, +0xF876F405, +0xF1EE9D64, +0x59FBB274, +0x0783870F, +0xE6A5C3FE, +0x8036ED64, +0x7BF544B8, +0x8958C4F2, +0x63409F56, +0xA61588D7, +0xD8BBB407, +0x3E7FD7C3, +0xC9E25006, +0xC97BC180, +0x43505441, +0x4CEFEF80, +0xD77DD7DC, +0x81099F4B, +0xF565D4E8, +0x91BD8636, +0x8669FAEC, +0xD31F1F1A, +0x246C9698, +0x38432715, +0x309AA45E, +0x8ED86151, +0x7C13AC94, +0x602933A2, +0xCD3BFA06, +0x735E62C4, +0xBEB652CB, +0x12257948, +0x8BA8530B, +0xB5878787, +0x495CAD69, +0x6D7C5E1D, +0xE65A66E4, +0xFBEEAFAA, +0x259768EA, +0x2608ED25, +0xB5586EE1, +0xC06CEACD, +0x5510E416, +0x7F7AA4DB, +0xAC15C68A, +0x2A710660, +0x96EB8F0F, +0xE6AE7345, +0xC2434A87, +0xD28BEC35, +0xE506BE01, +0xAF27EDF6, +0x0752DE9C, +0x9014B22D, +0xE55778AC, +0x5010C780, +0xE79FCC35, +0x7AA29326, +0xEC748BCC, +0x593E62E6, +0xDBC51FFB, +0x3F282033, +0xE8935D8E, +0xF7EFFF37, +0xED6D1CDF, +0x5A204558, +0x773A1B8C, +0x7ECB8794, +0x9013BDFF, +0xD6E8E05C, +0x817E86DF, +0xB7B62986, +0x19870FE7, +0x3E2B6099, +0x2209207D, +0x94B856FD, +0x56F4C39A, +0xD937DEF5, +0x7AEEA0C8, +0x32F54BF4, +0x08755F39, +0x88A39EF8, +0x71335BDC, +0x2169F675, +0xC95EA265, +0x8266E29E, +0x39FE97C0, +0xC2093E8A, +0x2EAA9DB7, +0x5A6A4FEE, +0x8F6889BE, +0x3A606C79, +0x956C24F3, +0xB560CCE1, +0xC3716145, +0x3868D9BB, +0xAB0A87D8, +0x5375126B, +0x6DC3E0D1, +0xF67B32A0, +0x006A8D3C, +0x705DF2C6, +0xB03BA0FA, +0x2B9634C3, +0xB0869552, +0xA0DAC3B2, +0x1ECC8BA1, +0x7B341C22, +0x10D0A23B, +0x5FD68BB1, +0x335AC96C, +0x3EF3701E, +0x0A2ACD38, +0x90A4AEBC, +0x908BC063, +0xBBF2EF3D, +0x50CF0F8D, +0xA48F7DDE, +0xB86F9D77, +0x3E544C70, +0x44704107, +0x6E99C93D, +0xB9D39780, +0xDF774DA3, +0x5A0163DA, +0x3EA50F17, +0xA69A2144, +0x10736015, +0xA4ABF71F, +0x43083324, +0x951FAD48, +0x5EBAF55D, +0xE945F8C6, +0xEFC3E8BE, +0x26917E5A, +0x29605040, +0x5A97FECB, +0xFD2625FC, +0x676AD1A9, +0x145BB8A9, +0xC1F1B3A4, +0x6519F77D, +0xA83C44D2, +0x861CAD6A, +0x56AB01BF, +0x84F7709F, +0x0F5270EC, +0x550F6691, +0xC47E6B18, +0xF4B5B884, +0x118FD4AF, +0x03D30460, +0x119322EA, +0xEF583A15, +0xF00A561A, +0xFC498539, +0x3AD53B68, +0x1D41D469, +0x790A24BD, +0xC6056EB9, +0x2DCE833A, +0xB33581E0, +0x8267CEFB, +0xBC206761, +0x92A7608F, +0xB7E34228, +0x01D93518, +0x43B47626, +0x3C0D1D54, +0x42613D6E, +0xB9924662, +0xB20BC213, +0xCA335A52, +0xA5F3CBCB, +0x8FCA9D91, +0x64170C89, +0x28DD5D2E, +0xAF9290D8, +0x2EA8FF72, +0x99E772DE, +0x20567C79, +0xD6EBAE9B, +0xF5834CAD, +0x8D55ACCA, +0x5E9B22E9, +0xCD0942DD, +0x262F06D2, +0xB21C2488, +0x38D8B76C, +0xAC91E98F, +0xA4D5369F, +0xE26A609C, +0x2E6547C2, +0x9137D45E, +0x4F4B0872, +0x4DF78651, +0x1FBD75EB, +0x72DC72DB, +0x2FF0B8D9, +0x0461EEAD, +0x262FEB19, +0x08F0605C, +0xF60B5F48, +0x733E3EE3, +0x1B12EDA1, +0xC220EECF, +0xCA7160EA, +0xE73DA742, +0xAAA34081, +0x49EE2559, +0x85ED681D, +0x733AB497, +0x71BBD77E, +0x344976AC, +0x45556A83, +0xCF5EA3A5, +0x57D6F2D8, +0x54AF1396, +0xFE62BF2A, +0x582F3A25, +0x2B9CBB00, +0xAFF5E7A5, +0xDAA0B44D, +0x3355374C, +0x70BC6117, +0xDBCF67CD, +0xE2C02527, +0x5A49105B, +0xF0D464B5, +0x54761C8E, +0x0340FCCF, +0xB2993728, +0x381F0A01, +0x5DCC10D7, +0xA2697067, +0x1FF41C6C, +0x12CFF6E7, +0x1E16A376, +0x3964042A, +0xB8EE7A1D, +0x9DD7DC8C, +0x73229061, +0xDA4CF614, +0xD2F53366, +0x28FF9DC9, +0x2A1A5FD3, +0x3240EF00, +0x575D5008, +0xA2F1A632, +0xB7BB843A, +0xB18113B1, +0xF0975B6E, +0xCA7ABB6C, +0x18C2D17C, +0x9542B8FF, +0x6E99C186, +0xFCDAF6F0, +0xAB62DD37, +0x646277AD, +0x482D7F06, +0x6C3C7678, +0xD5A9ACC3, +0xC162C8AD, +0x3EA326EB, +0xCDD51824, +0x0A6040B7, +0x17DBE698, +0xF6E0E49F, +0x35741289, +0xA61F143B, +0xD0C2F335, +0x84733EA0, +0x5C0F6032, +0x1ACE1874, +0xF0C2FF27, +0x30F729B9, +0xB20FCF64, +0x994719B9, +0x5C0126AF, +0x36E379AF, +0xB8940EA2, +0x8F69A436, +0x02A10091, +0x81547AA7, +0xF1C6B59B, +0xDFB5F010, +0xFBA702E1, +0x93D67AF6, +0xA2D0277F, +0x474E5042, +0x80EB8C56, +0x5AFE7696, +0xD8FED00C, +0xDD560536, +0xEA3959D2, +0xD7D1DBD7, +0x02CD325C, +0xCDE51CDF, +0x0C1AF06B, +0x62089CEB, +0x523AB942, +0xA50A36E6, +0x7C786B83, +0xF93C29B5, +0x15CB56AF, +0x23C5412C, +0x1B2FF1BE, +0x9E01B53B, +0x6325C54F, +0x3E7FA5FB, +0x3F2D167B, +0xFE6F7AAE, +0x10CD4994, +0x86C74F26, +0xE76E8FC1, +0x8E7FE42B, +0x09757222, +0xDDDBAA0D, +0x97F88AA1, +0xF9FC0CF1, +0xC9F781B2, +0x8ABD0A7E, +0xB9334646, +0x829FDDFC, +0x9F505ECD, +0x9BC8EDDA, +0xC160366B, +0xBC04AA2E, +0x62A7A209, +0x594A87F9, +0xE121DFE9, +0x61DA3ADC, +0x7764DD63, +0x844B4FCE, +0x43478D15, +0x1FCDA95F, +0xF1770B3D, +0x87A6727F, +0xC274D7ED, +0x11A1F0E2, +0x86992E87, +0xDAB4763C, +0xDC33027F, +0xB60D42A3, +0x06501721, +0x4496E54C, +0x3D0EF595, +0x3254C024, +0x08D3CE80, +0x7CDD58FF, +0xDCE15AF9, +0x4762C489, +0x0F47F621, +0x5FBC2838, +0x2F72C934, +0x6B4D74DD, +0x7C768A06, +0x7FF6AA96, +0xE495DFA9, +0xD13470B6, +0xADC362BD, +0x8C442D77, +0x94143894, +0x4521F67E, +0x85673C5F, +0xF3735129, +0x09B8371D, +0xCDE344CC, +0x8A602C33, +0x27903300, +0x3C4B7BB5, +0x1354B2E6, +0x6C415E7C, +0xF3CD0130, +0x04CC968B, +0xE01A21D9, +0x104F92E9, +0x307D9D95, +0x81C2C125, +0x581739CF, +0x740DDE7D, +0x530E22A3, +0xE0811755, +0x9843A0ED, +0xF0B6D576, +0xB4B528C8, +0xE21D00FE, +0x8814F357, +0xD63D0F4B, +0x091F4A9B, +0x4B3DE3DE, +0x2F3DDBA9, +0x528F7C6E, +0x95433AEA, +0x0DDC9077, +0x472572BC, +0x7F015542, +0xCBCCAC3D, +0xB5EA7269, +0xCD97E060, +0xE3BFA854, +0xDB263906, +0x946E6E5A, +0x973F355D, +0xD585DA0D, +0x39603F52, +0x91880424, +0x0F4C8A26, +0x40DE27CF, +0x9CC53003, +0x201B6DC5, +0x8A2ED125, +0xA52F4644, +0x4938A93F, +0xECDFDBE5, +0x04898FD1, +0x27E70F9F, +0x1AE29EEF, +0x61E6AC0D, +0x3B7C6A84, +0x561BFF14, +0x4EB78DFE, +0x9783F717, +0xBE8381BF, +0x94582504, +0x24B61F09, +0x5C1001BE, +0x264376F4, +0xBA325CEF, +0xF9BB4752, +0xCD3D8806, +0x870B5CFB, +0xFD252637, +0x364818EC, +0x11BFF699, +0xCC10F310, +0x2FDD62A5, +0xB527ED7A}; + +uint32_t mldsa_verifyres [] = {0x89E8DA09, +0xEDD3600C, +0x15A06D5B, +0x5CBCA92C, +0xADF08F43, +0x13D0C0E2, +0xB23E24B3, +0x29EEBD1D, +0x81DE6DEA, +0xE3F36797, +0xA494BA21, +0x21E0A274, +0xC3988770, +0x902E2CB3, +0x25B79FD1, +0xC6ED2197}; + //Call interrupt init + init_interrupts(); + + uint32_t seed[8], sign_rnd[8], entropy[16], privkey[1224], pubkey[648], msg[16], sign[1157], verifyres[16]; + + + for (int i = 0; i < 8; i++) + seed[7-i] = ((mldsa_seed[i]<<24) & 0xff000000) | + ((mldsa_seed[i]<< 8) & 0x00ff0000) | + ((mldsa_seed[i]>> 8) & 0x0000ff00) | + ((mldsa_seed[i]>>24) & 0x000000ff); //mldsa_seed[i]; + + for (int i = 0; i < 8; i++) + sign_rnd[7-i] = mldsa_sign_rnd[i]; //TODO: add byte swap - not doing now to save sim time + + for (int i = 0; i < 16; i++) { + entropy[15-i] = ((mldsa_entropy[i]<<24) & 0xff000000) | + ((mldsa_entropy[i]<< 8) & 0x00ff0000) | + ((mldsa_entropy[i]>> 8) & 0x0000ff00) | + ((mldsa_entropy[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 16; i++) { + msg[15-i] = ((mldsa_msg[i]<<24) & 0xff000000) | + ((mldsa_msg[i]<< 8) & 0x00ff0000) | + ((mldsa_msg[i]>> 8) & 0x0000ff00) | + ((mldsa_msg[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 1224; i++){ + privkey[1223-i] = ((mldsa_privkey[i]<<24) & 0xff000000) | + ((mldsa_privkey[i]<< 8) & 0x00ff0000) | + ((mldsa_privkey[i]>> 8) & 0x0000ff00) | + ((mldsa_privkey[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 648; i++) + pubkey[647-i] = ((mldsa_pubkey[i]<<24) & 0xff000000) | + ((mldsa_pubkey[i]<< 8) & 0x00ff0000) | + ((mldsa_pubkey[i]>> 8) & 0x0000ff00) | + ((mldsa_pubkey[i]>>24) & 0x000000ff); + + + for (int i = 0; i < 1157; i++) { + sign[1156-i] = ((mldsa_sign[i]<<24) & 0xff000000) | + ((mldsa_sign[i]<< 8) & 0x00ff0000) | + ((mldsa_sign[i]>> 8) & 0x0000ff00) | + ((mldsa_sign[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 16; i++) { + verifyres[15-i] = ((mldsa_verifyres[i]<<24) & 0xff000000) | + ((mldsa_verifyres[i]<< 8) & 0x00ff0000) | + ((mldsa_verifyres[i]>> 8) & 0x0000ff00) | + ((mldsa_verifyres[i]>>24) & 0x000000ff); + } + + mldsa_keygen_flow(seed, sign_rnd, entropy, privkey, pubkey); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + mldsa_signing_flow(privkey, msg, entropy, sign); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + mldsa_verifying_flow(msg, pubkey, sign, verifyres); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + // mldsa_keygen_signing_flow(seed, sign_rnd, msg, privkey, pubkey, sign); + // mldsa_zeroize(); + // cptra_intr_rcv.mldsa_notif = 0; + + printf("%c",0xff); //End the test + +} + + diff --git a/src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.yml b/src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.yml new file mode 100644 index 000000000..919e1725c --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa/smoke_test_mldsa.yml @@ -0,0 +1,3 @@ +--- +seed: 1 +testname: smoke_test_mldsa \ No newline at end of file diff --git a/src/integration/test_suites/smoke_test_mldsa_kat/caliptra_isr.h b/src/integration/test_suites/smoke_test_mldsa_kat/caliptra_isr.h new file mode 100644 index 000000000..5aed80789 --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa_kat/caliptra_isr.h @@ -0,0 +1,265 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// --------------------------------------------------------------------- +// File: caliptra_isr.h +// Description: +// Provides function declarations for use by external test files, so +// that the ISR functionality may behave like a library. +// TODO: +// This header file includes inline function definitions for event and +// test specific interrupt service behavior, so it should be copied and +// modified for each test. +// --------------------------------------------------------------------- + +#ifndef CALIPTRA_ISR_H + #define CALIPTRA_ISR_H + +#define EN_ISR_PRINTS 1 + +#include "caliptra_defines.h" +#include +#include "printf.h" + +/* --------------- symbols/typedefs --------------- */ +typedef struct { + uint32_t doe_error; + uint32_t doe_notif; + uint32_t ecc_error; + uint32_t ecc_notif; + uint32_t hmac_error; + uint32_t hmac_notif; + uint32_t kv_error; + uint32_t kv_notif; + uint32_t sha512_error; + uint32_t sha512_notif; + uint32_t sha256_error; + uint32_t sha256_notif; + uint32_t qspi_error; + uint32_t qspi_notif; + uint32_t uart_error; + uint32_t uart_notif; + uint32_t i3c_error; + uint32_t i3c_notif; + uint32_t soc_ifc_error; + uint32_t soc_ifc_notif; + uint32_t sha512_acc_error; + uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; +} caliptra_intr_received_s; //TODO: add mldsa intr +extern volatile caliptra_intr_received_s cptra_intr_rcv; + +////////////////////////////////////////////////////////////////////////////// +// Function Declarations +// + +// Performs all the CSR setup to configure and enable vectored external interrupts +void init_interrupts(void); + +// These inline functions are used to insert event-specific functionality into the +// otherwise generic ISR that gets laid down by the parameterized macro "nonstd_veer_isr" +inline void service_doe_error_intr() {return;} +inline void service_doe_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.doe_notif |= DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad doe_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_ecc_error_intr() {return;} +inline void service_ecc_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad ecc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_hmac_error_intr() {return;} +inline void service_hmac_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.hmac_notif |= HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad hmac_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_kv_error_intr() {return;} +inline void service_kv_notif_intr() {return;} +inline void service_sha512_error_intr() {return;} +inline void service_sha512_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha512_notif |= SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha512_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_sha256_error_intr() {return;} +inline void service_sha256_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha256_notif |= SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha256_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_qspi_error_intr() {return;} +inline void service_qspi_notif_intr() {return;} +inline void service_uart_error_intr() {return;} +inline void service_uart_notif_intr() {return;} +inline void service_i3c_error_intr() {return;} +inline void service_i3c_notif_intr() {return;} + +inline void service_soc_ifc_error_intr() { + uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad soc_ifc_error_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_soc_ifc_notif_intr () { + uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad soc_ifc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_sha512_acc_error_intr() {return;} +inline void service_sha512_acc_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha512_acc_notif |= SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha512_acc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + + +#endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.c b/src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.c new file mode 100644 index 000000000..f5d57e7c7 --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.c @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + +#include "caliptra_defines.h" +#include "caliptra_isr.h" +#include "riscv_hw_if.h" +#include "riscv-csr.h" +#include "printf.h" +#include "mldsa.h" + +volatile char* stdout = (char *)STDOUT; +volatile uint32_t intr_count = 0; +#ifdef CPT_VERBOSITY + enum printf_verbosity verbosity_g = CPT_VERBOSITY; +#else + enum printf_verbosity verbosity_g = LOW; +#endif + +volatile caliptra_intr_received_s cptra_intr_rcv = { + .doe_error = 0, + .doe_notif = 0, + .ecc_error = 0, + .ecc_notif = 0, + .hmac_error = 0, + .hmac_notif = 0, + .kv_error = 0, + .kv_notif = 0, + .sha512_error = 0, + .sha512_notif = 0, + .sha256_error = 0, + .sha256_notif = 0, + .qspi_error = 0, + .qspi_notif = 0, + .uart_error = 0, + .uart_notif = 0, + .i3c_error = 0, + .i3c_notif = 0, + .soc_ifc_error = 0, + .soc_ifc_notif = 0, + .sha512_acc_error = 0, + .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 +}; + + +void main() { + printf("----------------------------------\n"); + printf(" Running MLDSA KAT Smoke Test !!\n"); + printf("----------------------------------\n"); + + // uint32_t mldsa_msg[] = {}; + + + + uint32_t mldsa_pubkey[] = {0x86EBA265,0xF989E450,0x0C8CB3E3,0x87CBE265,0x08A4032A,0xFB8E978D,0x80EDED75,0xAA4692D5,0xC010151C,0x22FC4A84,0x3F9EC4BD,0x804908A7,0x05A154CF,0x2A75A08D,0xF94175AC,0x8E1AF30A,0xEF9AFDCB,0xD3C4C6C2,0x65527FC5,0x57DBDF1E,0x390F1B31,0x12682AE1,0xBC1AE0A4,0x5334FEAF,0xED6D1A7F,0xC508068C,0xE2374188,0xE40B4C03,0xFE8C3735,0x51C5C1A8,0xBD4C707A,0xD00B6DF7,0x7808B06E,0xE9F0464E,0x75508C1D,0xFDA68A54,0x3D6616B3,0x7F37FE2D,0x1E43F947,0x11F43A7C,0xA806728B,0x2C1B9DC5,0xC3BF3FE8,0x6740CDE4,0xBE46A95E,0x99818CD2,0x77B12E75,0x878FA1DA,0x028A3004,0x0F643DDD,0x97F5F776,0x1056578F,0xBA1C6AB2,0x56A803B5,0xB73F4D1C,0x35EDAF40,0x370D4A82,0xCA5AC8E7,0xCA15C1CF,0x77543D49,0x292E4DDE,0xB4CC6721,0x0839039C,0x85FD09D9,0xAA3B1670,0x7E91B025,0x96240B26,0xC9E835ED,0xA8337DE7,0xAAABE7D1,0x7F6CDCC2,0x9A5E1F89,0x6110265B,0x7A458868,0x3FE14037,0x1906917D,0x32B2E788,0x5DE8EAAD,0x0035F476,0x6D0D5433,0xC86D8B90,0x9DAF5AFB,0x02754AE3,0xEC78C804,0xB939D04F,0xE775A777,0xCC8BCC0A,0xB91CE397,0x24A2CB04,0x49B3F251,0x9EE08673,0x5694E2F2,0x66A3936F,0xADF367A0,0x32C84808,0xDD355F80,0x5DDCE286,0xBAF7DD3B,0xDC27DAB1,0x71422401,0x6E1131C2,0x22187472,0xE3F9B346,0x37DFE6E5,0xE5B2C959,0x7A8C0AEB,0x21532EEA,0x8F9B1730,0xA20FF975,0xC7EE0FCE,0x46513DF1,0xC87C7A9A,0xDF3B1525,0x267F5FB9,0x230A5E2D,0xA4CAC075,0x5C261AF5,0x9BE7F837,0x550A1EF1,0x3F3927A1,0xC19909D9,0xA308438E,0xEDCA0E01,0xEBA5AC55,0xB53A9E7D,0xF7259A99,0xD0F1DC54,0x31CB9AB3,0xEC47E0E7,0x0AD2EF0C,0xFBA99764,0x7327A579,0xE6A4DFC8,0x4DD4D496,0x69F8431A,0x401038A4,0xC60FC5E6,0x681F46F4,0xCC13FF02,0x64ADB54D,0x1651050C,0xCC13505E,0x48314889,0xF34F023B,0x31F5AC55,0xCF6DF0D6,0x546486FE,0xEB645421,0x71DD2CE1,0xB80A7BB0,0xD21A1BD1,0x2B2E0410,0x6DC1D062,0xD3A82BD9,0x2539E9AA,0xB000B53C,0xA1A9D22C,0x8D3B2870,0x2CD9E0A0,0xE4A6E104,0x9EB64B08,0xF47C409C,0xAAEA917C,0xFD656FDB,0x1975E91B,0x8D33168A,0x3A3FE4F1,0x6D948677,0x37612956,0x5C07FC96,0x1301A45B,0x2120A6E0,0x5D0CF00F,0xCD5EB40A,0xFE2C45B4,0xDFAA84CB,0x428B1AC2,0x379CE170,0xA31C75F6,0xC0E94CEE,0x84AF08CF,0x22EA3FD7,0x3CC31DB3,0x88F77D20,0x764AC80E,0x9D98F951,0xE4344328,0x1F3922DB,0xBD7667B4,0x36CEEE30,0x311A9DD1,0x23A7596C,0x46EE991C,0x5367EACC,0xBE4C0E03,0x44147C06,0x5754F5B3,0x63020C90,0x93BBDA21,0xCEDD00B4,0x47E97C8F,0xFE0616F9,0x76E5D9E2,0x64563379,0x9E25419C,0xAD1D5DBA,0xEE26B160,0xD3A7777C,0x3CAAFD89,0x93AE177C,0x90D31FF8,0xFAD80E92,0xA6C01486,0x23B3EB04,0xF1CD67B1,0x5C0BD4C1,0xA1838FAD,0x512B9632,0xD5A13503,0x879D1E44,0x093745B1,0x574D236B,0xEBC77D1A,0xE82E02EA,0x2924F83C,0x942E7A11,0xD83D7744,0x8B9939B0,0x588D84F7,0xE64727C7,0x3647AEC3,0x2776C2F8,0x67F49675,0xF9807A68,0xE4FA09B2,0x268859F5,0xB27AD89F,0x7EA7F1C8,0xFA1E62C3,0x161D5A92,0xC167D4B5,0xA2E76CFF,0xB8D74135,0xEA212C51,0xA4CCE21C,0x909FA2F4,0xB2CA63C6,0xE193513D,0x8C83D716,0x307FD122,0xE4A6482A,0xBB12C25F,0x57703D37,0xD170C5DC,0xA08D9D39,0x498048D2,0xBEE47DF2,0x6F64ACC6,0x869D7705,0xECE71947,0x0C69B270,0xBB2DCF12,0xCC014DF3,0x99BB6818,0xA1E8BCDD,0x9769AAD4,0x20261F94,0x6B7B0E73,0xCE859516,0xB9342F0E,0xC2580882,0x9E569895,0x123AD2E9,0x8C8DAB00,0x5D8096B8,0x49497892,0xA749A543,0x601F846D,0x87CD89BD,0xF6710D5D,0x564262DD,0xBC5EFC06,0x9F33D9BD,0xD8A0B04B,0xCE9ED672,0x038F1031,0x937A9769,0x3B9A9933,0xBD577935,0xB00B3DD9,0x249B3694,0x78F5561B,0xAC686335,0x77BF71C2,0x7895D054,0x3B0BC67A,0x068E0500,0xF90DAF1F,0x5F18011D,0x04A506D3,0xB9AFDE41,0xF5988991,0xA30A109D,0xA4B2D4AA,0xC5757A74,0x29410A27,0xCF63C1B5,0x810074CF,0xD5AFF6A4,0xC4036DB6,0xD4CD62CB,0x75895291,0xA3070D39,0x9C8F435C,0xE0A2C266,0xFB528501,0x1172C444,0x204F837C,0x6992E2FF,0x444EE28B,0x22A2FB6B,0x8193FE71,0xD0384314,0x6099CAAA,0x242CAC6F,0x74ABD5FD,0x87576A69,0xEBAF3543,0xC6774017,0xB7A1FF58,0x51660B62,0xF54876EE,0x54AF01FC,0x9024BBEA,0xE59A9283,0xC1BBC3E9,0x2CDE19E7,0x3F34FA57,0x5803AAAB,0x0DEE72B2,0x088FB8E0,0x920AED48,0xDE6D5C12,0xF8E9CC64,0xE9E96F15,0x3243B997,0xEACE8792,0x11885891,0x67F43C66,0x0DDBA9DC,0x067FD857,0xAFFE6145,0xC49EBB6F,0xDBE9D4F6,0xFCBE420B,0xB5D4D315,0xF5E2CA1D,0x519FA65D,0x71203ABA,0xBCD82A41,0x67B9C8FE,0xD8A45141,0xA2DAE155,0x71A61E80,0x169B234C,0xFA1E29F3,0x52D0678A,0x487B84BA,0xC6DBA09E,0xB8D66FBB,0x7B3C1311,0xC715192E,0xAB0E5F51,0xEE5C9E8F,0xB30D1027,0x99C4E677,0x942B9572,0x83EF9A6B,0x5009C784,0x975CF386,0x318D7637,0xAE863375,0x2E8E54DC,0xA2B83CA7,0xE49CBC2F,0xFD48AFDB,0xC3D1098A,0xDEFFD170,0xE981DD89,0xBC5996BF,0x60DD58CF,0xEE25C98B,0x49C1CDAD,0xA7015406,0xF001D816,0x0F496131,0xA7C7CEE2,0x45E969E4,0x4EBB9136,0x1F67F19A,0x2F40A941,0x4C401635,0xA927A664,0xB770F7BA,0xEAAD8BC9,0x2F77C897,0xCA3266CB,0x1334F8F6,0xBF07E327,0xEF3BCDDF,0x28552A3A,0xF763CD52,0x6C7AAE3A,0xE1AA0212,0x12FDD48A,0x3FEDDD60,0x44CAC283,0x4C0B0201,0x5385C92C,0xECF10DBE,0xB46F85EC,0xC09BAB13,0x533E7AE1,0x148CF63F,0xE8CF943C,0x563DCFB6,0x6A986B66,0xC3A4D29D,0x6CD59F88,0x37B2FAF1,0x0AB55AE3,0x7C0BA03C,0x82319C65,0x17F1F21B,0x2C1C9D28,0xD328B8F8,0xD1B2DBDD,0x2F4E1D61,0x06C1B96D,0xF68818A0,0xC16200C5,0xA5112046,0x197E8CCE,0xF6987B49,0xA9BD0D17,0x3CDFFF9B,0x881134C5,0x72C78104,0x4F183E25,0x1EB3ACF7,0x7C98E2E0,0x9E5ABE94,0xD560C6F2,0x40295F55,0x2192770D,0x1E0CF08E,0xF6573882,0xC64DB14D,0x4B7EC869,0xF3505E76,0x4CA181B9,0x898EE04C,0xD824C93B,0x36290B1A,0xE286C216,0x5B02D7A1,0xC02CF6E3,0xD4530317,0xCC53164A,0x34E675ED,0x6FCAED96,0x8A67A975,0xBDAF4717,0xA8F93449,0x4235FF4B,0xC29DD78E,0x8610B3CB,0xACF8776E,0xB687D264,0x82E7E54C,0x4EEC6388,0xF27BE203,0xB582549A,0x8AD3DE91,0x396A613A,0x061297CB,0xEB572AB5,0x59E95F0C,0xA078D9F0,0xFE2C6898,0x3069C372,0x2B771A79,0x18CF81AD,0xC6A4EB59,0x220CF0FD,0x2874EAEC,0x19901940,0x233ECE85,0x8767E85A,0xB96C8CC5,0xE2F671E1,0xAD10BA56,0x121683E9,0x2EEC5B39,0x4DA24E46,0xDE8A0C89,0x85DAC50A,0xBFF99161,0x8E819A59,0x2CD3C6DB,0xC29C433C,0xC7A248D6,0x39CD3A17,0x2F2BD674,0xE9D18818,0xC78AD6E5,0x0CF09C56,0xE7FEACEE,0x93966BCB,0x27AEA7D0,0xE6D09945,0x2958EC60,0xC5F0D1D2,0x27CA5B34,0x2004AF21,0xB1B8C43A,0x27CF1154,0x2A478BF3,0xB5C87DE9,0x0E801E4C,0x81C4EE13,0x1477B663,0x196E03DA,0x4A307C8E,0x1D1716A3,0x6E1721A5,0x12748F01,0xA595464C,0x30FB90B1,0xEE1F5394,0xE8E31388,0xBA5C7CC2,0x73A61A12,0xACCAA671,0xDBFED51F,0xC9E50EA5,0x36116C48,0xE56FB8F8,0xC2C28859,0xD937A224,0x8D4C1BEE,0x872FF12A,0x75A3E93A,0x4A938408,0x02B920AD,0xF6AD2DBF,0x1CDE092E,0x2C8373FA,0x22E6DE1E,0x062E8D5C,0x71413DA5,0xDD48957B,0xDEE89722,0xDABC0B01,0x464E22E3,0xA5CDF0BF,0xEAEA5879,0xED77CA5B,0x34FB1925,0xBB925A44,0xC2D54BF9,0xA00519DB,0xC68E4591,0xE08A7AF2,0x547931D5,0x403C42BD,0x7A25C4A7,0xC286D8D1,0xA6D06608,0x668E6890,0xB222A8DF,0x12DC7E06,0xB891BF5B,0x0AA145F1,0xADAEB915,0x3A58F9FC,0xF63154E1,0x8E08B6CC,0x5FE09D7C,0xCD659A12,0x939A3F09,0x86BE7AD5,0x344D5306,0x243F2E5E,0x970A797A,0x5B268A85,0xFE721D5B,0x9D447ADF,0x725080E7,0x49B88F79,0x5BB2476D,0x232BAE3B,0x4539B5B9,0x286DB664,0xC547DD9A,0x037F2DAF,0x6034122F,0x7F10AA8C,0x72CA123F,0x91909C4A,0x1025B4F6,0xDD88319D,0x5BDACB85,0xD3E1A945,0x2668AFB8,0xCA012B3B,0xCC3DB180,0x982951A2,0x87F8F376,0xD59C573C,0xD0262D59,0x8925E162,0x365A79F0,0x5030D5C3,0xC7854F19,0x964CEF5B,0x08BC0F1B,0x542A8F87,0xDCD29F6A,0x07289F6F,0x7138C31A,0x6D70EAEB,0x89BE30A6,0x3DFAAD20,0xED7366E0,0xF71DBEA8,0xB308E416,0x321307D1,0xB63FA54E,0xDBB8691C,0x2AD4B624,0xD0781D5A,0x6CF2118C,0xB3C56A6D,0x4C0F5544,0x303DAA72,0x3AE181A7,0x87BD643E}; + + + uint32_t mldsa_seed[] = {0xDFCC13CE,0xD6971EB1,0xBF3243CB,0x8EE883FE,0xA9677D1E,0x5DA8F304,0x6CFA4305,0xDFB79127}; + + + // uint32_t mldsa_sign_rnd[] = {0x00000000, + // 0x00000000, + // 0x00000000, + // 0x00000000, + // 0x00000000, + // 0x00000000, + // 0x00000000, + // 0x00000000}; //deterministic signature + + + // uint32_t mldsa_sign[] = {}; //last byte 00 + + + uint32_t mldsa_entropy[] = {0x3401CEFA, + 0xE20A7376, + 0x49073AC1, + 0xA351E329, + 0x26DB9ED0, + 0xDB6B1CFF, + 0xAB0493DA, + 0xAFB93DDD, + 0xD83EDEA2, + 0x8A803D0D, + 0x003B2633, + 0xB9D0F1BF, + 0x3401CEFA, + 0xE20A7376, + 0x49073AC1, + 0xA351E329}; + + uint32_t mldsa_privkey[] = {0x86EBA265,0xF989E450,0x0C8CB3E3,0x87CBE265,0x08A4032A,0xFB8E978D,0x80EDED75,0xAA4692D5,0x6BEFF71C,0x2EB55361,0x83747EED,0x21768A95,0xB3CD546B,0xAECDFD72,0x0956DF06,0x7C4F25B1,0xB01B94DA,0x624F662E,0xCA6B0B7F,0xB63829A8,0x5DC80197,0x6DCE9375,0xACBB1661,0x0E1F4C84,0x10072775,0xFCBEC4F0,0xB34F7E9A,0x81ADFFD2,0xB8BC2B65,0x1CAE1D07,0x9D43DF24,0x6462AD64,0x9BA26DD1,0x0051C824,0x2CC0B64C,0x1C4064A3,0x26654198,0x64131788,0x9C302AD1,0x16442418,0x72238348,0xC2B84C14,0x080C8920,0x65C42041,0x48044C10,0xC88D0930,0x901A2549,0x8C208154,0xB60C1B26,0x290BC590,0x98028A49,0x3684DB06,0x0C4CA668,0xC4C828CB,0x08850C44,0x51D2C62C,0x0CA620E2,0x804C6228,0x6CC2480C,0x93880840,0x36816296,0x4091020D,0x23C348DC,0x00525C46,0x6604B48C,0x00C844C2,0x32449C36,0x65910028,0x42960D20,0x214C0808,0x0143A671,0x0A9468C9,0x3892E008,0x65609871,0xA4C29050,0x46720BB4,0x48E4B470,0x232682DA,0x46652122,0x91194150,0x13490D19,0x434A04B8,0x050C020C,0xC8108698,0x060C4CC2,0x0C58422D,0x533830A2,0xC888E038,0x711AB941,0xDB242600,0x892C0005,0x24C11411,0xA3A87021,0x22241442,0x90C9A830,0x10046ED3,0xC00C2237,0x901C3169,0xC9802481,0xA0400A32,0x700B2580,0x1A254803,0x40689128,0x20D91291,0x02902CE2,0x186ED240,0x89084988,0x99C4404A,0x94202119,0x08238845,0x9A4020C1,0x10649044,0x609BA061,0x92406560,0xB2215032,0x4A91B48C,0x02B21000,0x0448E046,0x5210C344,0x909401E2,0x12400191,0x60C92084,0x09C66503,0x82888288,0x2C214751,0x60068C99,0xC200E024,0x6C93B051,0xA4229094,0x082E9216,0x6D81A008,0x10026411,0xA6491231,0x5062364D,0x60460219,0x41511889,0x44C4282A,0x40040280,0x1411D4B8,0x49C03049,0x5A00501C,0x80044428,0x12828460,0x614045D8,0xC4241338,0x06991686,0xA0A42D03,0x31855006,0x89C0A085,0x20492419,0x48001839,0x85D9C225,0x12A71019,0x1704D820,0x06D9408A,0xC1928910,0x170619B1,0x0150088E,0x9AC84980,0x36524B24,0x4D8A8221,0x11214022,0x82698102,0x51C92882,0x992268C8,0x80418394,0x2D081889,0x4C068A04,0x0662DB38,0x32DC3469,0x11C961E0,0x120E4016,0x4522A08D,0x82926004,0x2141A090,0x51182500,0xC1421053,0xA664E118,0x4C19A340,0x00222D48,0x22915AA0,0x284B2640,0x12C111E0,0x346D1B95,0x70103790,0x23C9850C,0x380DE428,0x30114226,0x14A6484A,0x3452E142,0x12820609,0x0C07820C,0xB1651345,0x6224878C,0x0993005B,0x966CCB34,0x48188000,0x03124A80,0x02300302,0x61989025,0x4C329023,0x85001A35,0x50083885,0x930472C4,0x288E10C9,0x00634204,0x604409C8,0x0226D244,0x2D600462,0x43988422,0x264422C4,0x9022B260,0x0CA84D4B,0x14510441,0x7061B610,0x99A468A1,0x440DE136,0x8A994486,0x401691D2,0x0281CA24,0x44201148,0x99268190,0x10281242,0x8D501651,0x19404060,0xB80C0243,0x4E0B3672,0xA04461E0,0x40491247,0x4211C024,0x04059243,0x94649932,0x82C1106D,0x01144A00,0x21851425,0x25224626,0xA0B888E3,0xC80DA028,0x08DC8481,0x00912C0B,0xB0290295,0x21193730,0x41B68CC9,0x28041119,0x5252146E,0x64204213,0x202DDBB4,0x09583405,0x52C82003,0xC80C5028,0x281C928D,0x0AA20510,0xB345D438,0x88928404,0x1A8649CA,0x16899018,0x08144712,0xA2243104,0xA6118214,0x68CC8220,0x9A04525C,0x38501CC3,0x6DE1C46D,0x11B16112,0x32094438,0x90E11250,0x1C37705A,0x4001D944,0x4809C071,0xD98088CC,0x141203C9,0x25534049,0x12C90084,0x188E83A0,0x219A9028,0x13394CCB,0xB0001A29,0x6E889471,0x8A166222,0x3221E1B2,0x85241741,0x2193711A,0x86448118,0x711CB40C,0xA1A0310B,0x03851415,0x4EE41684,0x61100009,0xB25012B9,0x4113C229,0x02448422,0x17411B44,0x0AD29230,0x61002A20,0xB390CA42,0x04001582,0xDB284D52,0x32246038,0x91132801,0xD3326C9B,0x182DCCB4,0x50E4C024,0x83121120,0x8384CA14,0x4D0C0741,0xC8962D9B,0xC631C012,0x10CA2041,0x0C442A1C,0x1126C928,0x46E3B66C,0x2021828B,0xA2912101,0x6440142E,0x1BA24C01,0x48001BC3,0x8C032726,0x1144260A,0x010A0330,0x46DBC849,0xE382810B,0x0370DC20,0x8C0A9740,0xD00028E0,0xC06D61B2,0x84431801,0x13B3690B,0x394E0016,0x60249425,0xA228251A,0x81314B26,0x850C3282,0x5A8260D0,0x160D0982,0x800B8708,0x21B94CA3,0x24600943,0x48C23662,0x48244C88,0x82115204,0x4E231404,0x0A353048,0xC6840B97,0x69803810,0x48088EC4,0x94646232,0x808C3451,0x4A1220D2,0x080C8338,0x4252262E,0x13C211DA,0x08648CC4,0x890C4746,0xD8C62512,0xC56D64C8,0x70CB4600,0x11B42053,0x98609294,0x488BC809,0xDA28848C,0xA2681989,0x044C4431,0x12B085E3,0x2680C234,0x509C484A,0x23258622,0x472953B8,0x8444A468,0xE1181103,0x2820D008,0x0D8AC484,0x138829E3,0x8410A498,0x490C1642,0x91C80522,0x85411A05,0x6118158E,0xD4A430D0,0x40112248,0x62A48684,0x60144EA0,0x004012B2,0x31A09480,0x2325125C,0x164CCA88,0x70043168,0xC4A6851A,0xB644D928,0x08A41462,0x13346A03,0x81089234,0x28224112,0x8192C623,0x8102623B,0x7DF4F576,0xA60F0705,0x211FF78F,0x5BA73A02,0x0C3B5D12,0x6AE4D98F,0xB954C361,0xC73C0DFD,0xB8B56A66,0x66BEB0E1,0x1EDD0336,0xDCA6E9A6,0x15259DCA,0xD0FD54B0,0x0385AF5E,0x6CF0835D,0x2C8A20AC,0x908793D6,0x5180777E,0x45CD2C33,0x97BF92CE,0x8B121C94,0xB3B4E410,0x816938B4,0x34553F46,0x4F6A3F8E,0xFCF18895,0x53160A4E,0x00BC90D7,0xE0B45571,0x7633936C,0x3EF7031E,0xEC468053,0xF036EF3F,0x1B3156FB,0xAED8E93B,0x62132BC5,0xC52D0478,0xA12ACD5E,0xD7FCD44B,0x088588F2,0x1A416B76,0xB3A1E05B,0x4BD04A2E,0xE2F210D8,0x12C67C46,0x38587EB6,0x14E7956C,0x3FEC3A12,0x8F41B034,0x27624C98,0xE2652CB3,0x7F6F6485,0xB776C958,0x7ECD1E24,0x520DE64B,0x2A9E925B,0x950F89ED,0x3FB37291,0xF520B96D,0x9AC760AB,0x59B9933E,0x48AA8521,0x06883D06,0x83DCE40C,0xBAA4EE8F,0x04ED06C2,0x0E6F1EB8,0xA71D8439,0x13BD8BA2,0x53524731,0xACB3761E,0x94DC2C99,0xAC1022F7,0x713C45D8,0x5A46E704,0x2B4699D2,0xCCD9E6C3,0x930EF996,0x0BECC2C8,0x8259C89C,0xBC9FBCA7,0x279575D6,0x5341DE40,0xCFB2DC3C,0xD80590D4,0x6C5641E5,0x9DF726E6,0x8FEA6D14,0x5D0E385B,0x4E03D98F,0xED14E85A,0x3ADC9A71,0xA4C0F385,0x2E160B19,0x48D4FE1A,0x2F77F417,0xC7DAA829,0x077B94BD,0x8B9FE469,0x5B063279,0xE0844556,0x6A2E6C88,0x716058A1,0x2D0DA5D0,0xE619300C,0x692B9F16,0x22DB0838,0x5E745FDA,0x142B21D7,0x3BA3FC12,0xCD8D8E64,0x4B062DDC,0xA0158659,0x7F2EAE88,0xFB44F00C,0x594987D1,0x2AD94A6F,0xC54736C5,0xFC582796,0xF8F7E036,0x21EE0A2C,0x686F804B,0xBA9C55A1,0xAB856761,0x683289AA,0xAE5220FC,0xE946F7C3,0x3F75898F,0x01813DD1,0xB96290B2,0xA0D6E841,0xA375A7CD,0x81611514,0x7D729883,0x731A9B84,0xB55EE22F,0x6D7CA10D,0xA8CEB75C,0x6D14C09C,0x16C6C08E,0x530FB5C0,0x2AE2872B,0xD176FF90,0xE7F72398,0x36A74099,0x737AC774,0xC724ED44,0x5016827B,0x6A7EF68C,0xC805B0A6,0xF42EBA2F,0xF2D2B6A4,0xFA44678D,0x9D2187C3,0x94A479CA,0x5B36011F,0x434A2FD1,0xA59B06ED,0xA840F558,0x943D90E7,0x27268448,0xEAB60153,0x8E1D57BF,0x18AE50A3,0xA63D5105,0xC4814FEA,0x4F65C5A2,0xBD5007B5,0xA45995A7,0x62757B0B,0x7EE04372,0x6881DBCA,0x26CA0657,0x8B2E3DC0,0x6DE18815,0x3FEB80F0,0xE798C34C,0xF2E6230D,0xB50072DB,0xBE055EF4,0xCB8F8E89,0xF83FCC11,0x9138C531,0xBB24F490,0xC90DA49C,0xF5CEBA38,0x3E507350,0x2DA63E0E,0xB6C07E61,0x1645EDD9,0xBE7A8101,0xC439A877,0xAE846544,0x5F17E0E6,0x65DC2E03,0xA0459B67,0x594DE4A2,0xB4FB4846,0x16FD9DB0,0xA5B593A5,0x0C4BDE32,0x36E10D35,0x3D394C36,0x811688BF,0x41FA2822,0x6045B8CC,0xC6E4D0F6,0x81B749FE,0x0340D0AB,0x52CF7843,0x83BE321A,0x258048DE,0x6971549B,0x6549620E,0x6A7B71D9,0x69E638AB,0xF3A5E40C,0xD19CCA73,0x32B941D5,0x4661BF26,0x8C7799C3,0x7B32C639,0xCD3C5B1C,0xD2FE73B0,0x42823379,0x45FEC513,0x1FB8990B,0x52EFEA62,0xDC02E340,0x8174B759,0xE1DECF8A,0x19398875,0xE4DBC73B,0xAD436978,0x3FFED5B7,0xCE954ADB,0x3AED6D3D,0xAA997463,0x86EA5141,0x1EDE7D72,0x8CFF25BB,0x33983950,0xDD212D59,0x2C5C3E3F,0xAE90E011,0x5DB93511,0x85065723,0xCFA42EFE,0x64242D10,0x5FAC5040,0x3DC35018,0xE2E7BFAB,0xC7F868E4,0xC7D34424,0xBF42B14E,0x42EE84CA,0x911F5F3D,0x466EC727,0xD472BDC1,0xD84BE1C7,0xA4460A36,0x966CCD8F,0xEEC52AB5,0x51566AAD,0x0F2C1B24,0xAE259CD6,0x55B0AFBB,0x2CC4BE38,0x704499F9,0xFEFFDE6A,0xACFDC54F,0x5FCD5123,0x361C9C01,0xC7BA5B52,0xC128D6C3,0xD596736C,0xCC82E09C,0xF7EB8FA0,0x6510E038,0xADB0F6C0,0x0234C301,0x4C5D10DB,0x6519EEC9,0x5DD9D192,0x00930D9E,0x5EC24F06,0xD206399E,0x492C10CA,0x910A4A0C,0xFAB970BD,0x1BE66E2C,0x1D9B705A,0x1B7E3C01,0xC443E54E,0x0F10D9F8,0x90EF21C5,0x43138EA6,0x49759EAC,0x899A32A3,0xFAE1BCCA,0x5F7522EB,0x4D524C13,0xAB36AE5E,0xF2FAFE33,0x545674CA,0x0F70573F,0xB0D674B1,0x4CA0CB87,0x3C338385,0x58B70006,0x92B288D7,0x0C09E3AD,0x9E514D95,0xB970911E,0x2CC3C9A8,0x5179C2A3,0x9B858664,0x0CF6F34D,0x203DE9C1,0x0829DBE1,0xBCCB34CF,0x9C83D734,0x4A73305D,0xD9292CBF,0x0160CA13,0x9FE5419C,0xC012E69B,0x741DCF35,0xA3DE0882,0x2D27B968,0x0C7E63F4,0xFA0B824A,0x7259E932,0xBA573E17,0x2C81B46D,0xC710B1F8,0x161EC2D2,0xB880D174,0x8B5F08FF,0x52FA8D6C,0x94539A15,0xEE5024E1,0x4712AE62,0xB196675C,0x7FB17C78,0x02FB68F4,0xC3C7888F,0x9CE863EB,0x82C3B9A8,0x40A9E1FE,0x8BA0A440,0x644A9262,0xE7F92458,0x0F059EC0,0xDD2CF948,0xF4D77DC7,0x6FA360F6,0xCBD022CE,0x3502765A,0xF333D79A,0x4C2257AE,0xCB069116,0xCE1DB696,0x3A11401E,0x93EEB8C5,0x4B03FECB,0xFCC8C68B,0x8E1C049B,0x6D348FCB,0xF52BA7FF,0xB264C5EA,0xD3D15D95,0xEEE901DA,0x2FB401FA,0x0BFA8691,0xB004A411,0xD2925E47,0x9A05973B,0x090AC060,0xFCAC093A,0xE9C42DB1,0x04420AAB,0x012B55D5,0xC67D26DB,0xC5B8ABC6,0x5A189D4E,0x7BB40DA1,0x2C121FC1,0x66BB1D73,0xBC6625E8,0x7D42F8D6,0x33EF76F4,0x3E1F0BE4,0xC6211C19,0x22CED066,0x85E89535,0x3FE67CD7,0x0219AC3B,0xACD6EAD3,0xC54B9298,0x5E5A12A8,0x05EB8FCD,0xF31BDC1F,0xED3C730D,0x3D9D62C2,0x2E8F24A9,0xD73D5895,0xD92DB38D,0x783F8EB7,0x36D80911,0x7B45C35E,0xE8F40056,0xD6906371,0x73785D1E,0x14E0EA90,0xFFA8C978,0x64B63232,0xD2AAED14,0xC2415A00,0xF84D954A,0xF103014F,0x676ADD18,0x17AB83B8,0x51CC0163,0x11BF3133,0x3915ABBB,0xD7EFD264,0xCCF472FD,0x99E86D53,0x5E149788,0x5774D17F,0x07D19E0C,0xFDB00F7A,0x6682E511,0x052BE0BC,0x1846D8DA,0xB4789770,0x34D0CBC1,0xDFC72FD7,0xF68AB51C,0x824FC881,0x15DAAE9E,0x203D5033,0x294156FB,0xFB6E0F40,0x0B7B8F08,0x61DAF592,0xD4936C48,0x3D5DBDC9,0x8B7A576C,0xC9D26E54,0xEAC4CF24,0xFF91797D,0x48AA1374,0x772D7F0B,0x9EC4AF5A,0x76E231E2,0xE847B7D9,0x1F8A6D89,0xA78EB1F7,0xA039C3F3,0xE5C3714F,0x2C622123,0x82806D78,0x424223B8,0x4615ED36,0x1C49AFDC,0xBB922435,0x55B0D777,0xDFB8F000,0x05232FA8,0xC97916ED,0xAD87AEB4,0x66EBCDA6,0x150F0ACA,0x969B2D21,0xC2E5FE2D,0x7C4177E6,0x22FEBCE6,0xAACE0842,0x386D29A1,0x7FAB242B,0x3F926BD8,0x700340CA,0x7B4B5383,0x200DE7C9,0x3A701CA2,0x2B9412AC,0x2F1C2139,0xB9D332FD,0x585B8E6B,0x1E072109,0x0F64BF87,0x1A2D0C0B,0x5E0A0391,0xE2A0D1A9,0xE9103BD0,0x8DE12749,0xA6F6FF03,0xD2597B1F,0x3BF33819,0xF9AB2EF8,0x3B092744,0x5BD727F1,0x61279C6C,0x2DD2B68C,0x229BF233,0xF8BCCDB4,0xA61D866F,0x2D4F7054,0x39F990A3,0x2A0BCE93,0x360E7981,0x29D95F28,0x4B942ABD,0x702081AB,0x6D1813FB,0xD52B58A4,0x21E96FC0,0xA715EF13,0x4CB1297E,0x2AB3C91E,0x581E3CF9,0x72234814,0x75D955DA,0xBF2D0B8B,0xB5F134EC,0x14D84F10,0x2C9C57CA,0x4B90589C,0x1C525054,0x4C760EC6,0xCE839AA8,0x5BC0681D,0x744F716A,0x0E08DA4C,0x2201D3C7,0xEC51492A,0x0516C9CC,0xA8F912B0,0x3CF60AEB,0x07F4ADFC,0xA22C43F2,0x34897A8F,0x518271DA,0x5AE07A8B,0xC6CDA35A,0x5A58FC99,0x1CCA18E5,0x9E4CDD1F,0x15251823,0x961E38A4,0x9815FE8C,0x766B705D,0xB01A92C7,0xA13B7F68,0xCE43F21F,0x692EC29C,0xD085E70C,0xFF19C6CA,0xE0D08B30,0xA1558550,0x24BFC9D9,0x5C87A016,0x66EAA449,0x86ABCF2F,0x9E146CE2,0x6D2C12BC,0x816934D1,0x79D0FD0C,0xC1E11B5B,0xBCC03E56,0xEB056B61,0x96D4700C,0x77475267,0x4861A402,0xC1A94A00,0x32C5642C,0x68ABE913,0xBDE12AAC,0x92D335AC,0x19326389,0xCEC3C5BA,0xD1735C01,0x20B7EE10,0xA0E34AF4,0x50A66385,0x6D5931F9,0x195B5204,0xCF22A426,0xBD28A6E3,0x1234227F,0x033F311B,0xF0A826B7,0xB4F6E216,0xB63B3B18,0x4466AFFD,0xE10DA3FD,0x8EAAE99C,0xF91BA078,0x532A1ABD,0x8680B50A,0x5F4516E3,0xDEF7CC3A,0xD7BDAADF,0x662EE3EE,0xAF05F918,0xA598F979,0xA9512EB6,0x4BF3781D,0xF8CD9884,0x03FF0570,0xF21A6E09,0x484950F6,0xCEFA7AFA,0xE4142058,0xB39D715E,0x0E4F620E,0x026D187C,0x5A3D8C05,0xEA644F15,0x5AF31D6F,0xDEB43134,0x10AC7548,0xC88B8CD9,0x274D2B19,0x0F1B2ECC,0xCBBD7DAC,0x21C64703,0x8D2948DF,0x2DC80AEA,0x5E5923EB,0xE72D9C72,0x6E6DE0A2,0x66A8E6B9,0xAAC80E50,0xC7D9AEF2,0xE2E39192,0x41A82739,0xDDCD2CA4,0xAFCF501E,0x3500FD2E,0xC421D9AE,0xC0FB7A31,0x1ADAB51E,0x21393379,0x1EA6F055,0x7878056A,0xE3AE35FC,0x18428ADA,0x90B518F7,0x665F4E89,0x6EB78247,0xB580DB4F,0x2AA5FEF1,0x483155E0,0x8683B90D,0x8331EE81,0x18FB4EC7,0x38A19243,0xCFA72940,0xFF692E73,0x6D0B5AE1,0x11350775,0xF57A60CE,0x87CBF19C,0xC5677B1A,0x3BE9E780,0xD15E1D09,0x160C4720,0x713A4F74,0xA362C99C,0x85697586,0x382BC544,0x61B120D1,0x7977A09C,0xE326803E,0x055B1AA4,0xFDD4BEE7,0xCEC045BA,0x9138A30E,0x9B47DBED,0x84040E98,0x3CA09315,0x9E1F3B58,0xAD2E60E6,0x664C801D,0xD79A8C8E,0x766F6FE7,0x9D72547B,0xE2895C40,0xA469C47E,0x8AD31CF8,0xF5BB5E79,0x54383094,0x2289A5C0,0x99E89B2C,0x723D8A72,0xB2133C87,0xA25F6257,0xCA5E706E,0xF1E46EA5,0x9EB42EEB,0x9CD3D9AA,0x7A20D093,0x6F0EB8D4,0xF8E51663,0x434D8DAA,0x10B59346,0x38E49BF0,0xB8208B79,0x24BBF61A,0x1AE8282A,0xB13BFBC1,0xA8F2DBC0,0x03B48F8A,0x20EDEC06,0xCE9914CE,0x4EB1A5B9,0x16A36337,0xE71C30AE,0xD4969987,0xC3F56BF8,0x6F09E735,0x3E194602,0x161CC417,0x05301E7C,0xBC384EA3,0xA15FAE91,0xA17ED8E1,0xB98AAA66,0x69D32368,0x85CC239F,0x69DA39C2,0xA7B35860,0x5FC2111E,0x4B90C967,0x4DDF9434,0x832E0EE9,0x7171B78A,0x2226C609,0x9C0F5AE1,0xF6E2A74B,0x66F52EFA,0x4C2CF3D0,0xFF7B24DA,0xDA3A6279,0x0325C96B,0x990DFADF,0xD2AED3AB,0x5535413C,0x221D0C58,0x4A6D586B,0xFDF0E13A,0xCAB23EB2,0x108D996E,0xA4DD7E51,0x0C307040,0xAF311037,0x0D38CC72,0xB91B72CA,0xC1AE463F,0x6BF174EE,0x189CC125,0xC9FABB1C,0x59051DB1,0xAD6443D9,0x3A8F83FD,0x9E9C39A6,0x9C2D48A1,0x70BA0F23,0x36C48D65,0x3A06BE31,0x64636DDE,0x839BBFD2,0xAC9566F7,0x50B527CD,0x911A17EA,0xB10FAC46,0x0926DD0D,0x49871E07,0x0BB84413,0xA200C8EA,0xD2E1C2F8,0x642114EA,0x9688540C,0x57559DC1,0xD3D32598,0x8E1C34E0,0xD48F9E05,0xF731C910,0x4E83F396,0x09293AA7,0x60A8D877,0x856B68A0,0x8E99E6F5,0xD31A4C19,0xFB2C16B1,0x415D1F6E,0xD290C6C3,0x889196AC,0xB26018A6,0x8DE48316,0xEDAD2FFD,0xB783D874,0x75EF0B3D,0x23E91DC3,0xCEB668BF,0x71DC8616,0xB32B7A30,0x8DAF553A,0xC6C0B4BF,0xAD25AB48,0x166EA09D,0x4BC36BDA,0x8E34FF74,0x9A30278B,0xF0479FBC,0xCBC84DC6,0xFF077D77,0x76E4EB54,0xF3A67D7C,0xCAE3AA19,0xC149B336,0x58BB4075,0x14852296,0x09E21E21,0xBA6F0403,0xE4AA5377}; + //Call interrupt init + init_interrupts(); + + uint32_t seed[8], sign_rnd[8], entropy[16], privkey[1224], pubkey[648], msg[16], sign[1157], verifyres[16]; + + + for (int i = 0; i < 8; i++) + seed[7-i] = ((mldsa_seed[i]<<24) & 0xff000000) | + ((mldsa_seed[i]<< 8) & 0x00ff0000) | + ((mldsa_seed[i]>> 8) & 0x0000ff00) | + ((mldsa_seed[i]>>24) & 0x000000ff); //mldsa_seed[i]; + + // for (int i = 0; i < 8; i++) + // sign_rnd[7-i] = mldsa_sign_rnd[i]; //TODO: add byte swap - not doing now to save sim time + + for (int i = 0; i < 16; i++) { + entropy[15-i] = ((mldsa_entropy[i]<<24) & 0xff000000) | + ((mldsa_entropy[i]<< 8) & 0x00ff0000) | + ((mldsa_entropy[i]>> 8) & 0x0000ff00) | + ((mldsa_entropy[i]>>24) & 0x000000ff); + } + + // for (int i = 0; i < 16; i++) { + // msg[15-i] = ((mldsa_msg[i]<<24) & 0xff000000) | + // ((mldsa_msg[i]<< 8) & 0x00ff0000) | + // ((mldsa_msg[i]>> 8) & 0x0000ff00) | + // ((mldsa_msg[i]>>24) & 0x000000ff); + // } + + for (int i = 0; i < 1224; i++){ + privkey[1223-i] = ((mldsa_privkey[i]<<24) & 0xff000000) | + ((mldsa_privkey[i]<< 8) & 0x00ff0000) | + ((mldsa_privkey[i]>> 8) & 0x0000ff00) | + ((mldsa_privkey[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 648; i++) { + pubkey[647-i] = ((mldsa_pubkey[i]<<24) & 0xff000000) | + ((mldsa_pubkey[i]<< 8) & 0x00ff0000) | + ((mldsa_pubkey[i]>> 8) & 0x0000ff00) | + ((mldsa_pubkey[i]>>24) & 0x000000ff); + } + + // for (int i = 0; i < 1157; i++) { + // sign[1156-i] = ((mldsa_sign[i]<<24) & 0xff000000) | + // ((mldsa_sign[i]<< 8) & 0x00ff0000) | + // ((mldsa_sign[i]>> 8) & 0x0000ff00) | + // ((mldsa_sign[i]>>24) & 0x000000ff); + // } + + // for (int i = 0; i < 16; i++) { + // verifyres[15-i] = ((mldsa_verifyres[i]<<24) & 0xff000000) | + // ((mldsa_verifyres[i]<< 8) & 0x00ff0000) | + // ((mldsa_verifyres[i]>> 8) & 0x0000ff00) | + // ((mldsa_verifyres[i]>>24) & 0x000000ff); + // } + + mldsa_keygen_flow(seed, sign_rnd, entropy, privkey, pubkey); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + // mldsa_signing_flow(privkey, msg, entropy, sign); + // mldsa_zeroize(); + // cptra_intr_rcv.mldsa_notif = 0; + + // mldsa_verifying_flow(msg, pubkey, sign, verifyres); + // mldsa_zeroize(); + // cptra_intr_rcv.mldsa_notif = 0; + + printf("%c",0xff); //End the test + +} + + diff --git a/src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.yml b/src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.yml new file mode 100644 index 000000000..c3b29c94a --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa_kat/smoke_test_mldsa_kat.yml @@ -0,0 +1,3 @@ +--- +seed: 1 +testname: smoke_test_mldsa_kat \ No newline at end of file diff --git a/src/integration/test_suites/smoke_test_mldsa_rand/caliptra_isr.h b/src/integration/test_suites/smoke_test_mldsa_rand/caliptra_isr.h new file mode 100644 index 000000000..5aed80789 --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa_rand/caliptra_isr.h @@ -0,0 +1,265 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// --------------------------------------------------------------------- +// File: caliptra_isr.h +// Description: +// Provides function declarations for use by external test files, so +// that the ISR functionality may behave like a library. +// TODO: +// This header file includes inline function definitions for event and +// test specific interrupt service behavior, so it should be copied and +// modified for each test. +// --------------------------------------------------------------------- + +#ifndef CALIPTRA_ISR_H + #define CALIPTRA_ISR_H + +#define EN_ISR_PRINTS 1 + +#include "caliptra_defines.h" +#include +#include "printf.h" + +/* --------------- symbols/typedefs --------------- */ +typedef struct { + uint32_t doe_error; + uint32_t doe_notif; + uint32_t ecc_error; + uint32_t ecc_notif; + uint32_t hmac_error; + uint32_t hmac_notif; + uint32_t kv_error; + uint32_t kv_notif; + uint32_t sha512_error; + uint32_t sha512_notif; + uint32_t sha256_error; + uint32_t sha256_notif; + uint32_t qspi_error; + uint32_t qspi_notif; + uint32_t uart_error; + uint32_t uart_notif; + uint32_t i3c_error; + uint32_t i3c_notif; + uint32_t soc_ifc_error; + uint32_t soc_ifc_notif; + uint32_t sha512_acc_error; + uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; +} caliptra_intr_received_s; //TODO: add mldsa intr +extern volatile caliptra_intr_received_s cptra_intr_rcv; + +////////////////////////////////////////////////////////////////////////////// +// Function Declarations +// + +// Performs all the CSR setup to configure and enable vectored external interrupts +void init_interrupts(void); + +// These inline functions are used to insert event-specific functionality into the +// otherwise generic ISR that gets laid down by the parameterized macro "nonstd_veer_isr" +inline void service_doe_error_intr() {return;} +inline void service_doe_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.doe_notif |= DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad doe_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_ecc_error_intr() {return;} +inline void service_ecc_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad ecc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_hmac_error_intr() {return;} +inline void service_hmac_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.hmac_notif |= HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad hmac_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_kv_error_intr() {return;} +inline void service_kv_notif_intr() {return;} +inline void service_sha512_error_intr() {return;} +inline void service_sha512_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha512_notif |= SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha512_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_sha256_error_intr() {return;} +inline void service_sha256_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha256_notif |= SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha256_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_qspi_error_intr() {return;} +inline void service_qspi_notif_intr() {return;} +inline void service_uart_error_intr() {return;} +inline void service_uart_notif_intr() {return;} +inline void service_i3c_error_intr() {return;} +inline void service_i3c_notif_intr() {return;} + +inline void service_soc_ifc_error_intr() { + uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK; + cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad soc_ifc_error_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_soc_ifc_notif_intr () { + uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK; + } + if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK) { + *reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK; + cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad soc_ifc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_sha512_acc_error_intr() {return;} +inline void service_sha512_acc_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.sha512_acc_notif |= SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad sha512_acc_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} + + +#endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.c b/src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.c new file mode 100644 index 000000000..73db82e51 --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.c @@ -0,0 +1,3243 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + +#include "caliptra_defines.h" +#include "caliptra_isr.h" +#include "riscv_hw_if.h" +#include "riscv-csr.h" +#include "printf.h" +#include "mldsa.h" + +volatile char* stdout = (char *)STDOUT; +volatile uint32_t intr_count = 0; +#ifdef CPT_VERBOSITY + enum printf_verbosity verbosity_g = CPT_VERBOSITY; +#else + enum printf_verbosity verbosity_g = LOW; +#endif + +volatile caliptra_intr_received_s cptra_intr_rcv = { + .doe_error = 0, + .doe_notif = 0, + .ecc_error = 0, + .ecc_notif = 0, + .hmac_error = 0, + .hmac_notif = 0, + .kv_error = 0, + .kv_notif = 0, + .sha512_error = 0, + .sha512_notif = 0, + .sha256_error = 0, + .sha256_notif = 0, + .qspi_error = 0, + .qspi_notif = 0, + .uart_error = 0, + .uart_notif = 0, + .i3c_error = 0, + .i3c_notif = 0, + .soc_ifc_error = 0, + .soc_ifc_notif = 0, + .sha512_acc_error = 0, + .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 +}; + + +void main() { + printf("----------------------------------\n"); + printf(" Running MLDSA Smoke Test !!\n"); + printf("----------------------------------\n"); + + uint32_t mldsa_msg[] = {0xafbdf91c, +0x942b5eb7, +0x3b7cc474, +0xe53c0521, +0x3fa41e7a, +0x2a826c58, +0x812f3065, +0xe7a289a6, +0xbee9169d, +0x145d9c81, +0xfbab6bbf, +0x7cb65e26, +0xd31d734e, +0x755d7aba, +0xb5db81ed, +0x9290fb80}; + + + +uint32_t mldsa_privkey[] = {0x75A8F4C9, +0x56C0D7DA, +0x6C7FE78F, +0xB03E722E, +0xD1FC4F2A, +0x5E244960, +0x0E616F61, +0x995A4A88, +0x6CC78EC2, +0x951CB85C, +0xEA8AD554, +0xF2BD8E5F, +0x41711246, +0x91225DB8, +0x3ACBA371, +0x8A8D7A58, +0xB3350F28, +0x761D9044, +0x8D83F17D, +0x0DD25DB8, +0xE6C97CC0, +0x7F7BED1E, +0xB59DFCAF, +0x2D7FC3C2, +0xBB2F81C8, +0xDF94AF42, +0x27242980, +0xE27B71F5, +0x373E3E1F, +0x51B55491, +0x477F2839, +0x27792DCA, +0x54268CCC, +0x32469996, +0x50CA0084, +0x002651C9, +0x18110BB1, +0x91034986, +0x59220844, +0x2050DC00, +0x5121B504, +0x9030650C, +0x4068D3A4, +0x1101060E, +0x62A83152, +0xC8051C08, +0x88D0282C, +0x49C80D13, +0xA940CA24, +0x4682A220, +0x23A77098, +0x8620D224, +0x418A3872, +0x09A22962, +0x284199A0, +0x111B3209, +0x9A86511A, +0x89400125, +0x9193A60D, +0xE3244D01, +0x306E9916, +0x6604C465, +0xA4C06801, +0xC0116292, +0x4522A511, +0x5A180600, +0x218E5A06, +0x255CA611, +0x63A48DE2, +0x362583C4, +0x4121154A, +0x9CA28901, +0x23885812, +0x918BA024, +0x42184ECC, +0x447064B2, +0x25C28604, +0x2243095A, +0x0049E204, +0x4C99A250, +0x50B44863, +0x148A81C6, +0x2D441401, +0xE2A48D1B, +0x258421B0, +0x11840605, +0x5396518C, +0x18600CA6, +0x44142512, +0x5B460893, +0x2886CB36, +0x805C9001, +0xE2B22998, +0x480604C7, +0x45139524, +0x4B284CA2, +0x148684B2, +0x31A2808D, +0x59B2010B, +0x02451091, +0x50C28609, +0x98324810, +0x97290CA4, +0x2592A665, +0x09864DD3, +0x34248C36, +0x21DB3406, +0x4B96408A, +0x146650C4, +0x0022094E, +0xDC964981, +0xA221D942, +0x450BA865, +0x62088DD2, +0x24060B16, +0x8DE31661, +0x9098300A, +0x0291CB26, +0x6A992881, +0x4AB688E2, +0xC851E2A8, +0x85543442, +0x40A6705B, +0xB8082118, +0x8401842D, +0x14084DA1, +0xA0204908, +0x09C82252, +0x6296088C, +0x92482289, +0x4DE24491, +0x12322A1C, +0x80609200, +0x89DC322A, +0xD1164198, +0x0680DB24, +0x05131609, +0xD4B88C89, +0x98112480, +0x65544830, +0x10244ED0, +0x12512303, +0x529A4666, +0x04445151, +0xB0850B47, +0x26D8940D, +0x543802DA, +0x08004B46, +0x32208785, +0x63B851DC, +0x30096432, +0x51549205, +0x9242101C, +0x1228C940, +0x6E98868D, +0x1B978C61, +0x064A4040, +0x4E99120E, +0x59066181, +0xC68D42C2, +0x04099411, +0x10868D58, +0xA4714AC6, +0x61810051, +0x13A791D8, +0x04261C11, +0x50E4900C, +0x93880991, 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+0x4E4A9FEE, +0x366F81B8, +0xE94B9764, +0x1A80380F, +0x2BFBAE1D, +0x9B3E441C, +0x8FBB5E9D, +0x17C36281, +0xB6E7357B, +0x1475FB07, +0xCFE27444, +0x89B4005D, +0x36D68B05, +0x3AE414A3, +0xABAFDABF, +0x6FBEFBA8, +0x698D202A, +0x3419EB54, +0x93DBDB1D, +0x3AA8E3D1, +0x5B5F00C4, +0xD63DACB7, +0xC12EB59D, +0xCA01B758, +0x75F39F4E, +0xC58D4D06, +0x38CC4BF8, +0x0B095023, +0x7C059C4D, +0x94269FFA, +0x0A6BEC85, +0x0FDE9CE9, +0xA602F3A7, +0xAA920062, +0x88D26D7E, +0x46D5283F, +0x2A1ECAA3, +0x9D96F234, +0x1A764985, +0xEC2E77BB, +0x2ACE8ECF, +0xEA13056C, +0x4FB82CC7, +0xCAF73AEB, +0xED283CB0, +0x9325DEEF, +0x5CD31C16, +0x718FAD00, +0xC30582DA, +0xC8DA374C, +0xE8F3522E, +0xA2751B28, +0x0B510445, +0x6E15B45F, +0x453FC276, +0x25BDE9D4, +0x2FF360C6, +0x8C6C469C, +0x75EE9F2F, +0x33790891, +0xB57444C2, +0x7C04030E, +0x8A9AFAB3, +0x4ACB6765, +0x9C1680F4, +0x2B5542A9, +0x9E7F174C, +0xD0B0449C, +0x18962466, +0x32A547F2, +0x2DAA7675, +0xEF737436, +0xDC13ABAD, +0xF2D318A9, +0x23BE7233, +0xAFC1C12B, +0xE2B68D6B, +0x07F394AC, +0xF9F1C21E, +0x5DED418E, +0x01EC49E4, +0x1332E9CF, +0x181224B1, +0x7CA718C5, +0x92271AF1, +0x8E76C50C, +0xD2231777, +0xC196A3C0, +0x0A9457E5, +0x3799AD6E, +0xA5B2F07E, +0x91CEAB58, +0x750FEB32, +0x5DA820CE, +0xE2882685, +0x35D0A9DA, +0x8762C754, +0xCF5E23E7, +0x239C5CDB, +0x8F9B7E95, +0x4D43C8D2, +0x3986E19C, +0x3F19F7DB, +0xB8208A3B, +0x7FAE5E3A, +0x4B36BD49, +0x9E847243, +0x45246038, +0x447BAA41, +0xFCC6727D, +0xF8CB273A, +0x98E5AA23, +0xB47FC976, +0xDDA9E361, +0xE58E332B, +0x96DAC60B, +0x54D8F6CF, +0x1DB959D0, +0xC32685BC, +0xA75C66D7, +0x46DDD40C, +0xAADCC15B, +0xCA8F1AA8, +0x654088BC, +0xBBB8B2A0, +0x9333D0C8, +0x2D11F813, +0x3DE13404, +0x6EAB0404, +0x73F1A98F, +0xB11E5DBA, +0x50F09FA7}; + + + uint32_t mldsa_seed[] = {0x0a004093, +0x27d15f67, +0x121d0737, +0xd5e4ce3f, +0x28fe43a2, +0xd4f06807, +0x858a7646, +0x9cf85c2d}; + + + uint32_t mldsa_sign_rnd[] = {0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000}; //deterministic signature + + + uint32_t mldsa_sign[] = {0x89E8DA09, +0xEDD3600C, +0x15A06D5B, +0x5CBCA92C, +0xADF08F43, +0x13D0C0E2, +0xB23E24B3, +0x29EEBD1D, +0x81DE6DEA, +0xE3F36797, +0xA494BA21, +0x21E0A274, +0xC3988770, +0x902E2CB3, +0x25B79FD1, +0xC6ED2197, +0xA6386D50, +0x174548C5, +0xEAC449A1, +0x166F864D, +0xCC6A72C6, +0x9CE883B7, +0x83496A8F, +0xB7D7CAC3, +0x11499633, +0x7082E3D4, +0x5913F541, +0x51184FAF, +0x4CC4A45E, +0x71055E82, +0xE1F07279, +0x006278D0, +0x0F427C13, +0x85800609, +0x418D46A6, +0xAC9EFC88, +0xE65C6532, +0xF2951B4C, +0x54A3EBAC, +0x4ABD047E, +0x9DBAD4AC, +0xBF9F1B67, +0xF53CDAE7, +0xC95D59CD, +0xE964C7F1, +0x644B2F2A, +0x2F2F3E1F, +0x8AEAEFE0, +0xFE7F6BF6, +0x20E04ECF, +0xD0C6409F, +0xABFC7105, +0x5B31BFC1, +0x24441C38, +0x8DF7B277, +0xDFF16EAA, +0xAD598580, +0x7DA36100, +0x7E316364, +0x6F44541A, +0x623271B2, +0x4ADB351C, +0xF68BAC7E, +0xBECF63B6, +0xC0ADDCF8, +0x0EE0440B, +0xD7946E95, +0xF188C2DE, +0xC36D3295, +0x24DC1B46, +0x738FB3FF, +0x0DA06FD3, +0x94424842, +0x2394569D, +0x3CFA33E6, +0x5CAB3E8C, +0x61DA6256, +0xDD396995, +0xBDEB151A, +0x5B7CDF42, +0x9914F35F, +0xFA6B7968, +0x07D70426, +0x715AF96B, +0x379DAE93, +0x0D51A071, +0x7817CBDA, +0x0EF43F0E, +0xA2BEDE04, +0xD9FD2C72, +0x870F2B81, +0x2818333C, +0x5EA491C3, +0x44F4D359, +0xEFFC9198, +0x4809A74E, +0x431DFEB0, +0x5EFA1BA6, +0x6924E4DE, +0xBA91E970, +0xA3ACBB2B, +0x34E27209, +0x2E18C4FF, +0x4CCB7302, +0xC0067CE9, +0x23C68C23, +0x3AAE99B7, +0x090B7038, +0xCEFA82AB, +0x19A34B94, +0xD21FC70A, +0x8AEDBF26, +0xC8F2A4A4, +0xB74126E3, +0xA5E48857, +0x9D639ED3, +0x881308E2, +0x5143C2DA, +0x100395CC, +0x9F34CBFB, +0xE6770AE3, +0xD48C52AA, +0x2B9E1E1F, +0xAE2F6518, +0xE1BA8FEE, +0x95A029F7, +0x2385FCBF, +0x1E1FE3E3, +0xAC96EDAF, +0x34510448, +0x0F4CB407, +0x241B52AD, +0x07D896F7, +0x3A12DD51, +0x23402E7F, +0x7D3E1B63, +0x63003B23, +0x88A35170, +0x7836936A, +0x99FC26E5, +0x616583C1, +0x01AB886C, +0x4A4B5191, +0x45509DED, +0xFD6C0BB3, +0x764B0BB3, +0xDF86DBF8, +0x7437232C, +0x63881A74, +0x111058A5, +0xA415CB07, +0x08A20DC1, +0x80391813, +0xD77D9F9F, +0x6E4ECB51, +0x771C101B, +0x2BE44701, +0x676D492E, +0x5318E995, +0xE6A89046, +0x57958A8A, +0xD1B11D6D, +0xEBA66DBD, +0x20D2884E, +0x23818609, +0x571EE590, +0x8698123B, +0x2043D813, +0xF1C61C6C, +0x758CBF58, +0xEEA1D3D3, +0xC7A01FED, +0xE5E782BC, +0xF5DDB9A1, +0xCDA755EC, +0x0606D449, +0x3903E6DF, +0x27AA3279, +0x1BE88127, +0x6FE47A56, +0x2A4FAC53, +0x35CC2BD2, +0x1EBD488D, +0xBED137DF, +0xD288C87D, +0x4B56EED3, +0x0B9A34AB, +0x295061EE, +0xEB0EE5E8, +0x7112B615, +0xE010EA04, +0xDD29A3A0, +0xEE4FFD08, +0x3E4A67DD, +0x320269D7, +0xEFE2AFB7, +0x1E008279, +0xD28ECE96, +0xFC827466, +0x6925A0D3, +0xB42E58E4, +0xEFB621F3, +0xFDF1EF99, +0x87FD3A34, +0x4FC496D0, +0xAFF92EE7, +0x21690155, +0x9685E128, +0xB229A9D1, +0x561179DB, +0xAA0E08C0, +0x86AB8112, +0x09668759, +0x01295419, +0xE93FF5A7, +0x3ABBCA65, +0xBBADB38A, +0xA627FE34, +0xCA63F8A0, +0xEE33DBDF, +0x7D2601FB, +0xD47A7037, +0x86DF040D, +0x84EE16A3, +0xC78304EC, +0x38E4C997, +0x0129FF24, +0x9353BE18, +0x8CCC35F6, +0x8D7BAB00, +0x1A57734A, +0xC93CFBB8, +0x5E48F606, +0x8AFA5F5C, +0x3897B3D2, +0x19470283, +0x856416E1, +0xE256D526, +0x859DF5F4, +0x40C6EAB7, +0xA8615242, +0x9CD9719C, +0x132D6FD9, +0x926B3C69, +0xC55A0153, +0xB938ABCD, +0x31112C82, +0xA75BEF9A, +0x8B74B831, +0x6D61EF73, +0xD357B1F5, +0x41B79B1A, +0x7E13FBDC, +0x019317A5, +0xFB76C8DC, +0x68BAFA3B, +0x8CCA7383, +0x2178D01A, +0x298AFF65, +0xCABAAF18, +0x14750794, +0x2EC8D9A1, +0x5F2559A3, +0x1872BC90, +0x0D4685D2, +0xA6E279ED, +0x7B1220ED, +0x9DB5E329, +0x7CA4CA50, +0x179D93F0, +0x7691B13B, +0x25C68794, +0x2C1E2B50, +0xD78A4BD2, +0x6D191278, +0x9247F1BA, +0xA8283585, +0x2530E9A7, +0xCCAD49C1, +0x706C37A2, +0xE5262A10, +0x56C694AE, +0xB20D37AE, +0x7672051A, +0x6D1896D8, +0xE73C50F5, +0x0F2A8675, +0xCFB6D35A, +0x7D68BE91, +0xE932CC51, +0xD85CA785, +0x60D135AB, +0xFB8EB36F, +0x980AE488, +0x26B932CC, +0x2AC2C8C1, +0xF3C1820A, +0xCEB3BB3E, +0x3084F195, +0x27D3A201, +0xC0168338, +0x9E71ACC7, +0x9AC5843A, +0xB2028B56, +0x897B9057, +0x7BB31BDE, +0x84E6EBC2, +0x6B88B151, +0xCC778A6B, +0x32EE9A2F, +0x6FE05842, +0xD632E709, +0xD409DD2B, +0x2D44FFDB, +0xCA91370A, +0x8E256920, +0xE71F8DF2, +0x5B802766, +0xBEC7D614, +0xF035CA16, +0x045ED88E, +0x3FEC2D8D, +0xFB463F9F, +0xB0CBD719, +0x8F369306, +0xD3520147, +0x77D25526, +0x51416FE3, +0x5ACDA562, +0x2057CEC2, +0x787BAE88, +0x03ED784D, +0x71D661E2, +0xFEC67ED0, +0x963BC98F, +0xD5207C86, +0x40FCB132, +0xC63E89E6, +0x48D01CDD, +0xBE942698, +0xA0B43E10, +0x4D326608, +0xA021B0DD, +0x8F032FD9, +0x15C34E02, +0x33CB6731, +0x62B657D1, +0xFA00B25F, +0xEE1B2F14, +0xA3BB00E4, +0x01A3CEAA, +0xD6F73D75, +0x4CF4E1B6, +0xF890E82B, +0xD5C696A2, +0x35ACF5FC, +0xFF26361B, +0x44151144, +0xDB231EDC, +0x51E46612, +0xAE8E4C6F, +0xA0C65C51, +0x13360E0F, +0x4C0E160A, +0x4960014D, +0x4785FE5A, +0xCCB1A4BF, +0xC20B966C, +0xD291F1E6, +0x7B46CE04, +0xD4E41FC1, +0xAC2E13CA, +0xBB898011, +0x4546825D, +0x2D4E7386, +0xCB7E6766, +0x911D23CE, +0x07A44892, +0x1E7F6C79, +0xE3E7BA56, +0x5D3977D4, +0x6ED87C3A, +0x9FD3AB0C, +0x77ECBE84, +0x46819A49, +0x8A146674, +0xB8670B1F, +0xFAFEBBD8, +0x1AAFA6CD, +0xA9458129, +0xE3AF92D3, +0x3EE0A591, +0x985828B3, +0xD1740C21, +0xFDE5E08D, +0xFCDD5CF0, +0xCFD5919E, +0xDF512FFA, +0xFC4E3EB8, +0x5529DC38, +0x189600F3, +0xFA518710, +0xF0EDA7A0, +0x589FD72C, +0x77C7326F, +0x50C0F219, +0x95DA9862, +0xA7D2B920, +0x5B8701A0, +0xED6E92E8, +0x057913AA, +0x9090433A, +0x08789912, +0x003BB950, +0x863C4CC9, +0x078978BD, +0x390C2B5D, +0xD3D54A3B, +0xB6F03CC3, +0xE2D8F218, +0xD0FD439D, +0xA10BB352, +0x4EA3948D, +0x095FFD3A, +0x8CA08AAE, +0x309C751B, +0xC2C1BB8C, +0x5C706C01, +0xAC1A9302, +0xCCD5AA9C, +0x43FA387A, +0xA7C23EF1, +0xE07E416E, +0x8C8670C8, +0x1FFF314E, +0x554EBA60, +0x41D55DEB, +0x1B43D6A9, +0x180EE59C, +0xD68BE664, +0xAAA1EB13, +0x882D23FA, +0xF98191DF, +0xF594B661, +0xDBFE1CE5, +0x9DE1AAE0, +0x448CE62A, +0x6E2848C0, +0x5224ABBB, +0xFC78C7BE, +0xAB750DD0, +0x12E16F31, +0x23B8BCE1, +0x889E1CFF, +0xA4382909, +0x5774BC31, +0x2C8C7704, +0x797531D0, +0x20BE29E9, +0xB4A46371, +0x47E3C5B9, +0xA3A6D67B, +0x141B4CE0, +0x375BFC3E, +0x1A26B84F, +0x60100330, +0x600B1059, +0x6843A4F1, +0x7A861E46, +0x23C83A75, +0xC89259C1, +0xAFAE640D, +0x829CAAE9, +0xA0EE7D82, +0xE9850353, +0x4C41155C, +0x12033F98, +0x510DE870, +0x86C0DBE6, +0x9AD58DD6, +0x35DAAFCD, +0xBB4C0AE4, +0xC915838A, +0xFEEF4F24, +0x367AD1B7, +0xD0973C30, +0x283ACD3E, +0x80BF236B, +0x56AAACB4, +0xDA8CA9CC, +0x812F62AE, +0xDF7E5EE1, +0xFE6A50D5, +0xAF849B8E, +0xAF90CDCD, +0x9623DE47, +0x4B248EC1, +0xF3A3E323, +0x0EED1484, +0xA38CE390, +0xC9838D1F, +0xF542D7F3, +0x4BA3A940, +0x73121D69, +0x13349F38, +0xA7BA4129, +0xA2620455, +0xD9EA4426, +0xC7B97A15, +0x50F14FB0, +0x0066A5E0, +0x5C7B7E8A, +0x6D5FAF74, +0x11FEB18E, +0xF65E8522, +0x6FBA332E, +0xEA7148AB, +0x4076C2D5, +0x3CD231EF, +0x6EE8FC5A, +0x79C36F8C, +0x8D1BE1AB, +0x4DFACE17, +0x9A544AD4, +0xC8ABF375, +0xD797A82B, +0xC99414ED, +0x072A3B36, +0x1DBADFE0, +0xE4E93D2E, +0x9EC8D0C2, +0x1E4B7AB0, +0x4D332608, +0x552D3047, +0x4ED438E6, +0xA7F0DB05, +0xD4A64960, +0x6DE526AE, +0x30FD5A1E, +0x76B90946, +0x3852D9D4, +0xC1071AD6, +0xD1A1D5E1, +0xE7F5248D, +0x5A291E55, +0xA9C68E38, +0xF5D19138, +0xC874633D, +0x03B02A3C, +0x1BD4B46C, +0xF42F7588, +0x4ECD7D71, +0x04F8894B, +0x22A80E5C, +0x3EBB8853, +0x818440F2, +0x604F810A, +0x17498DC1, +0x1BEA2906, +0x1EDF458A, +0x9EC1C5CA, +0xC2841875, +0x8A11C3C0, +0x587B42F4, +0xED2B4E43, +0xB9A1531F, +0x9FF2C02B, +0x8B2F65F4, +0x9DD5D7EB, +0xEC992F2F, +0x6D78100F, +0xB74FFC6A, +0x58A9CE70, +0x136BF131, +0x27ECE08E, +0x3B732EAE, +0xCEFA0868, +0xA26418B7, +0xE44ADE98, +0x4D67FBC0, +0x96DF8373, +0xD26DB165, +0x280F862A, +0xFCF8F51A, +0xD65722D9, +0x11C8BC01, +0x55BF6994, +0x18470423, +0x453EDACC, +0xCD53C586, +0xA916BE3C, +0x82A41D73, +0x50221680, +0xD6BD5F7D, +0x44F1DF59, +0xD2363902, +0xD427C0D4, +0xB45E0905, +0xAE48877B, +0x0D97E67B, +0x6004F0A9, +0x121914B8, +0x412B820D, +0x909BC25F, +0xDB7008B0, +0xA4853F16, +0x890E7D3E, +0x877056D3, +0x7B356E44, +0xB0FF209E, +0x937D0F6A, +0x1D6C8568, +0xF659DE33, +0x5328CC8C, +0x6C8B20C4, +0x525445E0, +0x5966F06B, +0x92BEBA05, +0xCA68E7A0, +0xEF59F2B4, +0xF02EF2FE, +0xF7F5D074, +0x01CD0DE8, +0x79597D12, +0x430F14E1, +0xBBA4E18E, +0xF5540008, +0x5FCA175B, +0x4C02AADB, +0x6E5FE8E1, +0x84439F68, +0xD7AC734D, +0xC7A97D68, +0x242C2068, +0xB1D34C61, +0x7C98A2D8, +0x667CD34F, +0x88184941, +0x30582C57, +0xA4D97B75, +0xC552D6D2, +0xB29762BA, +0xDABF9E77, +0x5E1D55BE, +0x2FDA872F, +0x5CDE3C8E, +0xBC560B7D, +0xCA032DF1, +0x5D56E300, +0xE5CDC823, +0xE8AEB3C3, +0x5CA51A14, +0xA2F59A4A, +0x566AD127, +0x2BD0A766, +0x59572160, +0x6282F29C, +0x7B06416B, +0x0AB096C4, +0xC591F9A2, +0xD495F3E3, +0x337D108C, +0x7AD2794F, +0x4051B419, +0x19249CDE, +0x0E0761F0, +0xCCCFF6BE, +0x5DD5FCA4, +0x6C37A604, +0xB02E64F9, +0x2D5AC2BC, +0x00BA6F1A, +0xD15C1FE1, +0xFF07FD64, +0x44947F3C, +0x944ED120, +0x0188C322, +0x8254EFA2, +0x76A58D7F, +0x7165F494, +0xA8934101, +0x5CA8D9F0, +0x3F19BC6D, +0xFF099310, +0x009531E1, +0xABE16F21, +0xC0F9C8CE, +0xE5491F8F, +0xEE37669D, +0x6953967C, +0x6889B8E0, +0x2E0C3B8B, +0xF8BDBC75, +0x5C9B0964, +0xF736AD2F, +0x5C2F5377, +0x324AB465, +0x6ECA8A85, +0x41C24F81, +0xBE146C72, +0xF717A9A8, +0x41C7480C, +0x1A7BEDFD, +0x05D98576, +0xE121AE3C, +0x5C9C4AE0, +0x92C688D7, +0x51781700, +0x37ACADB2, +0xF44CA33E, +0x7975B63A, +0x096CC059, +0x361D4CBB, +0x5FED8501, +0xDFFBCC6B, +0x7F1ACEE4, +0x024A7610, +0x9022A71B, +0x09DF6DB8, +0xEC31DDC8, +0x4AF91201, +0x25A3CE04, +0x4E514D28, +0xC653068C, +0xD4E6BBCE, +0x5A059A36, +0x263EFD7E, +0x70B56BC5, +0xD4D14142, +0x545062CC, +0x0FBB391E, +0xB8792F4A, +0xE0FB9B01, +0xCD7C73AB, +0x3CCE203F, +0xDCBF0D76, +0xC7AF2FFA, +0xBC0B4418, +0x4D7360D8, +0x4CA9D29C, +0xB6459603, +0x809B09D7, +0x3D009B89, +0x8015F707, +0xE83D56F5, +0x3C31F4F7, +0xCC1B160E, +0x874C2144, +0x43284491, +0x1341B34B, +0xC16730D7, +0x6F918B02, +0x5308CA11, +0xA05389E2, +0x266E0077, +0x77EA67A7, +0x1A61471C, +0xAD0F7F01, +0x55C12BD0, +0x1E142828, +0x0B070766, +0x4B2DCFFF, +0x2D782F3E, +0x82FE689F, +0xAFE91784, +0xB835C892, +0xBB28D064, +0x2B682465, +0x4E4B3A6B, +0x85D732B7, +0x01C7939A, +0x75CE8E96, +0xD696E39F, +0x52AF214D, +0x1935DA31, +0xFC30E842, +0x90433101, +0xAD901EBF, +0x38FB6D59, +0xE6C992F5, +0x17DBD91B, +0xA6E3BCFB, +0x01F7D04D, +0x7BBCE40A, +0x0A873638, +0x60FF616E, +0x4DCE34AB, +0x497D0219, +0x9C5156BE, +0x5A44D465, +0x7B9143E1, +0xE11EE3DF, +0xD9E5526E, +0x4371AAED, +0x852F036E, +0xBD96F8B5, +0x1BF87894, +0x017CDB0A, +0x4A706B2C, +0x5BF8F639, +0xD5CEC470, +0x6006B0DE, +0x3A1F10C3, +0x9D953950, +0xD22821DC, +0xFCA96BB0, +0x2D421F3B, +0x92CEA881, +0x5C4A7A67, +0x15918223, +0xDAB40193, +0x6FE545EE, +0x94DE85B6, +0x56B22553, +0x2736DEC0, +0x04E55269, +0x6ECC8923, +0xE17A9A80, +0xB136C2B8, +0xA47890EE, +0x06FCB11D, +0xBAE067C9, +0x3CADF37F, +0x3CB5BEDD, +0x0A0BCAEA, +0x0FCDF686, +0x8B6E8365, +0x6D8C2DDA, +0xAC8C5756, +0x30ED4F34, +0x56566951, +0xEE6DE25B, +0x487B6422, +0xEC2BA8EF, +0xB2738D6B, +0xF537B669, +0xDC132C88, +0x27FC3590, +0xCDD36C4B, +0x3ED0F1FE, +0xFF09C081, +0x91B1E553, +0x422560A5, +0x02C21470, +0x050BEB58, +0x26165403, +0xB94D5F19, +0xB01B1772, +0x3B756074, +0x03796B1E, +0x194E879D, +0x255BE6A3, +0x4104D8AE, +0xBCD85AA2, +0x3E7A644E, +0xE704C7C1, +0x436701A4, +0x9364D04A, +0x88A6366B, +0x3206946E, +0x914DB711, +0xDEB99A76, +0x4CC59A67, +0x9F1D4DFA, +0x55692535, +0x3C15DD0A, +0xCF91D666, +0x25944DF4, +0x8F5071B3, +0xBA586803, +0xB61C2E5A, +0x01EA5668, +0x3A88937A, +0x4C08A8CF, +0x57142A3C, +0x4A699CC0, +0x7F489532, +0x761BE4CF, +0x2E7488DB, +0x1FC66CB8, +0x4BA52A4C, +0xDCD4BD61, +0x87D94737, +0x1DB2DCB1, +0x1828F4ED, +0x76CC053D, +0xA3FC3E9C, +0xD50FB719, +0x70CE9428, +0x81AC884F, +0x92BF9F23, +0xA18161FC, +0xD34E2F08, +0x8752E93A, +0x1AFFC8D5, +0x12B80828, +0x7A0AF169, +0x1F7B1A7C, +0xD5C14117, +0x2B2433FC, +0xE9B5EA44, +0xD73A5E5C, +0x2FA9C01F, +0x1FB3853C, +0xA6949D41, +0x71C8A073, +0xC0B89854, +0x75D41DD3, +0x32A5FC47, +0x6D9F1BBA, +0x2FA67D56, +0x04C3ED57, +0x246F53B0, +0xA778DE46, +0xAD8E8305, +0x3A68B97B, +0xDF78581E, +0x2397C2FE, +0xB6E9CF24, +0x1651C4E3, +0x09E17D56, +0xF69F3053, +0x0FA3A033, +0xE9391DDC, +0x2285AF27, +0xC438147B, +0x6241E34F, +0x4597D324, +0x11626E71, +0x2909AB59, +0x5234730B, +0x37A31FEC, +0x01FE0C21, +0xF5940EEE, +0x603BA081, +0xB7C01236, +0x393FD3B1, +0xB1B4C169, +0x0B0A1372, +0xBD1996F6, +0x6EC65A23, +0xF3397943, +0x8F70C9AD, +0x5BC51713, +0xFCC77CF4, +0xDE130464, +0x4860A70F, +0x7A44EEA1, +0x71721BB6, +0x81A9F5DE, +0x3B178C5F, +0x1B0EE934, +0xE28D6E0A, +0x4013C97D, +0xE45ECF41, +0xFE23D2FC, +0xE83E457A, +0x5ED12FC5, +0xDA034CC4, +0x615D0693, +0x4D37F582, +0x57CDC999, +0x9F3AA3DA, +0x4AA45F8F, +0x61D5BD81, +0x8788FEF8, +0xD04C26BC, +0xBFF07B86, +0x5C000D7A, +0x56B8105F, +0x721CF12E, +0x2183FF0F, +0xC0857D5E, +0xEEEF0AB1, +0x41A3089F, +0xBA9E9E48, +0x86B2C7FF, +0xDFC4D95A, +0x44FB3541, +0x527F7165, +0xF14E0B09, +0xDC9BF512, +0x54E06D15, +0x7ED41E4D, +0x9CAADDE0, +0xD02F0A5A, +0x659939AF, +0x3140EC87, +0xD79872BB, +0x91ADBADF, +0x321C005E, +0x40B7AA96, +0xD9CF8C2E, +0x78546F04, +0xF590F648, +0xC1E93FF8, +0x092BC71C, +0xE26D6ACA, +0x4BC12937, +0x81B36AB7, +0xDBF5A65B, +0x133FDDA4, +0x71D3C784, +0xE31A7753, +0x49FAE7C0, +0xF4286D14, +0xAC942DDA, +0xE0AE894B, +0x940187F3, +0x4D9C95FC, +0x014EA592, +0x0FE4D3C7, +0x97D0E92D, +0x3187992A, +0x14935441, +0x39D87497, +0xFC3B08F7, +0xD86B7D60, +0xD66C4E6F, +0xAC5C8881, +0x6A2EEF0B, +0x6724D6E4, +0x6BE1743D, +0xF6AD564B, +0xCFD763F4, +0x62711851, +0x95CF3847, +0x161DD0F8, +0x06507F6E, +0x2673FDF2, +0xA3ED3DCD, +0x3FF60C4D, +0xD2320229, +0xEC396886, +0xD6653A39, +0x166C4C53, +0xA2D7E494, +0x855F3026, +0xC9536E95, +0x452C2DA7, +0x7C5932A8, +0x991CE2B7, +0x49DF5EA3, +0x9A72FD36, +0x19013550, +0xE68D0378, +0xA666F03D, +0x36959C7A, +0x811328A3, +0xA266F415, +0xAD052961, +0x3DA43882, +0xBD0BC1D8, +0xEFCB566A, +0xFCBE32E0, +0xF0182653, +0xA15A3201, +0xDBC23BAA, +0x4947D033, +0xEA45E01F, +0xB77BAAF7, +0x10F0A041, +0x7261A9DC, +0x1076FD8E, +0x5CC6D03F, +0xFDBA8229, +0xB978E892, +0x28409FC1, +0x03BC9D87, +0xFF0351FD, +0x31C573B5, +0x663C9870, +0x132EA055, +0x5F233FF9, +0x5F5C6FED, +0xD9462A42, +0x45EF0F25, +0x78E294BF, +0x608EEC39, +0xBB275C19, +0x2988C732, +0x776EFA6A, +0x240B63EE, +0xAB94D308, +0xD25BB249, +0x3B199F8E, +0x62868AF1, +0x493BF851, +0x3EC7F3C0, +0x1F9A8ACE, +0x1F6D3187, +0x695DE327, +0x7A0B4395, +0x7961D601, +0xB5DEC846, +0x47ADEA7F, +0xB37C1A00, +0x9A8ECD29, +0xC745D2CE, +0xA2FF0839, +0xB544D5E9, +0xFB20541A, +0x7E54F9CD, +0x6735083E, +0xB029373C, +0xE44A911A, +0x818156EE, +0xB8C83F5C, +0x722E217E, +0x06E664A3, +0x6DE2D766, +0x7A4C5E40, +0x2AB48760, +0x8075B851, +0x840C712E, +0xB6E281F2, +0xDF2F74C7, +0x83FFA293, +0x01899BC7, +0xF8ABA0E9, +0x9E1BF882, +0x5D5AAAE0, +0x2180A79E, +0x43B96D40, +0x738ED2FA, +0x28125016, +0x8151F9CF, +0x73EF2B56, +0xA2B3B33D, +0x0B7B62B4, +0x39F603F2, +0x54F6C4C9, +0x6E1F96CB, +0x10224F18, +0xEAEF81FB, +0x08D87035, +0x2375B9F9, +0x4E6A9E06, +0x0C282B47, +0x5D617F96, +0xA4E95456, +0x76192538, +0x516279CD, +0xD8DCFE05, +0x58B1C2F1, +0x144D5E61, +0x6D9DA9BE, +0xEE97A0A1, +0xA4000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000004, +0x0712151F, +0x242D3100}; //last byte 00 + + + uint32_t mldsa_entropy[] = {0x3401CEFA, + 0xE20A7376, + 0x49073AC1, + 0xA351E329, + 0x26DB9ED0, + 0xDB6B1CFF, + 0xAB0493DA, + 0xAFB93DDD, + 0xD83EDEA2, + 0x8A803D0D, + 0x003B2633, + 0xB9D0F1BF, + 0x3401CEFA, + 0xE20A7376, + 0x49073AC1, + 0xA351E329}; + + uint32_t mldsa_pubkey[] = {0x75A8F4C9, +0x56C0D7DA, +0x6C7FE78F, +0xB03E722E, +0xD1FC4F2A, +0x5E244960, +0x0E616F61, +0x995A4A88, +0xBABD9257, +0x1C680253, +0x9C86367B, +0xAC5D6C33, +0xEE7AD2F4, +0x7331681D, +0xAA2ECD32, +0x72A07C98, +0x88EF4FB3, +0xD7D7B553, +0x4D62D48D, +0xB4E7AAB9, +0xA3DCB673, +0x2CF5959D, +0x5ACD4B25, +0x8FD9AAD0, +0x57598DB1, +0xA8503DD8, +0xF788F9B5, +0x51423A93, +0xDEC204C8, +0xA67890B5, +0x33BDAD35, +0x44E65DD2, +0xDA8876E6, +0x803E5D77, +0xC6FA1F1C, +0x232AC032, +0x8C69650C, +0x63E23FD7, +0x24496B95, +0x236B585F, +0x76FD7C94, +0x9B0204DD, +0xF23E55C8, +0x83C88B34, +0xA55B2D3B, +0x377DE412, +0x2F9CBE78, +0x143EFC7A, +0xB9D23B98, +0x67F5F939, +0xDF336A02, +0x5653B525, +0xD7F23586, +0xF82C3AAD, +0x578883ED, +0xDAB3868A, +0x08115BD0, +0xC313AD31, +0xFF44F4F6, +0xB855025E, +0x5FF68B72, +0xC9D353CE, +0x54194914, +0xB266EF4D, +0x3F1F8740, +0x142A53D1, +0xC27BF5EF, +0x2D7E8840, +0x2C565079, +0x247080AE, +0x0D07D6D7, +0x568FB887, +0xFE18BCFD, +0x8261ED2E, +0xF494C18A, +0x8E6B8A20, +0x9781A4CD, +0x2CD32CF6, +0x1EA4474E, +0x74AA20A2, +0x2DA5FD0B, +0x4955DB1E, +0x2B9A6C3C, +0x38072C90, +0x42D2744A, +0x5810F3C3, +0xE9645B84, +0xDBFA7891, +0xF5BC4E41, +0xFDDD2DF1, +0xBACD84AE, +0x80BEE050, +0x2CACAC54, +0x7FD6521A, +0xEFCB4B95, +0xB58BCC19, +0x4C6B5A4E, +0x5214018B, +0x6F2BA80F, +0x21122004, +0xED559A86, +0x776826F3, +0xD777C25A, +0x283EADA7, +0xBD2004B8, +0x8E19D7B1, +0x5FEA24A1, +0x53C08F09, +0x36E896EA, +0x2ED175C0, +0x7A2CD400, +0x81D14708, +0x7F8E7E8B, +0x56BD438F, +0x7DAC54BA, +0x3A2D7255, +0x6BACAB5C, +0x6A6C8D63, +0x2ACF6E41, +0x1E1E9299, +0xF2A2FD4C, +0x6519AC22, +0x62ABE387, +0x4871039D, +0x177BFFE6, +0xD167821F, +0x05E46393, +0xB1FCD5A2, +0xCE192183, +0xFF741B18, +0x5280A379, +0x840C75B9, +0xEC706C16, +0x17DB9224, +0x958572BE, +0xF0158B00, +0x0F6C5BCE, +0x5066C4E3, +0x11509EFB, +0x92437C86, +0x5EF4F6C2, +0xE8493A26, +0xED8B2FD9, +0x9ADFC161, +0xA9059DFF, +0x794ED52A, +0xF6C83B78, +0x94FB2C79, +0x265468C2, +0x30CDDF36, +0xBFE6EBAF, +0x11463F0E, +0xF4CCC789, +0xEF23EECF, +0x3933638A, +0xC5ED3BFD, +0xC0122B79, +0x1EFD23D7, +0xC239BF96, +0x9B886EC3, +0x626CF86B, +0x9D012C28, +0x09EA6BA6, +0x3A4F8E77, +0xCBADB40F, +0x1A8B7C2B, +0x7AC21C00, +0xD3AC87D9, +0x8E61CE66, +0x91A7F5B2, +0x351D80D8, +0xED30B5A9, +0x006153A4, +0x878E5175, +0x69F192F9, +0x4F84BB9A, +0x4F35A45B, +0xB41EE126, +0xD93C19DB, +0x43A981C5, +0x7377DC9B, +0xCE867A76, +0xF2C49D0D, +0x9E8801A1, +0x726C8EEB, +0x70F7EBDF, +0xAC83E46A, +0x9CC27185, +0x02E590A9, +0xD70E82A9, +0xCCF56D33, +0x526C8E25, +0x75172C72, +0xE4259AA6, +0x39999175, +0x827B9380, +0x3C5B43E5, +0x0C8833A8, +0x0CC52A11, +0xB2C959B5, +0x572DEA35, +0x924E1233, +0x7BED0E92, +0xA4EFDA31, +0xE1E161B2, +0xB57B4828, +0xE9D95685, +0xE7DB7AC7, +0x95186A8B, +0x966F90CA, +0xF876F405, +0xF1EE9D64, +0x59FBB274, +0x0783870F, +0xE6A5C3FE, +0x8036ED64, +0x7BF544B8, +0x8958C4F2, +0x63409F56, +0xA61588D7, +0xD8BBB407, +0x3E7FD7C3, +0xC9E25006, +0xC97BC180, +0x43505441, +0x4CEFEF80, +0xD77DD7DC, +0x81099F4B, +0xF565D4E8, +0x91BD8636, +0x8669FAEC, +0xD31F1F1A, +0x246C9698, +0x38432715, +0x309AA45E, +0x8ED86151, +0x7C13AC94, +0x602933A2, +0xCD3BFA06, +0x735E62C4, +0xBEB652CB, +0x12257948, +0x8BA8530B, +0xB5878787, +0x495CAD69, +0x6D7C5E1D, +0xE65A66E4, +0xFBEEAFAA, +0x259768EA, +0x2608ED25, +0xB5586EE1, +0xC06CEACD, +0x5510E416, +0x7F7AA4DB, +0xAC15C68A, +0x2A710660, +0x96EB8F0F, +0xE6AE7345, +0xC2434A87, +0xD28BEC35, +0xE506BE01, +0xAF27EDF6, +0x0752DE9C, +0x9014B22D, +0xE55778AC, +0x5010C780, +0xE79FCC35, +0x7AA29326, +0xEC748BCC, +0x593E62E6, +0xDBC51FFB, +0x3F282033, +0xE8935D8E, +0xF7EFFF37, +0xED6D1CDF, +0x5A204558, +0x773A1B8C, +0x7ECB8794, +0x9013BDFF, +0xD6E8E05C, +0x817E86DF, +0xB7B62986, +0x19870FE7, +0x3E2B6099, +0x2209207D, +0x94B856FD, +0x56F4C39A, +0xD937DEF5, +0x7AEEA0C8, +0x32F54BF4, +0x08755F39, +0x88A39EF8, +0x71335BDC, +0x2169F675, +0xC95EA265, +0x8266E29E, +0x39FE97C0, +0xC2093E8A, +0x2EAA9DB7, +0x5A6A4FEE, +0x8F6889BE, +0x3A606C79, +0x956C24F3, +0xB560CCE1, +0xC3716145, +0x3868D9BB, +0xAB0A87D8, +0x5375126B, +0x6DC3E0D1, +0xF67B32A0, +0x006A8D3C, +0x705DF2C6, +0xB03BA0FA, +0x2B9634C3, +0xB0869552, +0xA0DAC3B2, +0x1ECC8BA1, +0x7B341C22, +0x10D0A23B, +0x5FD68BB1, +0x335AC96C, +0x3EF3701E, +0x0A2ACD38, +0x90A4AEBC, +0x908BC063, +0xBBF2EF3D, +0x50CF0F8D, +0xA48F7DDE, +0xB86F9D77, +0x3E544C70, +0x44704107, +0x6E99C93D, +0xB9D39780, +0xDF774DA3, +0x5A0163DA, +0x3EA50F17, +0xA69A2144, +0x10736015, +0xA4ABF71F, +0x43083324, +0x951FAD48, +0x5EBAF55D, +0xE945F8C6, +0xEFC3E8BE, +0x26917E5A, +0x29605040, +0x5A97FECB, +0xFD2625FC, +0x676AD1A9, +0x145BB8A9, +0xC1F1B3A4, +0x6519F77D, +0xA83C44D2, +0x861CAD6A, +0x56AB01BF, +0x84F7709F, +0x0F5270EC, +0x550F6691, +0xC47E6B18, +0xF4B5B884, +0x118FD4AF, +0x03D30460, +0x119322EA, +0xEF583A15, +0xF00A561A, +0xFC498539, +0x3AD53B68, +0x1D41D469, +0x790A24BD, +0xC6056EB9, +0x2DCE833A, +0xB33581E0, +0x8267CEFB, +0xBC206761, +0x92A7608F, +0xB7E34228, +0x01D93518, +0x43B47626, +0x3C0D1D54, +0x42613D6E, +0xB9924662, +0xB20BC213, +0xCA335A52, +0xA5F3CBCB, +0x8FCA9D91, +0x64170C89, +0x28DD5D2E, +0xAF9290D8, +0x2EA8FF72, +0x99E772DE, +0x20567C79, +0xD6EBAE9B, +0xF5834CAD, +0x8D55ACCA, +0x5E9B22E9, +0xCD0942DD, +0x262F06D2, +0xB21C2488, +0x38D8B76C, +0xAC91E98F, +0xA4D5369F, +0xE26A609C, +0x2E6547C2, +0x9137D45E, +0x4F4B0872, +0x4DF78651, +0x1FBD75EB, +0x72DC72DB, +0x2FF0B8D9, +0x0461EEAD, +0x262FEB19, +0x08F0605C, +0xF60B5F48, +0x733E3EE3, +0x1B12EDA1, +0xC220EECF, +0xCA7160EA, +0xE73DA742, +0xAAA34081, +0x49EE2559, +0x85ED681D, +0x733AB497, +0x71BBD77E, +0x344976AC, +0x45556A83, +0xCF5EA3A5, +0x57D6F2D8, +0x54AF1396, +0xFE62BF2A, +0x582F3A25, +0x2B9CBB00, +0xAFF5E7A5, +0xDAA0B44D, +0x3355374C, +0x70BC6117, +0xDBCF67CD, +0xE2C02527, +0x5A49105B, +0xF0D464B5, +0x54761C8E, +0x0340FCCF, +0xB2993728, +0x381F0A01, +0x5DCC10D7, +0xA2697067, +0x1FF41C6C, +0x12CFF6E7, +0x1E16A376, +0x3964042A, +0xB8EE7A1D, +0x9DD7DC8C, +0x73229061, +0xDA4CF614, +0xD2F53366, +0x28FF9DC9, +0x2A1A5FD3, +0x3240EF00, +0x575D5008, +0xA2F1A632, +0xB7BB843A, +0xB18113B1, +0xF0975B6E, +0xCA7ABB6C, +0x18C2D17C, +0x9542B8FF, +0x6E99C186, +0xFCDAF6F0, +0xAB62DD37, +0x646277AD, +0x482D7F06, +0x6C3C7678, +0xD5A9ACC3, +0xC162C8AD, +0x3EA326EB, +0xCDD51824, +0x0A6040B7, +0x17DBE698, +0xF6E0E49F, +0x35741289, +0xA61F143B, +0xD0C2F335, +0x84733EA0, +0x5C0F6032, +0x1ACE1874, +0xF0C2FF27, +0x30F729B9, +0xB20FCF64, +0x994719B9, +0x5C0126AF, +0x36E379AF, +0xB8940EA2, +0x8F69A436, +0x02A10091, +0x81547AA7, +0xF1C6B59B, +0xDFB5F010, +0xFBA702E1, +0x93D67AF6, +0xA2D0277F, +0x474E5042, +0x80EB8C56, +0x5AFE7696, +0xD8FED00C, +0xDD560536, +0xEA3959D2, +0xD7D1DBD7, +0x02CD325C, +0xCDE51CDF, +0x0C1AF06B, +0x62089CEB, +0x523AB942, +0xA50A36E6, +0x7C786B83, +0xF93C29B5, +0x15CB56AF, +0x23C5412C, +0x1B2FF1BE, +0x9E01B53B, +0x6325C54F, +0x3E7FA5FB, +0x3F2D167B, +0xFE6F7AAE, +0x10CD4994, +0x86C74F26, +0xE76E8FC1, +0x8E7FE42B, +0x09757222, +0xDDDBAA0D, +0x97F88AA1, +0xF9FC0CF1, +0xC9F781B2, +0x8ABD0A7E, +0xB9334646, +0x829FDDFC, +0x9F505ECD, +0x9BC8EDDA, +0xC160366B, +0xBC04AA2E, +0x62A7A209, +0x594A87F9, +0xE121DFE9, +0x61DA3ADC, +0x7764DD63, +0x844B4FCE, +0x43478D15, +0x1FCDA95F, +0xF1770B3D, +0x87A6727F, +0xC274D7ED, +0x11A1F0E2, +0x86992E87, +0xDAB4763C, +0xDC33027F, +0xB60D42A3, +0x06501721, +0x4496E54C, +0x3D0EF595, +0x3254C024, +0x08D3CE80, +0x7CDD58FF, +0xDCE15AF9, +0x4762C489, +0x0F47F621, +0x5FBC2838, +0x2F72C934, +0x6B4D74DD, +0x7C768A06, +0x7FF6AA96, +0xE495DFA9, +0xD13470B6, +0xADC362BD, +0x8C442D77, +0x94143894, +0x4521F67E, +0x85673C5F, +0xF3735129, +0x09B8371D, +0xCDE344CC, +0x8A602C33, +0x27903300, +0x3C4B7BB5, +0x1354B2E6, +0x6C415E7C, +0xF3CD0130, +0x04CC968B, +0xE01A21D9, +0x104F92E9, +0x307D9D95, +0x81C2C125, +0x581739CF, +0x740DDE7D, +0x530E22A3, +0xE0811755, +0x9843A0ED, +0xF0B6D576, +0xB4B528C8, +0xE21D00FE, +0x8814F357, +0xD63D0F4B, +0x091F4A9B, +0x4B3DE3DE, +0x2F3DDBA9, +0x528F7C6E, +0x95433AEA, +0x0DDC9077, +0x472572BC, +0x7F015542, +0xCBCCAC3D, +0xB5EA7269, +0xCD97E060, +0xE3BFA854, +0xDB263906, +0x946E6E5A, +0x973F355D, +0xD585DA0D, +0x39603F52, +0x91880424, +0x0F4C8A26, +0x40DE27CF, +0x9CC53003, +0x201B6DC5, +0x8A2ED125, +0xA52F4644, +0x4938A93F, +0xECDFDBE5, +0x04898FD1, +0x27E70F9F, +0x1AE29EEF, +0x61E6AC0D, +0x3B7C6A84, +0x561BFF14, +0x4EB78DFE, +0x9783F717, +0xBE8381BF, +0x94582504, +0x24B61F09, +0x5C1001BE, +0x264376F4, +0xBA325CEF, +0xF9BB4752, +0xCD3D8806, +0x870B5CFB, +0xFD252637, +0x364818EC, +0x11BFF699, +0xCC10F310, +0x2FDD62A5, +0xB527ED7A}; + +uint32_t mldsa_verifyres [] = {0x89E8DA09, +0xEDD3600C, +0x15A06D5B, +0x5CBCA92C, +0xADF08F43, +0x13D0C0E2, +0xB23E24B3, +0x29EEBD1D, +0x81DE6DEA, +0xE3F36797, +0xA494BA21, +0x21E0A274, +0xC3988770, +0x902E2CB3, +0x25B79FD1, +0xC6ED2197}; + //Call interrupt init + init_interrupts(); + + uint32_t seed[8], sign_rnd[8], entropy[16], privkey[1224], pubkey[648], msg[16], sign[1157], verifyres[16]; + + + for (int i = 0; i < 8; i++) + seed[7-i] = ((mldsa_seed[i]<<24) & 0xff000000) | + ((mldsa_seed[i]<< 8) & 0x00ff0000) | + ((mldsa_seed[i]>> 8) & 0x0000ff00) | + ((mldsa_seed[i]>>24) & 0x000000ff); //mldsa_seed[i]; + + for (int i = 0; i < 8; i++) + sign_rnd[7-i] = mldsa_sign_rnd[i]; //TODO: add byte swap - not doing now to save sim time + + for (int i = 0; i < 16; i++) { + entropy[15-i] = ((mldsa_entropy[i]<<24) & 0xff000000) | + ((mldsa_entropy[i]<< 8) & 0x00ff0000) | + ((mldsa_entropy[i]>> 8) & 0x0000ff00) | + ((mldsa_entropy[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 16; i++) { + msg[15-i] = ((mldsa_msg[i]<<24) & 0xff000000) | + ((mldsa_msg[i]<< 8) & 0x00ff0000) | + ((mldsa_msg[i]>> 8) & 0x0000ff00) | + ((mldsa_msg[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 1224; i++){ + privkey[1223-i] = ((mldsa_privkey[i]<<24) & 0xff000000) | + ((mldsa_privkey[i]<< 8) & 0x00ff0000) | + ((mldsa_privkey[i]>> 8) & 0x0000ff00) | + ((mldsa_privkey[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 648; i++) + pubkey[647-i] = ((mldsa_pubkey[i]<<24) & 0xff000000) | + ((mldsa_pubkey[i]<< 8) & 0x00ff0000) | + ((mldsa_pubkey[i]>> 8) & 0x0000ff00) | + ((mldsa_pubkey[i]>>24) & 0x000000ff); + + + for (int i = 0; i < 1157; i++) { + sign[1156-i] = ((mldsa_sign[i]<<24) & 0xff000000) | + ((mldsa_sign[i]<< 8) & 0x00ff0000) | + ((mldsa_sign[i]>> 8) & 0x0000ff00) | + ((mldsa_sign[i]>>24) & 0x000000ff); + } + + for (int i = 0; i < 16; i++) { + verifyres[15-i] = ((mldsa_verifyres[i]<<24) & 0xff000000) | + ((mldsa_verifyres[i]<< 8) & 0x00ff0000) | + ((mldsa_verifyres[i]>> 8) & 0x0000ff00) | + ((mldsa_verifyres[i]>>24) & 0x000000ff); + } + + mldsa_keygen_flow(seed, sign_rnd, entropy, privkey, pubkey); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + mldsa_signing_flow(privkey, msg, entropy, sign); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + mldsa_verifying_flow(msg, pubkey, sign, verifyres); + mldsa_zeroize(); + cptra_intr_rcv.mldsa_notif = 0; + + printf("%c",0xff); //End the test + +} + + diff --git a/src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.yml b/src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.yml new file mode 100644 index 000000000..919e1725c --- /dev/null +++ b/src/integration/test_suites/smoke_test_mldsa_rand/smoke_test_mldsa_rand.yml @@ -0,0 +1,3 @@ +--- +seed: 1 +testname: smoke_test_mldsa \ No newline at end of file diff --git a/src/integration/test_suites/smoke_test_pcr_signing/caliptra_isr.h b/src/integration/test_suites/smoke_test_pcr_signing/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_pcr_signing/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_pcr_signing/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_pcr_signing/smoke_test_pcr_signing.c b/src/integration/test_suites/smoke_test_pcr_signing/smoke_test_pcr_signing.c index 0afb0b306..adcab229c 100644 --- a/src/integration/test_suites/smoke_test_pcr_signing/smoke_test_pcr_signing.c +++ b/src/integration/test_suites/smoke_test_pcr_signing/smoke_test_pcr_signing.c @@ -51,6 +51,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; /* ECC test vector: diff --git a/src/integration/test_suites/smoke_test_pcr_zeroize/caliptra_isr.h b/src/integration/test_suites/smoke_test_pcr_zeroize/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_pcr_zeroize/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_pcr_zeroize/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_pcr_zeroize/smoke_test_pcr_zeroize.c b/src/integration/test_suites/smoke_test_pcr_zeroize/smoke_test_pcr_zeroize.c index 2ff485ee4..9c32521ec 100644 --- a/src/integration/test_suites/smoke_test_pcr_zeroize/smoke_test_pcr_zeroize.c +++ b/src/integration/test_suites/smoke_test_pcr_zeroize/smoke_test_pcr_zeroize.c @@ -51,6 +51,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; /* ECC test vector: diff --git a/src/integration/test_suites/smoke_test_qspi/caliptra_isr.h b/src/integration/test_suites/smoke_test_qspi/caliptra_isr.h index fca82fef0..694eb4ad2 100644 --- a/src/integration/test_suites/smoke_test_qspi/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_qspi/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -239,5 +241,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_qspi/smoke_test_qspi.c b/src/integration/test_suites/smoke_test_qspi/smoke_test_qspi.c index babe4f400..a747335c2 100644 --- a/src/integration/test_suites/smoke_test_qspi/smoke_test_qspi.c +++ b/src/integration/test_suites/smoke_test_qspi/smoke_test_qspi.c @@ -54,6 +54,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; typedef enum { Dummy = 0, RdOnly = 1, WrOnly = 2, BiDir = 3 } direction_t; diff --git a/src/integration/test_suites/smoke_test_ras/caliptra_isr.h b/src/integration/test_suites/smoke_test_ras/caliptra_isr.h index a245e2994..2a68d6a96 100644 --- a/src/integration/test_suites/smoke_test_ras/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_ras/caliptra_isr.h @@ -55,6 +55,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; #define RV_EXCEPTION_STRUCT 1 @@ -195,5 +197,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_ras/smoke_test_ras.c b/src/integration/test_suites/smoke_test_ras/smoke_test_ras.c index 629e87e90..c27f80a11 100644 --- a/src/integration/test_suites/smoke_test_ras/smoke_test_ras.c +++ b/src/integration/test_suites/smoke_test_ras/smoke_test_ras.c @@ -209,6 +209,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; volatile rv_exception_struct_s exc_flag __attribute__((section(".dccm.persistent"))); // WARNING: if DCCM ERROR injection is enabled, writes to this may be corrupted volatile uint32_t boot_count __attribute__((section(".dccm.persistent"))) = 0; diff --git a/src/integration/test_suites/smoke_test_sha256/caliptra_isr.h b/src/integration/test_suites/smoke_test_sha256/caliptra_isr.h index 1b9018b20..d5690e992 100644 --- a/src/integration/test_suites/smoke_test_sha256/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_sha256/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -251,5 +253,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_sha256/smoke_test_sha256.c b/src/integration/test_suites/smoke_test_sha256/smoke_test_sha256.c index 2b3cdf92b..eaaa3f0eb 100644 --- a/src/integration/test_suites/smoke_test_sha256/smoke_test_sha256.c +++ b/src/integration/test_suites/smoke_test_sha256/smoke_test_sha256.c @@ -50,6 +50,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_sha256_wntz/caliptra_isr.h b/src/integration/test_suites/smoke_test_sha256_wntz/caliptra_isr.h index 257588cea..9a088a241 100644 --- a/src/integration/test_suites/smoke_test_sha256_wntz/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_sha256_wntz/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -257,5 +259,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_sha256_wntz/smoke_test_sha256_wntz.c b/src/integration/test_suites/smoke_test_sha256_wntz/smoke_test_sha256_wntz.c index 7037b386a..8c9c4ec12 100644 --- a/src/integration/test_suites/smoke_test_sha256_wntz/smoke_test_sha256_wntz.c +++ b/src/integration/test_suites/smoke_test_sha256_wntz/smoke_test_sha256_wntz.c @@ -50,6 +50,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_sha256_wntz_rand/caliptra_isr.h b/src/integration/test_suites/smoke_test_sha256_wntz_rand/caliptra_isr.h index 257588cea..9a088a241 100644 --- a/src/integration/test_suites/smoke_test_sha256_wntz_rand/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_sha256_wntz_rand/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -257,5 +259,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_sha256_wntz_rand/smoke_test_sha256_wntz_rand.c b/src/integration/test_suites/smoke_test_sha256_wntz_rand/smoke_test_sha256_wntz_rand.c index b30b80c77..0070f5ed4 100644 --- a/src/integration/test_suites/smoke_test_sha256_wntz_rand/smoke_test_sha256_wntz_rand.c +++ b/src/integration/test_suites/smoke_test_sha256_wntz_rand/smoke_test_sha256_wntz_rand.c @@ -50,6 +50,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_sha512/caliptra_isr.h b/src/integration/test_suites/smoke_test_sha512/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_sha512/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_sha512/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_sha512/smoke_test_sha512.c b/src/integration/test_suites/smoke_test_sha512/smoke_test_sha512.c index 4f31d91fd..7b43d3ad3 100644 --- a/src/integration/test_suites/smoke_test_sha512/smoke_test_sha512.c +++ b/src/integration/test_suites/smoke_test_sha512/smoke_test_sha512.c @@ -50,6 +50,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/test_suites/smoke_test_sha_accel/caliptra_isr.h b/src/integration/test_suites/smoke_test_sha_accel/caliptra_isr.h index 841da2048..9ba69af04 100644 --- a/src/integration/test_suites/smoke_test_sha_accel/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_sha_accel/caliptra_isr.h @@ -57,6 +57,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -106,5 +108,7 @@ inline void service_sha512_acc_notif_intr() { sha_intr_status = *reg; } } +inline void service_mldsa_error_intr() {printf("ERROR");} +inline void service_mldsa_notif_intr() {printf("ERROR");} #endif //CALIPTRA_ISR_H \ No newline at end of file diff --git a/src/integration/test_suites/smoke_test_sram_ecc/caliptra_isr.h b/src/integration/test_suites/smoke_test_sram_ecc/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_sram_ecc/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_sram_ecc/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_sram_ecc/smoke_test_sram_ecc.c b/src/integration/test_suites/smoke_test_sram_ecc/smoke_test_sram_ecc.c index f9c3ceb44..267c2b347 100644 --- a/src/integration/test_suites/smoke_test_sram_ecc/smoke_test_sram_ecc.c +++ b/src/integration/test_suites/smoke_test_sram_ecc/smoke_test_sram_ecc.c @@ -53,6 +53,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; enum ecc_error_mode_type { diff --git a/src/integration/test_suites/smoke_test_trng/caliptra_isr.h b/src/integration/test_suites/smoke_test_trng/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_trng/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_trng/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_trng/smoke_test_trng.c b/src/integration/test_suites/smoke_test_trng/smoke_test_trng.c index e0e34369f..4748b33d4 100644 --- a/src/integration/test_suites/smoke_test_trng/smoke_test_trng.c +++ b/src/integration/test_suites/smoke_test_trng/smoke_test_trng.c @@ -54,6 +54,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; // read data and compare against expected value. If there is no error, return 0 diff --git a/src/integration/test_suites/smoke_test_uart/caliptra_isr.h b/src/integration/test_suites/smoke_test_uart/caliptra_isr.h index fca82fef0..694eb4ad2 100644 --- a/src/integration/test_suites/smoke_test_uart/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_uart/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -239,5 +241,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_uart/smoke_test_uart.c b/src/integration/test_suites/smoke_test_uart/smoke_test_uart.c index c0918a194..cc4d47e84 100644 --- a/src/integration/test_suites/smoke_test_uart/smoke_test_uart.c +++ b/src/integration/test_suites/smoke_test_uart/smoke_test_uart.c @@ -54,6 +54,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void end_sim_if_uart_disabled() { diff --git a/src/integration/test_suites/smoke_test_veer/caliptra_isr.h b/src/integration/test_suites/smoke_test_veer/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_veer/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_veer/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_wdt/caliptra_isr.h b/src/integration/test_suites/smoke_test_wdt/caliptra_isr.h index bb60f9fb2..288f8f99b 100644 --- a/src/integration/test_suites/smoke_test_wdt/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_wdt/caliptra_isr.h @@ -58,6 +58,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -103,6 +105,8 @@ inline void service_soc_ifc_error_intr () { inline void service_soc_ifc_notif_intr () {printf("ERROR");} inline void service_sha512_acc_error_intr() {printf("ERROR");} inline void service_sha512_acc_notif_intr() {printf("ERROR");} +inline void service_mldsa_error_intr() {printf("ERROR");} +inline void service_mldsa_notif_intr() {printf("ERROR");} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_wdt/smoke_test_wdt.c b/src/integration/test_suites/smoke_test_wdt/smoke_test_wdt.c index b59ecdd7c..7fec9d5dc 100644 --- a/src/integration/test_suites/smoke_test_wdt/smoke_test_wdt.c +++ b/src/integration/test_suites/smoke_test_wdt/smoke_test_wdt.c @@ -68,6 +68,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void main() { diff --git a/src/integration/test_suites/smoke_test_wdt_rst/caliptra_isr.h b/src/integration/test_suites/smoke_test_wdt_rst/caliptra_isr.h index ddad5ade5..c52303cd3 100644 --- a/src/integration/test_suites/smoke_test_wdt_rst/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_wdt_rst/caliptra_isr.h @@ -58,6 +58,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -103,6 +105,8 @@ inline void service_soc_ifc_error_intr () { inline void service_soc_ifc_notif_intr () {printf("ERROR");} inline void service_sha512_acc_error_intr() {printf("ERROR");} inline void service_sha512_acc_notif_intr() {printf("ERROR");} +inline void service_mldsa_error_intr() {printf("ERROR");} +inline void service_mldsa_notif_intr() {printf("ERROR");} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_wdt_rst/smoke_test_wdt_rst.c b/src/integration/test_suites/smoke_test_wdt_rst/smoke_test_wdt_rst.c index f472b3c2f..198310ac9 100644 --- a/src/integration/test_suites/smoke_test_wdt_rst/smoke_test_wdt_rst.c +++ b/src/integration/test_suites/smoke_test_wdt_rst/smoke_test_wdt_rst.c @@ -69,6 +69,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; void nmi_handler (void); diff --git a/src/integration/test_suites/smoke_test_zeroize_crypto/caliptra_isr.h b/src/integration/test_suites/smoke_test_zeroize_crypto/caliptra_isr.h index 8f5779e04..71dd1169e 100644 --- a/src/integration/test_suites/smoke_test_zeroize_crypto/caliptra_isr.h +++ b/src/integration/test_suites/smoke_test_zeroize_crypto/caliptra_isr.h @@ -56,6 +56,8 @@ typedef struct { uint32_t soc_ifc_notif; uint32_t sha512_acc_error; uint32_t sha512_acc_notif; + uint32_t mldsa_error; + uint32_t mldsa_notif; } caliptra_intr_received_s; extern volatile caliptra_intr_received_s cptra_intr_rcv; @@ -243,5 +245,20 @@ inline void service_sha512_acc_notif_intr() { } } +inline void service_mldsa_error_intr() {return;} +inline void service_mldsa_notif_intr() { + uint32_t * reg = (uint32_t *) (CLP_MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R); + uint32_t sts = *reg; + /* Write 1 to Clear the pending interrupt */ + if (sts & MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) { + *reg = MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + cptra_intr_rcv.mldsa_notif |= MLDSA_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK; + } + if (sts == 0) { + VPRINTF(ERROR,"bad mldsa_notif_intr sts:%x\n", sts); + SEND_STDOUT_CTRL(0x1); + while(1); + } +} #endif //CALIPTRA_ISR_H diff --git a/src/integration/test_suites/smoke_test_zeroize_crypto/smoke_test_zeroize_crypto.c b/src/integration/test_suites/smoke_test_zeroize_crypto/smoke_test_zeroize_crypto.c index 0fb74a00b..fac1b3a29 100644 --- a/src/integration/test_suites/smoke_test_zeroize_crypto/smoke_test_zeroize_crypto.c +++ b/src/integration/test_suites/smoke_test_zeroize_crypto/smoke_test_zeroize_crypto.c @@ -55,6 +55,8 @@ volatile caliptra_intr_received_s cptra_intr_rcv = { .soc_ifc_notif = 0, .sha512_acc_error = 0, .sha512_acc_notif = 0, + .mldsa_error = 0, + .mldsa_notif = 0 }; diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf index 219eb6217..a2141f911 100644 --- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf +++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top.vf @@ -41,6 +41,13 @@ +incdir+${CALIPTRA_ROOT}/src/doe/rtl +incdir+${CALIPTRA_ROOT}/src/integration/asserts +incdir+${CALIPTRA_ROOT}/src/datavault/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl +incdir+${CALIPTRA_ROOT}/src/lc_ctrl/rtl @@ -67,6 +74,20 @@ +incdir+${CALIPTRA_ROOT}/src/hmac/rtl +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/rtl +incdir+${CALIPTRA_ROOT}/src/ecc/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl +incdir+${CALIPTRA_ROOT}/src/kmac/rtl +incdir+${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl +incdir+${CALIPTRA_ROOT}/src/edn/rtl @@ -170,6 +191,42 @@ ${CALIPTRA_ROOT}/src/integration/uvmf_caliptra_top/uvmf_template_output/verifica ${CALIPTRA_ROOT}/src/doe/rtl/doe_defines_pkg.sv ${CALIPTRA_ROOT}/src/integration/asserts/caliptra_top_sva.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/config_defines.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_params_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sva.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_macros.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_1r1w_ram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ram_regout.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_icg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_2ff_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_piso.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_slv_sif.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_AND.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_full_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_A2B_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_Boolean_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_B2A_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_mult.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_add_sub_mod.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sib_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_util_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cipher_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_ram_tdp_file.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_wrapper.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_defines_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_main_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_reg_pkg.sv @@ -316,15 +373,15 @@ ${CALIPTRA_ROOT}/src/doe/rtl/doe_reg.sv ${CALIPTRA_ROOT}/src/doe/rtl/doe_fsm.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv -${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv +${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv +${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv ${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg.sv -${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg_lfsr.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_reg_pkg.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_defines_pkg.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_params_pkg.sv @@ -348,6 +405,105 @@ ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_pe_final.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_mult_dsp.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_add_sub_mod_alter.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_shuffler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cdc_rand_delay.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_2sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_lfsr.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi4_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_diff_decode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_slicer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_count.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_dom_and_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_reg_we_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_packer_fifo.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_max_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_arb.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_intr_hw.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_onehot_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi8_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync_cnt.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_receiver.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_sender.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_arbiter_ppc.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sum_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_ext.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_edge_detector.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_round.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3pad.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly2x2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_dsp.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_reduction.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_div2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_twiddle_lookup.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_r1_lut.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_mod_2gamma2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_encode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_usehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl/skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_s1s2_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_t0_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/hintgen.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl/pkdecode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_core.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_prim.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_sec.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_pkg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv.sv diff --git a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf index 219eb6217..a2141f911 100644 --- a/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf +++ b/src/integration/uvmf_caliptra_top/config/uvmf_caliptra_top_itrng.vf @@ -41,6 +41,13 @@ +incdir+${CALIPTRA_ROOT}/src/doe/rtl +incdir+${CALIPTRA_ROOT}/src/integration/asserts +incdir+${CALIPTRA_ROOT}/src/datavault/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl +incdir+${CALIPTRA_ROOT}/src/lc_ctrl/rtl @@ -67,6 +74,20 @@ +incdir+${CALIPTRA_ROOT}/src/hmac/rtl +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/rtl +incdir+${CALIPTRA_ROOT}/src/ecc/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl ++incdir+/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl +incdir+${CALIPTRA_ROOT}/src/kmac/rtl +incdir+${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl +incdir+${CALIPTRA_ROOT}/src/edn/rtl @@ -170,6 +191,42 @@ ${CALIPTRA_ROOT}/src/integration/uvmf_caliptra_top/uvmf_template_output/verifica ${CALIPTRA_ROOT}/src/doe/rtl/doe_defines_pkg.sv ${CALIPTRA_ROOT}/src/integration/asserts/caliptra_top_sva.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/config_defines.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_params_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sva.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_macros.svh +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_1r1w_ram.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ram_regout.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_icg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_2ff_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_piso.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_ahb_slv_sif.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_AND.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_full_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_A2B_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_Boolean_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_B2A_conv.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_masked_N_bit_mult.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_libs/rtl/abr_add_sub_mod.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sib_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_util_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cipher_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_ram_tdp_file.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/tb/ntt_wrapper.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_defines_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_main_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_ack_sm_pkg.sv ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_reg_pkg.sv @@ -316,15 +373,15 @@ ${CALIPTRA_ROOT}/src/doe/rtl/doe_reg.sv ${CALIPTRA_ROOT}/src/doe/rtl/doe_fsm.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv -${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv +${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv +${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv ${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg.sv -${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg_lfsr.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_reg_pkg.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_defines_pkg.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_params_pkg.sv @@ -348,6 +405,105 @@ ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_pe_final.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_mult_dsp.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_add_sub_mod_alter.sv ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_adder.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_bounded/rtl/rej_bounded2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/rej_sampler/rtl/rej_sampler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/exp_mask/rtl/exp_mask.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball_shuffler.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sample_in_ball/rtl/sample_in_ball.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim_generic/rtl/abr_prim_generic_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_en.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_cdc_rand_delay.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop_2sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_lfsr.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi4_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_diff_decode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_slicer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_count.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sparse_fsm_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_dom_and_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sec_anchor_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_reg_we_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_packer_fifo.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_max_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_arb.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_intr_hw.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_onehot_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_mubi8_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync_cnt.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_buf.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_receiver.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_flop.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_alert_sender.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_fifo_sync.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_arbiter_ppc.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_sum_tree.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_subreg_ext.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_prim/rtl/abr_prim_edge_detector.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_round.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_keccak_2share.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3pad.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/abr_sha3/rtl/abr_sha3.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_sampler_top/rtl/mldsa_sampler_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly2x2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_butterfly.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_dsp.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_mult_reduction.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_div2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_twiddle_lookup.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/ntt_top/rtl/ntt_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_r1_lut.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_mem.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_mod_2gamma2.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_w1_encode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/decompose/rtl/decompose_usehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_encode/rtl/skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_s1s2_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sk_decode/rtl/skdecode_t0_unpack.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/hintgen.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/makehint/rtl/makehint_sample_buffer.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/norm_check/rtl/norm_check_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_encode_z/rtl/sigencode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sigdecode_h/rtl/sigdecode_h_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/sig_decode_z/rtl/sigdecode_z_unit.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/pk_decode/rtl/pkdecode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_defines_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_core.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/power2round/rtl/power2round_skencode.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl_pkg.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_prim.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_seq_sec.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_ctrl.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_top.sv +/home/ws/caliptra/kupadhyayula/ws_jan192023/chipsalliance/adams-bridge/src/mldsa_top/rtl/mldsa_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_pkg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg.sv ${CALIPTRA_ROOT}/src/datavault/rtl/dv.sv diff --git a/src/keyvault/rtl/kv_reg.sv b/src/keyvault/rtl/kv_reg.sv index 5e00aca5d..ec92042c7 100644 --- a/src/keyvault/rtl/kv_reg.sv +++ b/src/keyvault/rtl/kv_reg.sv @@ -190,10 +190,8 @@ module kv_reg ( for(genvar i0=0; i0<32; i0++) begin // Field: kv_reg.KEY_CTRL[].lock_wr always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].lock_wr.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.KEY_CTRL[i0].lock_wr.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.KEY_CTRL[i0] && decoded_req_is_wr && !(hwif_in.KEY_CTRL[i0].lock_wr.swwel)) begin // SW write next_c = (field_storage.KEY_CTRL[i0].lock_wr.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -211,10 +209,8 @@ module kv_reg ( assign hwif_out.KEY_CTRL[i0].lock_wr.value = field_storage.KEY_CTRL[i0].lock_wr.value; // Field: kv_reg.KEY_CTRL[].lock_use always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].lock_use.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.KEY_CTRL[i0].lock_use.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.KEY_CTRL[i0] && decoded_req_is_wr && !(hwif_in.KEY_CTRL[i0].lock_use.swwel)) begin // SW write next_c = (field_storage.KEY_CTRL[i0].lock_use.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -232,10 +228,8 @@ module kv_reg ( assign hwif_out.KEY_CTRL[i0].lock_use.value = field_storage.KEY_CTRL[i0].lock_use.value; // Field: kv_reg.KEY_CTRL[].clear always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].clear.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.KEY_CTRL[i0].clear.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.KEY_CTRL[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.KEY_CTRL[i0].clear.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -256,10 +250,8 @@ module kv_reg ( assign hwif_out.KEY_CTRL[i0].clear.value = field_storage.KEY_CTRL[i0].clear.value; // Field: kv_reg.KEY_CTRL[].rsvd0 always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].rsvd0.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.KEY_CTRL[i0].rsvd0.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.KEY_CTRL[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.KEY_CTRL[i0].rsvd0.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -280,10 +272,8 @@ module kv_reg ( assign hwif_out.KEY_CTRL[i0].rsvd0.value = field_storage.KEY_CTRL[i0].rsvd0.value; // Field: kv_reg.KEY_CTRL[].rsvd1 always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].rsvd1.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.KEY_CTRL[i0].rsvd1.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.KEY_CTRL[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.KEY_CTRL[i0].rsvd1.value & ~decoded_wr_biten[8:4]) | (decoded_wr_data[8:4] & decoded_wr_biten[8:4]); load_next_c = '1; @@ -301,10 +291,8 @@ module kv_reg ( assign hwif_out.KEY_CTRL[i0].rsvd1.value = field_storage.KEY_CTRL[i0].rsvd1.value; // Field: kv_reg.KEY_CTRL[].dest_valid always_comb begin - automatic logic [7:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].dest_valid.value; - load_next_c = '0; + automatic logic [7:0] next_c = field_storage.KEY_CTRL[i0].dest_valid.value; + automatic logic load_next_c = '0; if(hwif_in.KEY_CTRL[i0].dest_valid.we) begin // HW Write - we next_c = hwif_in.KEY_CTRL[i0].dest_valid.next; load_next_c = '1; @@ -325,10 +313,8 @@ module kv_reg ( assign hwif_out.KEY_CTRL[i0].dest_valid.value = field_storage.KEY_CTRL[i0].dest_valid.value; // Field: kv_reg.KEY_CTRL[].last_dword always_comb begin - automatic logic [3:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_CTRL[i0].last_dword.value; - load_next_c = '0; + automatic logic [3:0] next_c = field_storage.KEY_CTRL[i0].last_dword.value; + automatic logic load_next_c = '0; if(hwif_in.KEY_CTRL[i0].last_dword.we) begin // HW Write - we next_c = hwif_in.KEY_CTRL[i0].last_dword.next; load_next_c = '1; @@ -352,10 +338,8 @@ module kv_reg ( for(genvar i1=0; i1<12; i1++) begin // Field: kv_reg.KEY_ENTRY[][].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.KEY_ENTRY[i0][i1].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.KEY_ENTRY[i0][i1].data.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.KEY_ENTRY[i0][i1] && decoded_req_is_wr && !(hwif_in.KEY_ENTRY[i0][i1].data.swwel)) begin // SW write next_c = (field_storage.KEY_ENTRY[i0][i1].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -381,10 +365,8 @@ module kv_reg ( end // Field: kv_reg.CLEAR_SECRETS.wr_debug_values always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CLEAR_SECRETS.wr_debug_values.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CLEAR_SECRETS.wr_debug_values.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CLEAR_SECRETS && decoded_req_is_wr) begin // SW write next_c = (field_storage.CLEAR_SECRETS.wr_debug_values.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -405,10 +387,8 @@ module kv_reg ( assign hwif_out.CLEAR_SECRETS.wr_debug_values.value = field_storage.CLEAR_SECRETS.wr_debug_values.value; // Field: kv_reg.CLEAR_SECRETS.sel_debug_value always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CLEAR_SECRETS.sel_debug_value.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CLEAR_SECRETS.sel_debug_value.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CLEAR_SECRETS && decoded_req_is_wr) begin // SW write next_c = (field_storage.CLEAR_SECRETS.sel_debug_value.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -439,7 +419,7 @@ module kv_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [33-1:0][31:0] readback_array; for(genvar i0=0; i0<32; i0++) begin @@ -472,4 +452,4 @@ module kv_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.hard_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies/qvip_ahb_lite_slave_params_pkg.sv b/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies/qvip_ahb_lite_slave_params_pkg.sv index 20a6ad711..1e14209ce 100644 --- a/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies/qvip_ahb_lite_slave_params_pkg.sv +++ b/src/libs/uvmf/qvip_ahb_lite_slave_dir/config_policies/qvip_ahb_lite_slave_params_pkg.sv @@ -16,8 +16,8 @@ package qvip_ahb_lite_slave_params_pkg; localparam int AHB_NUM_MASTER_BITS = 1; localparam int AHB_NUM_SLAVES = 1; localparam int AHB_ADDRESS_WIDTH = 32; - localparam int AHB_WDATA_WIDTH = 64; - localparam int AHB_RDATA_WIDTH = 64; + localparam int AHB_WDATA_WIDTH = 32;//64; + localparam int AHB_RDATA_WIDTH = 32;//64; endclass: ahb_lite_slave_0_params typedef ahb_vip_config #(ahb_lite_slave_0_params::AHB_NUM_MASTERS,ahb_lite_slave_0_params::AHB_NUM_MASTER_BITS,ahb_lite_slave_0_params::AHB_NUM_SLAVES,ahb_lite_slave_0_params::AHB_ADDRESS_WIDTH,ahb_lite_slave_0_params::AHB_WDATA_WIDTH,ahb_lite_slave_0_params::AHB_RDATA_WIDTH) ahb_lite_slave_0_cfg_t; diff --git a/src/mldsa/rtl/mldsa_87_reg.rdl b/src/mldsa/rtl/mldsa_87_reg.rdl new file mode 100644 index 000000000..6139f482b --- /dev/null +++ b/src/mldsa/rtl/mldsa_87_reg.rdl @@ -0,0 +1,521 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + + +addrmap mldsa_87_reg { + desc="address maps for adams bridge register space"; + + + addressing = regalign; // This is the default if not specified + lsb0 = true; // lsb0 property is implicit/default. See docs for + // SystemRDL 2.0 sections 9.1 and 13.4 + + default hw = na; + signal {activelow; async; cpuif_reset; field_reset;} reset_b; + signal {activelow; async;} hard_reset_b; + signal {} mldsa_87_ready; + + + /* ----------------------- + * Register definitive definitions + * ----------------------- */ + + /* ---- MLDSA_87 Component Name ---- */ + reg { + name = "MLDSA_87 component name register type definition"; + desc = "Two 32-bit read-only registers repereseting of the name + of MLDSA_87 component. These registers are located at + MLDSA_87_base_address + 0x0000_0000 and 0x0000_0004 addresses."; + + default sw = r; + default hw = w; + field {desc = "Name field";} NAME[32]; + + } MLDSA_87_NAME[2] @0x00000000; + + + + /* ---- MLDSA_87 Component Version ---- */ + reg { + name = "MLDSA_87 component version register type definition"; + desc = "Two 32-bit read-only registers repereseting of the version + of MLDSA_87 component. These registers are located at + MLDSA_87_base_address + 0x0000_0008 and 0x0000_000C addresses."; + + default sw = r; + default hw = w; + field {desc = "Version field";} VERSION[32]; + + } MLDSA_87_VERSION[2] @0x00000008; + + + + /* ---- MLDSA_87 Component Control ---- */ + reg { + name = "MLDSA_87 component control register type definition"; + desc = "Control register to set the type of MLDSA_87 operations. + [br] bit #[1:0]: This can be: + [br] 000 for NONE + [br] 001 for KEYGEN + [br] 010 for SIGNING + [br] 011 for VERIFYING + [br] 100 for KEYGEN+SIGN + + [br] bit #3: Zeroize all internal registers after MLDSA_87 process, to avoid SCA leakage. + + This register is located at MLDSA_87_base_address + 0x0000_0010."; + + default sw = w; + default hw = r; + default resetsignal = reset_b; + field {desc = "Control command field"; swwe = mldsa_87_ready; hwclr;} CTRL[3] = 3'b0; + field {desc = "Zeroize all internal registers"; singlepulse;} ZEROIZE = 1'b0; + + } MLDSA_87_CTRL @0x00000010; + + + + /* ---- MLDSA_87 Component Status ---- */ + reg { + name = "MLDSA_87 component status register type definition"; + desc = "One 2-bit register including the following flags: + bit #0: READY : ​Indicates if the core is ready to take + a control command and process the inputs. + bit #1: VALID : ​Indicates if the process is done and the + result is valid. + This register is located at MLDSA_87_base_address + 0x0000_0018."; + + default sw = r; + default hw = w; + default resetsignal = reset_b; + field {desc = "Status ready bit";} READY = 1'b0; + field {desc = "Status valid bit";} VALID = 1'b0; + + } MLDSA_87_STATUS @0x00000018; + + + /* ---- MLDSA_87 Component Input IV ---- */ + reg { + name = "MLDSA_87 component IV register type definition"; + desc = "16 32-bit registers storing the 512-bit IV required + for SCA countermeasures with no change on the outputs. + The IV can be any 512-bit value in [0 : 2^512-1]. + These registers are located at MLDSA_87_base_address + + 0x0000_0080 to 0x0000_00BF in big-endian representation."; + + default sw = w; + default hw = r; + default resetsignal = reset_b; + field {desc = "Input IV field"; swwe = mldsa_87_ready; hwclr;} IV[32] = 32'b0; + + } MLDSA_87_IV[16] @0x00000080; + + /* ---- MLDSA_87 Component Input SEED ---- */ + reg { + name = "MLDSA_87 component seed register type definition"; + desc = "8 32-bit registers storing the 256-bit seed for keygen. + The seed can be any 256-bit value in [0 : 2^256-1]. + These registers are located at MLDSA_87_base_address + + 0x0000_0100 to 0x0000_011F in big-endian representation."; + + default sw = w; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Input seed field"; swwe = mldsa_87_ready; hwclr;} SEED[32] = 32'b0; + + } MLDSA_87_SEED[8] @0x00000100; + + + /* ---- MLDSA_87 Component Input sign_rnd ---- */ + reg { + name = "MLDSA_87 component sign_rnd register type definition"; + desc = "8 32-bit registers storing the 256-bit sign_rnd for signing. + The sign_rnd can be any 256-bit value in [0 : 2^256-1]. + sign_rnd should be all zero for deterministic variant. + These registers are located at MLDSA_87_base_address + + 0x0000_0180 to 0x0000_019F in big-endian representation."; + + default sw = w; + default hw = r; + default resetsignal = reset_b; + field {desc = "Input sign_rnd field"; swwe = mldsa_87_ready; hwclr;} SIGN_RND[32] = 32'b0; + + } MLDSA_87_SIGN_RND[8] @0x00000180; + + + /* ---- MLDSA_87 Component Input Message ---- */ + reg { + name = "MLDSA_87 component hashed message register type definition"; + desc = "16 32-bit registers storing the hash of the message. + The hashed message can be any 512-bit value in [0 : 2^512-1]. + These registers are located at MLDSA_87_base_address + + 0x0000_0200 to 0x0000_023F in big-endian representation."; + + default sw = w; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Input message field"; swwe = mldsa_87_ready; hwclr;} MSG[32] = 32'b0; + + } MLDSA_87_MSG[16] @0x00000200; + + + /* ---- MLDSA_87 Component Verify Result ---- */ + reg { + name = "MLDSA_87 component verify result register type definition"; + desc = "16 32-bit registers storing the result of verifying operation. + Firmware is responsible for comparing the computed result with + the signature, and if they are equal the signature is valid. + These registers are located at MLDSA_87_base_address + + 0x0000_0280 to 0x0000_02BF in big-endian representation."; + + default sw = r; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Output verify result field"; hwclr;} VERIFY_RES[32] = 32'b0; + + } MLDSA_87_VERIFY_RES[16] @0x00000280; + + /* ---- MLDSA_87 Component Public Key ---- */ + external reg { + name = "MLDSA_87 component public key register type definition"; + desc = "648 32-bit registers storing the public key. + These registers is read by MLDSA_87 user after keygen operation, + or be set before verifying operation. + These registers are located at MLDSA_87_base_address + + 0x0000_2900 to 0x0000_333F in big-endian representation."; + + default sw = rw; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Public key field"; swwe = mldsa_87_ready; hwclr;} PUBKEY[32] = 32'b0; + + } MLDSA_87_PUBKEY[648]; + + /* ---- MLDSA_87 Component Signature ---- */ + external reg { + name = "MLDSA_87 component signature register type definition"; + desc = "1157 32-bit registers storing the signature of the message. + These registers is read by MLDSA_87 user after signing operation, + or be set before verifying operation. + These registers are located at MLDSA_87_base_address + + 0x0000_3400 to 0x0000_45F3 in big-endian representation."; + + default sw = rw; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Signature field"; swwe = mldsa_87_ready; hwclr;} SIGNATURE[32] = 32'b0; + + } MLDSA_87_SIGNATURE[1157]; + + /* ---- MLDSA_87 Component Private Key OUT---- */ + external mem { + name = "MLDSA_87 component private key output register type definition"; + desc = "1224 32-bit registers storing the private key for keygen. + These registers is read by MLDSA_87 user after keygen operation. + These registers are located at MLDSA_87_base_address + + 0x0000_0300 to 0x0000_161F in big-endian representation."; + + sw = r; + mementries = 1224; + memwidth = 32; + } MLDSA_87_PRIVKEY_OUT; + + /* ---- MLDSA_87 Component Private Key IN---- */ + external mem { + name = "MLDSA_87 component private key input register type definition"; + desc = "1224 32-bit entries storing the private key for signing. + These entries must be set before signing operation. + These registers are located at MLDSA_87_base_address + + 0x0000_1600 to 0x0000_2900 in big-endian representation."; + + sw = w; + mementries = 1224; + memwidth = 32; + } MLDSA_87_PRIVKEY_IN; + + + //////////////////////////////////////////////////////////////// + // Interrupts + /* ----------------------- + * Register File definitive definition + * ----------------------- */ + + // Notifications are non-error events that occur during normal operation of the module. + // E.g. a completion of a job may produce a notification. + // Error and notification events are separated into separate status/trigger registers + // to allow effective priority allocation by software + regfile intr_block_t { + + + /* ----------------------- + * Default properties for Register File + * ----------------------- */ + + name = "Interrupt Register Block"; + desc = "Set of registers to implement interrupt functionality + for MLDSA_87"; + + default regwidth = 32; // reg property + default accesswidth = 32; // reg property + default hw = na; // field property + + + /* ----------------------- + * Register definitive definitions + * ----------------------- */ + + /* ---- Global Interrupt Enable ---- */ + reg global_intr_en_t { + name = "Per-Type Interrupt Enable Register"; + desc = "Dedicated register with one bit for each event type that may produce an interrupt."; + + default hw = na; + default sw = rw; + + // Global enablement (for interrupts of the event types defined for this module) + field {desc = "Global enable bit for all events of type 'Error'"; } error_en = 1'b0; + field {desc = "Global enable bit for all events of type 'Notification'";} notif_en = 1'b0; + }; + + /* ---- Error Interrupt Enable ---- */ + reg error_intr_en_t { + name = "Per-Event Interrupt Enable Register"; + desc = "Dedicated register with one bit for each event that may produce an interrupt."; + + default hw = na; + default sw = rw; + + // Specific enables for the events defined in this + // event type in the instantiating peripheral. + // TODO: Add en, sts, trig, cnt for all tracked errors + field {desc = "Enable bit for Internal Errors"; } error_internal_en = 1'b0; + }; + + /* ---- Notification Interrupt Enable ---- */ + reg notif_intr_en_t { + name = "Per-Event Interrupt Enable Register"; + desc = "Dedicated register with one bit for each event that may produce an interrupt."; + + default hw = na; + default sw = rw; + + // Specific enables for the events defined in this + // event type in the instantiating peripheral. + field {desc = "Enable bit for Command Done";} notif_cmd_done_en = 1'b0; + }; + + /* ---- Error Interrupt Status ---- */ + reg error_intr_t { + name = "Interrupt Status Register type definition"; + desc = "Single bit indicating occurrence of each interrupt event. + Sticky, level assertion, write-1-to-clear."; + + default precedence = hw; + default hw = w; + default hwset = true; + default sw = rw; + default woclr = true; + default level intr; + + field {desc = "Internal Errors status bit"; } error_internal_sts = 1'b0; + }; + + /* ---- Notification Interrupt Status ---- */ + reg notif_intr_t { + name = "Interrupt Status Register type definition"; + desc = "Single bit indicating occurrence of each interrupt event. + Sticky, level assertion, write-1-to-clear."; + + default precedence = hw; + default hw = w; + default hwset = true; + default sw = rw; + default woclr = true; + default level intr; + + field {desc = "Command Done status bit";} notif_cmd_done_sts = 1'b0; + }; + + /* ---- Aggregated Interrupt Status ---- */ + reg global_intr_t { + name = "Interrupt Status Aggregation Register type definition"; + desc = "Single bit indicating occurrence of any interrupt event + of a given type. E.g. Notifications and Errors may drive + to two separate interrupt registers. There may be + multiple sources of Notifications or Errors that are + aggregated into a single interrupt pin for that + respective type. That pin feeds through this register + in order to apply a global enablement of that interrupt + event type. + Nonsticky assertion."; + + default hw = w; + default sw = r; + default nonsticky intr; + + field {desc = "Interrupt Event Aggregation status bit";} agg_sts = 1'b0; + }; + + /* ---- Error Interrupt Trigger ---- */ + reg error_intr_trig_t { + name = "Interrupt Trigger Register type definition"; + desc = "Single bit for each interrupt event allows SW to manually + trigger occurrence of that event. Upon SW write, the trigger bit + will pulse for 1 cycle then clear to 0. The pulse on the + trigger register bit results in the corresponding interrupt + status bit being set to 1."; + + default hw = na; + default sw = rw; + default woset = true; + default singlepulse = true; + + // Instantiate triggers bit-by-bit. + field {desc = "Internal Errors trigger bit"; } error_internal_trig = 1'b0; + }; + + /* ---- Notification Interrupt Trigger ---- */ + reg notif_intr_trig_t { + name = "Interrupt Trigger Register type definition"; + desc = "Single bit for each interrupt event allows SW to manually + trigger occurrence of that event. Upon SW write, the trigger bit + will pulse for 1 cycle then clear to 0. The pulse on the + trigger register bit results in the corresponding interrupt + status bit being set to 1."; + + default hw = na; + default sw = rw; + default woset = true; + default singlepulse = true; + + // Instantiate triggers bit-by-bit. + field {desc = "Command Done trigger bit";} notif_cmd_done_trig = 1'b0; + }; + + /* ---- Interrupt Statistics Counter Incrementor ---- */ + reg intr_count_incr_t { + name = "Interrupt Event Count Incrementor"; + desc = "Trigger the event counter to increment based on observing + the rising edge of an interrupt event input from the + Hardware. The same input signal that causes an interrupt + event to be set (sticky) also causes this signal to pulse + for 1 clock cycle, resulting in the event counter + incrementing by 1 for every interrupt event. + This is implemented as a down-counter (1-bit) that will + decrement immediately on being set - resulting in a pulse"; + + default hw = w; + default sw = r; // Has to have some access.... ideally SW wouldn't even see this + default hwset = true; + default decrvalue = 1; + default counter; + + field {desc = "Pulse mirrors interrupt event occurrence";} pulse = 1'b0; + }; + + /* ---- Interrupt Statistics Counter ---- */ + reg intr_count_t { + name = "Interrupt Event Counter"; + desc = "Provides statistics about the number of events that have + occurred. + Will not overflow ('incrsaturate')."; + + default sw = rw; + default hw = na; + default incrvalue = 1; + default incrsaturate = true; + default counter; + + field {desc = "Count field";} cnt[32] = 32'h0; + }; + + + /* ------------------------------------------------- Registers ------------------------------------------------- */ + // First 9 registers are static and always defined // + global_intr_en_t global_intr_en_r; /* 1-bit per event type */ // + error_intr_en_t error_intr_en_r; /* 1-bit per error */ // + notif_intr_en_t notif_intr_en_r; /* 1-bit per notification */ // + global_intr_t error_global_intr_r; /* 1-bit aggregating all error interrupts with global enable */ // + global_intr_t notif_global_intr_r; /* 1-bit aggregating all notification interrupts with global enable */ // + error_intr_t error_internal_intr_r; /* Error pending, SW write 1 to clear */ // + notif_intr_t notif_internal_intr_r; /* Notification pending, SW write 1 to clear */ // + error_intr_trig_t error_intr_trig_r; /* SW sets error bit for interrupt testing */ // + notif_intr_trig_t notif_intr_trig_r; /* SW sets notification bit for interrupt testing */ // + // + // Align this set of registers; number of counters is based on peripheral event requirements // + intr_count_t error_internal_intr_count_r @0x100; /* Per error */ // + intr_count_t notif_cmd_done_intr_count_r @0x180; /* Per notification */ // + // + // These registers should be treated by SW as reserved, and ignored. // + // Offset at 0x200 gives enough space for 32 Errors and 32 Notifications // + // to be implemented (requiring 2*32 32-bit registers starting at // + // offset 0x100), and still allowing the entire regfile to fit // + // inside a 1024-byte space. // + intr_count_incr_t error_internal_intr_count_incr_r @0x200; /* Per error count incrementor pulse */ // + intr_count_incr_t notif_cmd_done_intr_count_incr_r; /* Per notification count incrementor pulse */ // + /* ------------------------------------------------------------------------------------------------------------- */ + + /* ---- Reset assignment for Error Events ---- */ + error_internal_intr_r.error_internal_sts -> resetsignal = hard_reset_b; + error_internal_intr_count_r.cnt -> resetsignal = hard_reset_b; + // TODO: Use this same reset for the error incrementor pulse too? + + /* ---- Interrupt Event Dynamic Assignments ---- */ + error_internal_intr_r.error_internal_sts -> enable = error_intr_en_r.error_internal_en; + notif_internal_intr_r.notif_cmd_done_sts -> enable = notif_intr_en_r.notif_cmd_done_en; + + error_internal_intr_r.error_internal_sts -> next = error_intr_trig_r.error_internal_trig; + notif_internal_intr_r.notif_cmd_done_sts -> next = notif_intr_trig_r.notif_cmd_done_trig; + + // NOTE: hwset for events is implicitly defined as module input + + /* ---- Global Interrupt Dynamic Assignments ---- */ + error_global_intr_r.agg_sts -> enable = global_intr_en_r.error_en; + notif_global_intr_r.agg_sts -> enable = global_intr_en_r.notif_en; + + error_global_intr_r.agg_sts -> next = error_internal_intr_r -> intr; + notif_global_intr_r.agg_sts -> next = notif_internal_intr_r -> intr; + + /* ---- Event Statistics Tracker Assignments ---- */ + // NOTE: This method relies upon a "counter" that is set using the + // same events that trigger an interrupt, then immediately + // self-clearing, which results in a pulse. Must be configured + // to be sensitive to the interrupt trigger events for each event. + // The output pulse is then used to increment the ACTUAL counter + error_internal_intr_count_incr_r.pulse -> hwset = error_internal_intr_r.error_internal_sts -> hwset; // \_____ Capture both firmware and hardware triggered events + error_internal_intr_count_incr_r.pulse -> next = error_internal_intr_r.error_internal_sts -> next; // / as a pulse to increment the intr_count_r register + error_internal_intr_count_incr_r.pulse -> we = error_internal_intr_r.error_internal_sts -> next; // Generate a pulse from SW trigger, if set, or default to use the hwset input + error_internal_intr_count_incr_r.pulse -> decr = error_internal_intr_count_incr_r.pulse; // Auto-clear to generate pulse output + error_internal_intr_count_r.cnt -> incr = error_internal_intr_count_incr_r.pulse; // Increment coincides with rising edge of interrupt sts bit + + notif_cmd_done_intr_count_incr_r.pulse -> hwset = notif_internal_intr_r.notif_cmd_done_sts -> hwset; // \_____ Capture both firmware and hardware triggered events + notif_cmd_done_intr_count_incr_r.pulse -> next = notif_internal_intr_r.notif_cmd_done_sts -> next; // / as a pulse to increment the intr_count_r register + notif_cmd_done_intr_count_incr_r.pulse -> we = notif_internal_intr_r.notif_cmd_done_sts -> next; // Generate a pulse from SW trigger, if set, or default to use the hwset input + notif_cmd_done_intr_count_incr_r.pulse -> decr = notif_cmd_done_intr_count_incr_r.pulse; // Auto-clear to generate pulse output + notif_cmd_done_intr_count_r.cnt -> incr = notif_cmd_done_intr_count_incr_r.pulse; // Increment coincides with rising edge of interrupt sts bit + + }; + + + /* ----------------------- + * Register File instance + * ----------------------- */ + intr_block_t intr_block_rf @0x6000; +}; \ No newline at end of file diff --git a/src/mldsa/rtl/mldsa_reg.rdl b/src/mldsa/rtl/mldsa_reg.rdl new file mode 100644 index 000000000..28cb666a2 --- /dev/null +++ b/src/mldsa/rtl/mldsa_reg.rdl @@ -0,0 +1,500 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// + + +addrmap mldsa_reg { + desc="address maps for adams bridge register space"; + + + addressing = regalign; // This is the default if not specified + lsb0 = true; // lsb0 property is implicit/default. See docs for + // SystemRDL 2.0 sections 9.1 and 13.4 + + default hw = na; + signal {activelow; async; cpuif_reset; field_reset;} reset_b; + signal {activelow; async;} hard_reset_b; + signal {} mldsa_ready; + + + /* ----------------------- + * Register definitive definitions + * ----------------------- */ + + /* ---- MLDSA Component Name ---- */ + reg { + name = "MLDSA component name register type definition"; + desc = "Two 32-bit read-only registers representing of the name + of MLDSA component."; + + default sw = r; + default hw = w; + field {desc = "Name field";} NAME[32]; + + } MLDSA_NAME[2]; + + + + /* ---- MLDSA Component Version ---- */ + reg { + name = "MLDSA component version register type definition"; + desc = "Two 32-bit read-only registers representing of the version + of MLDSA component."; + + default sw = r; + default hw = w; + field {desc = "Version field";} VERSION[32]; + + } MLDSA_VERSION[2]; + + + + /* ---- MLDSA Component Control ---- */ + reg { + name = "MLDSA component control register type definition"; + desc = "Control register to set the type of MLDSA operations. + [br] bit #[1:0]: This can be: + [br] 000 for NONE + [br] 001 for KEYGEN + [br] 010 for SIGNING + [br] 011 for VERIFYING + [br] 100 for KEYGEN+SIGN + + [br] bit #3: Zeroize all internal registers after MLDSA process, to avoid SCA leakage. + "; + + default sw = w; + default hw = r; + default resetsignal = reset_b; + field {desc = "Control command field"; swwe = mldsa_ready; hwclr;} CTRL[3] = 3'b0; + field {desc = "Zeroize all internal registers"; singlepulse;} ZEROIZE = 1'b0; + + } MLDSA_CTRL; + + + + /* ---- MLDSA Component Status ---- */ + reg { + name = "MLDSA component status register type definition"; + desc = "One 2-bit register including the following flags: + bit #0: READY : ​Indicates if the core is ready to take + a control command and process the inputs. + bit #1: VALID : ​Indicates if the process is done and the + result is valid. + "; + + default sw = r; + default hw = w; + default resetsignal = reset_b; + field {desc = "Status ready bit";} READY = 1'b0; + field {desc = "Status valid bit";} VALID = 1'b0; + + } MLDSA_STATUS; + + + /* ---- MLDSA Component Input ENTROPY ---- */ + reg { + name = "MLDSA component entropy register type definition"; + desc = "16 32-bit registers storing the 512-bit entropy in big-endian representation + required for SCA countermeasures with no change on the outputs. + The entropy can be any 512-bit value in [0 : 2^512-1]."; + + default sw = w; + default hw = r; + default resetsignal = reset_b; + field {desc = "Input entropy field"; swwe = mldsa_ready; hwclr;} ENTROPY[32] = 32'b0; + + } MLDSA_ENTROPY[16]; + + /* ---- MLDSA Component Input SEED ---- */ + reg { + name = "MLDSA component seed register type definition"; + desc = "8 32-bit registers storing the 256-bit seed for keygen in big-endian representation. + The seed can be any 256-bit value in [0 : 2^256-1]."; + + default sw = w; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Input seed field"; swwe = mldsa_ready; hwclr;} SEED[32] = 32'b0; + + } MLDSA_SEED[8]; + + + /* ---- MLDSA Component Input sign_rnd ---- */ + reg { + name = "MLDSA component sign_rnd register type definition"; + desc = "8 32-bit registers storing the 256-bit sign_rnd for signing in big-endian representation. + The sign_rnd can be any 256-bit value in [0 : 2^256-1]. + sign_rnd should be all zero for deterministic variant."; + + default sw = w; + default hw = r; + default resetsignal = reset_b; + field {desc = "Input sign_rnd field"; swwe = mldsa_ready; hwclr;} SIGN_RND[32] = 32'b0; + + } MLDSA_SIGN_RND[8]; + + + /* ---- MLDSA Component Input Message ---- */ + reg { + name = "MLDSA component hashed message register type definition"; + desc = "16 32-bit registers storing the hash of the message in big-endian representation. + The hashed message can be any 512-bit value in [0 : 2^512-1]."; + + default sw = w; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Input message field"; swwe = mldsa_ready; hwclr;} MSG[32] = 32'b0; + + } MLDSA_MSG[16]; + + + /* ---- MLDSA Component Verify Result ---- */ + reg { + name = "MLDSA component verify result register type definition"; + desc = "16 32-bit registers storing the result of verifying operation in big-endian representation. + If this register is equal to the first part of the given signature, i.e. c~, + the signature is verified."; + + default sw = r; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Output verify result field"; hwclr;} VERIFY_RES[32] = 32'b0; + + } MLDSA_VERIFY_RES[16]; + + /* ---- MLDSA Component Public Key ---- */ + external reg { + name = "MLDSA component public key register type definition"; + desc = "648 32-bit registers storing the public key in big-endian representation. + These registers are read by MLDSA user after keygen operation, + or set before verifying operation."; + + default sw = rw; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Public key field"; swwe = mldsa_ready; hwclr;} PUBKEY[32] = 32'b0; + + } MLDSA_PUBKEY[648]; + + /* ---- MLDSA Component Signature ---- */ + external reg { + name = "MLDSA component signature register type definition"; + desc = "1157 32-bit registers storing the signature of the message in big-endian representation. + These registers are read by MLDSA user after signing operation, + or set before verifying operation."; + + default sw = rw; + default hw = rw; + default we = true; + default resetsignal = reset_b; + field {desc = "Signature field"; swwe = mldsa_ready; hwclr;} SIGNATURE[32] = 32'b0; + + } MLDSA_SIGNATURE[1157]; + + /* ---- MLDSA Component Private Key OUT---- */ + external mem { + name = "MLDSA component private key output register type definition"; + desc = "1224 32-bit registers storing the private key for keygen in big-endian representation. + These registers are read by MLDSA user after keygen operation."; + + sw = r; + mementries = 1224; + memwidth = 32; + } MLDSA_PRIVKEY_OUT; + + /* ---- MLDSA Component Private Key IN---- */ + external mem { + name = "MLDSA component private key input register type definition"; + desc = "1224 32-bit entries storing the private key for signing in big-endian representation. + These entries must be set before signing operation."; + + sw = w; + mementries = 1224; + memwidth = 32; + } MLDSA_PRIVKEY_IN; + + + //////////////////////////////////////////////////////////////// + // Interrupts + /* ----------------------- + * Register File definitive definition + * ----------------------- */ + + // Notifications are non-error events that occur during normal operation of the module. + // E.g. a completion of a job may produce a notification. + // Error and notification events are separated into separate status/trigger registers + // to allow effective priority allocation by software + regfile intr_block_t { + + + /* ----------------------- + * Default properties for Register File + * ----------------------- */ + + name = "Interrupt Register Block"; + desc = "Set of registers to implement interrupt functionality + for MLDSA"; + + default regwidth = 32; // reg property + default accesswidth = 32; // reg property + default hw = na; // field property + + + /* ----------------------- + * Register definitive definitions + * ----------------------- */ + + /* ---- Global Interrupt Enable ---- */ + reg global_intr_en_t { + name = "Per-Type Interrupt Enable Register"; + desc = "Dedicated register with one bit for each event type that may produce an interrupt."; + + default hw = na; + default sw = rw; + + // Global enablement (for interrupts of the event types defined for this module) + field {desc = "Global enable bit for all events of type 'Error'"; } error_en = 1'b0; + field {desc = "Global enable bit for all events of type 'Notification'";} notif_en = 1'b0; + }; + + /* ---- Error Interrupt Enable ---- */ + reg error_intr_en_t { + name = "Per-Event Interrupt Enable Register"; + desc = "Dedicated register with one bit for each event that may produce an interrupt."; + + default hw = na; + default sw = rw; + + // Specific enables for the events defined in this + // event type in the instantiating peripheral. + // TODO: Add en, sts, trig, cnt for all tracked errors + field {desc = "Enable bit for Internal Errors"; } error_internal_en = 1'b0; + }; + + /* ---- Notification Interrupt Enable ---- */ + reg notif_intr_en_t { + name = "Per-Event Interrupt Enable Register"; + desc = "Dedicated register with one bit for each event that may produce an interrupt."; + + default hw = na; + default sw = rw; + + // Specific enables for the events defined in this + // event type in the instantiating peripheral. + field {desc = "Enable bit for Command Done";} notif_cmd_done_en = 1'b0; + }; + + /* ---- Error Interrupt Status ---- */ + reg error_intr_t { + name = "Interrupt Status Register type definition"; + desc = "Single bit indicating occurrence of each interrupt event. + Sticky, level assertion, write-1-to-clear."; + + default precedence = hw; + default hw = w; + default hwset = true; + default sw = rw; + default woclr = true; + default level intr; + + field {desc = "Internal Errors status bit"; } error_internal_sts = 1'b0; + }; + + /* ---- Notification Interrupt Status ---- */ + reg notif_intr_t { + name = "Interrupt Status Register type definition"; + desc = "Single bit indicating occurrence of each interrupt event. + Sticky, level assertion, write-1-to-clear."; + + default precedence = hw; + default hw = w; + default hwset = true; + default sw = rw; + default woclr = true; + default level intr; + + field {desc = "Command Done status bit";} notif_cmd_done_sts = 1'b0; + }; + + /* ---- Aggregated Interrupt Status ---- */ + reg global_intr_t { + name = "Interrupt Status Aggregation Register type definition"; + desc = "Single bit indicating occurrence of any interrupt event + of a given type. E.g. Notifications and Errors may drive + to two separate interrupt registers. There may be + multiple sources of Notifications or Errors that are + aggregated into a single interrupt pin for that + respective type. That pin feeds through this register + in order to apply a global enablement of that interrupt + event type. + Nonsticky assertion."; + + default hw = w; + default sw = r; + default nonsticky intr; + + field {desc = "Interrupt Event Aggregation status bit";} agg_sts = 1'b0; + }; + + /* ---- Error Interrupt Trigger ---- */ + reg error_intr_trig_t { + name = "Interrupt Trigger Register type definition"; + desc = "Single bit for each interrupt event allows SW to manually + trigger occurrence of that event. Upon SW write, the trigger bit + will pulse for 1 cycle then clear to 0. The pulse on the + trigger register bit results in the corresponding interrupt + status bit being set to 1."; + + default hw = na; + default sw = rw; + default woset = true; + default singlepulse = true; + + // Instantiate triggers bit-by-bit. + field {desc = "Internal Errors trigger bit"; } error_internal_trig = 1'b0; + }; + + /* ---- Notification Interrupt Trigger ---- */ + reg notif_intr_trig_t { + name = "Interrupt Trigger Register type definition"; + desc = "Single bit for each interrupt event allows SW to manually + trigger occurrence of that event. Upon SW write, the trigger bit + will pulse for 1 cycle then clear to 0. The pulse on the + trigger register bit results in the corresponding interrupt + status bit being set to 1."; + + default hw = na; + default sw = rw; + default woset = true; + default singlepulse = true; + + // Instantiate triggers bit-by-bit. + field {desc = "Command Done trigger bit";} notif_cmd_done_trig = 1'b0; + }; + + /* ---- Interrupt Statistics Counter Incrementor ---- */ + reg intr_count_incr_t { + name = "Interrupt Event Count Incrementor"; + desc = "Trigger the event counter to increment based on observing + the rising edge of an interrupt event input from the + Hardware. The same input signal that causes an interrupt + event to be set (sticky) also causes this signal to pulse + for 1 clock cycle, resulting in the event counter + incrementing by 1 for every interrupt event. + This is implemented as a down-counter (1-bit) that will + decrement immediately on being set - resulting in a pulse"; + + default hw = w; + default sw = r; // Has to have some access.... ideally SW wouldn't even see this + default hwset = true; + default decrvalue = 1; + default counter; + + field {desc = "Pulse mirrors interrupt event occurrence";} pulse = 1'b0; + }; + + /* ---- Interrupt Statistics Counter ---- */ + reg intr_count_t { + name = "Interrupt Event Counter"; + desc = "Provides statistics about the number of events that have + occurred. + Will not overflow ('incrsaturate')."; + + default sw = rw; + default hw = na; + default incrvalue = 1; + default incrsaturate = true; + default counter; + + field {desc = "Count field";} cnt[32] = 32'h0; + }; + + + /* ------------------------------------------------- Registers ------------------------------------------------- */ + // First 9 registers are static and always defined // + global_intr_en_t global_intr_en_r; /* 1-bit per event type */ // + error_intr_en_t error_intr_en_r; /* 1-bit per error */ // + notif_intr_en_t notif_intr_en_r; /* 1-bit per notification */ // + global_intr_t error_global_intr_r; /* 1-bit aggregating all error interrupts with global enable */ // + global_intr_t notif_global_intr_r; /* 1-bit aggregating all notification interrupts with global enable */ // + error_intr_t error_internal_intr_r; /* Error pending, SW write 1 to clear */ // + notif_intr_t notif_internal_intr_r; /* Notification pending, SW write 1 to clear */ // + error_intr_trig_t error_intr_trig_r; /* SW sets error bit for interrupt testing */ // + notif_intr_trig_t notif_intr_trig_r; /* SW sets notification bit for interrupt testing */ // + // + // Align this set of registers; number of counters is based on peripheral event requirements // + intr_count_t error_internal_intr_count_r @0x100; /* Per error */ // + intr_count_t notif_cmd_done_intr_count_r @0x180; /* Per notification */ // + // + // These registers should be treated by SW as reserved, and ignored. // + // Offset at 0x200 gives enough space for 32 Errors and 32 Notifications // + // to be implemented (requiring 2*32 32-bit registers starting at // + // offset 0x100), and still allowing the entire regfile to fit // + // inside a 1024-byte space. // + intr_count_incr_t error_internal_intr_count_incr_r @0x200; /* Per error count incrementor pulse */ // + intr_count_incr_t notif_cmd_done_intr_count_incr_r; /* Per notification count incrementor pulse */ // + /* ------------------------------------------------------------------------------------------------------------- */ + + /* ---- Reset assignment for Error Events ---- */ + error_internal_intr_r.error_internal_sts -> resetsignal = hard_reset_b; + error_internal_intr_count_r.cnt -> resetsignal = hard_reset_b; + // TODO: Use this same reset for the error incrementor pulse too? + + /* ---- Interrupt Event Dynamic Assignments ---- */ + error_internal_intr_r.error_internal_sts -> enable = error_intr_en_r.error_internal_en; + notif_internal_intr_r.notif_cmd_done_sts -> enable = notif_intr_en_r.notif_cmd_done_en; + + error_internal_intr_r.error_internal_sts -> next = error_intr_trig_r.error_internal_trig; + notif_internal_intr_r.notif_cmd_done_sts -> next = notif_intr_trig_r.notif_cmd_done_trig; + + // NOTE: hwset for events is implicitly defined as module input + + /* ---- Global Interrupt Dynamic Assignments ---- */ + error_global_intr_r.agg_sts -> enable = global_intr_en_r.error_en; + notif_global_intr_r.agg_sts -> enable = global_intr_en_r.notif_en; + + error_global_intr_r.agg_sts -> next = error_internal_intr_r -> intr; + notif_global_intr_r.agg_sts -> next = notif_internal_intr_r -> intr; + + /* ---- Event Statistics Tracker Assignments ---- */ + // NOTE: This method relies upon a "counter" that is set using the + // same events that trigger an interrupt, then immediately + // self-clearing, which results in a pulse. Must be configured + // to be sensitive to the interrupt trigger events for each event. + // The output pulse is then used to increment the ACTUAL counter + error_internal_intr_count_incr_r.pulse -> hwset = error_internal_intr_r.error_internal_sts -> hwset; // \_____ Capture both firmware and hardware triggered events + error_internal_intr_count_incr_r.pulse -> next = error_internal_intr_r.error_internal_sts -> next; // / as a pulse to increment the intr_count_r register + error_internal_intr_count_incr_r.pulse -> we = error_internal_intr_r.error_internal_sts -> next; // Generate a pulse from SW trigger, if set, or default to use the hwset input + error_internal_intr_count_incr_r.pulse -> decr = error_internal_intr_count_incr_r.pulse; // Auto-clear to generate pulse output + error_internal_intr_count_r.cnt -> incr = error_internal_intr_count_incr_r.pulse; // Increment coincides with rising edge of interrupt sts bit + + notif_cmd_done_intr_count_incr_r.pulse -> hwset = notif_internal_intr_r.notif_cmd_done_sts -> hwset; // \_____ Capture both firmware and hardware triggered events + notif_cmd_done_intr_count_incr_r.pulse -> next = notif_internal_intr_r.notif_cmd_done_sts -> next; // / as a pulse to increment the intr_count_r register + notif_cmd_done_intr_count_incr_r.pulse -> we = notif_internal_intr_r.notif_cmd_done_sts -> next; // Generate a pulse from SW trigger, if set, or default to use the hwset input + notif_cmd_done_intr_count_incr_r.pulse -> decr = notif_cmd_done_intr_count_incr_r.pulse; // Auto-clear to generate pulse output + notif_cmd_done_intr_count_r.cnt -> incr = notif_cmd_done_intr_count_incr_r.pulse; // Increment coincides with rising edge of interrupt sts bit + + }; + + + /* ----------------------- + * Register File instance + * ----------------------- */ + intr_block_t intr_block_rf @0x6000; +}; \ No newline at end of file diff --git a/src/mldsa/rtl/mldsa_reg.sv b/src/mldsa/rtl/mldsa_reg.sv new file mode 100644 index 000000000..621b71063 --- /dev/null +++ b/src/mldsa/rtl/mldsa_reg.sv @@ -0,0 +1,1069 @@ +// Generated by PeakRDL-regblock - A free and open-source SystemVerilog generator +// https://github.com/SystemRDL/PeakRDL-regblock + +module mldsa_reg ( + input wire clk, + input wire rst, + + input wire s_cpuif_req, + input wire s_cpuif_req_is_wr, + input wire [14:0] s_cpuif_addr, + input wire [31:0] s_cpuif_wr_data, + input wire [31:0] s_cpuif_wr_biten, + output wire s_cpuif_req_stall_wr, + output wire s_cpuif_req_stall_rd, + output wire s_cpuif_rd_ack, + output wire s_cpuif_rd_err, + output wire [31:0] s_cpuif_rd_data, + output wire s_cpuif_wr_ack, + output wire s_cpuif_wr_err, + + input mldsa_reg_pkg::mldsa_reg__in_t hwif_in, + output mldsa_reg_pkg::mldsa_reg__out_t hwif_out + ); + + //-------------------------------------------------------------------------- + // CPU Bus interface logic + //-------------------------------------------------------------------------- + logic cpuif_req; + logic cpuif_req_is_wr; + logic [14:0] cpuif_addr; + logic [31:0] cpuif_wr_data; + logic [31:0] cpuif_wr_biten; + logic cpuif_req_stall_wr; + logic cpuif_req_stall_rd; + + logic cpuif_rd_ack; + logic cpuif_rd_err; + logic [31:0] cpuif_rd_data; + + logic cpuif_wr_ack; + logic cpuif_wr_err; + + assign cpuif_req = s_cpuif_req; + assign cpuif_req_is_wr = s_cpuif_req_is_wr; + assign cpuif_addr = s_cpuif_addr; + assign cpuif_wr_data = s_cpuif_wr_data; + assign cpuif_wr_biten = s_cpuif_wr_biten; + assign s_cpuif_req_stall_wr = cpuif_req_stall_wr; + assign s_cpuif_req_stall_rd = cpuif_req_stall_rd; + assign s_cpuif_rd_ack = cpuif_rd_ack; + assign s_cpuif_rd_err = cpuif_rd_err; + assign s_cpuif_rd_data = cpuif_rd_data; + assign s_cpuif_wr_ack = cpuif_wr_ack; + assign s_cpuif_wr_err = cpuif_wr_err; + + logic cpuif_req_masked; + logic external_req; + logic external_pending; + logic external_wr_ack; + logic external_rd_ack; + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + external_pending <= '0; + end else begin + if(external_req & ~external_wr_ack & ~external_rd_ack) external_pending <= '1; + else if(external_wr_ack | external_rd_ack) external_pending <= '0; + assert(!external_wr_ack || (external_pending | external_req)) + else $error("An external wr_ack strobe was asserted when no external request was active"); + assert(!external_rd_ack || (external_pending | external_req)) + else $error("An external rd_ack strobe was asserted when no external request was active"); + end + end + + // Read & write latencies are balanced. Stalls not required + // except if external + assign cpuif_req_stall_rd = external_pending; + assign cpuif_req_stall_wr = external_pending; + assign cpuif_req_masked = cpuif_req + & !(!cpuif_req_is_wr & cpuif_req_stall_rd) + & !(cpuif_req_is_wr & cpuif_req_stall_wr); + + //-------------------------------------------------------------------------- + // Address Decode + //-------------------------------------------------------------------------- + typedef struct packed{ + logic [2-1:0]MLDSA_NAME; + logic [2-1:0]MLDSA_VERSION; + logic MLDSA_CTRL; + logic MLDSA_STATUS; + logic [16-1:0]MLDSA_ENTROPY; + logic [8-1:0]MLDSA_SEED; + logic [8-1:0]MLDSA_SIGN_RND; + logic [16-1:0]MLDSA_MSG; + logic [16-1:0]MLDSA_VERIFY_RES; + logic [648-1:0]MLDSA_PUBKEY; + logic [1157-1:0]MLDSA_SIGNATURE; + logic MLDSA_PRIVKEY_OUT; + logic MLDSA_PRIVKEY_IN; + struct packed{ + logic global_intr_en_r; + logic error_intr_en_r; + logic notif_intr_en_r; + logic error_global_intr_r; + logic notif_global_intr_r; + logic error_internal_intr_r; + logic notif_internal_intr_r; + logic error_intr_trig_r; + logic notif_intr_trig_r; + logic error_internal_intr_count_r; + logic notif_cmd_done_intr_count_r; + logic error_internal_intr_count_incr_r; + logic notif_cmd_done_intr_count_incr_r; + } intr_block_rf; + } decoded_reg_strb_t; + decoded_reg_strb_t decoded_reg_strb; + logic decoded_strb_is_external; + + logic [14:0] decoded_addr; + + logic decoded_req; + logic decoded_req_is_wr; + logic [31:0] decoded_wr_data; + logic [31:0] decoded_wr_biten; + + always_comb begin + automatic logic is_external = '0; + + for(int i0=0; i0<2; i0++) begin + decoded_reg_strb.MLDSA_NAME[i0] = cpuif_req_masked & (cpuif_addr == 15'h0 + i0*15'h4); + end + for(int i0=0; i0<2; i0++) begin + decoded_reg_strb.MLDSA_VERSION[i0] = cpuif_req_masked & (cpuif_addr == 15'h8 + i0*15'h4); + end + decoded_reg_strb.MLDSA_CTRL = cpuif_req_masked & (cpuif_addr == 15'h10); + decoded_reg_strb.MLDSA_STATUS = cpuif_req_masked & (cpuif_addr == 15'h14); + for(int i0=0; i0<16; i0++) begin + decoded_reg_strb.MLDSA_ENTROPY[i0] = cpuif_req_masked & (cpuif_addr == 15'h18 + i0*15'h4); + end + for(int i0=0; i0<8; i0++) begin + decoded_reg_strb.MLDSA_SEED[i0] = cpuif_req_masked & (cpuif_addr == 15'h58 + i0*15'h4); + end + for(int i0=0; i0<8; i0++) begin + decoded_reg_strb.MLDSA_SIGN_RND[i0] = cpuif_req_masked & (cpuif_addr == 15'h78 + i0*15'h4); + end + for(int i0=0; i0<16; i0++) begin + decoded_reg_strb.MLDSA_MSG[i0] = cpuif_req_masked & (cpuif_addr == 15'h98 + i0*15'h4); + end + for(int i0=0; i0<16; i0++) begin + decoded_reg_strb.MLDSA_VERIFY_RES[i0] = cpuif_req_masked & (cpuif_addr == 15'hd8 + i0*15'h4); + end + for(int i0=0; i0<648; i0++) begin + decoded_reg_strb.MLDSA_PUBKEY[i0] = cpuif_req_masked & (cpuif_addr == 15'h118 + i0*15'h4); + is_external |= cpuif_req_masked & (cpuif_addr == 15'h118 + i0*15'h4); + end + for(int i0=0; i0<1157; i0++) begin + decoded_reg_strb.MLDSA_SIGNATURE[i0] = cpuif_req_masked & (cpuif_addr == 15'hb38 + i0*15'h4); + is_external |= cpuif_req_masked & (cpuif_addr == 15'hb38 + i0*15'h4); + end + decoded_reg_strb.MLDSA_PRIVKEY_OUT = cpuif_req_masked & (cpuif_addr >= 15'h2000) & (cpuif_addr <= 15'h2000 + 15'h131f); + is_external |= cpuif_req_masked & (cpuif_addr >= 15'h2000) & (cpuif_addr <= 15'h2000 + 15'h131f); + decoded_reg_strb.MLDSA_PRIVKEY_IN = cpuif_req_masked & (cpuif_addr >= 15'h4000) & (cpuif_addr <= 15'h4000 + 15'h131f); + is_external |= cpuif_req_masked & (cpuif_addr >= 15'h4000) & (cpuif_addr <= 15'h4000 + 15'h131f); + decoded_reg_strb.intr_block_rf.global_intr_en_r = cpuif_req_masked & (cpuif_addr == 15'h6000); + decoded_reg_strb.intr_block_rf.error_intr_en_r = cpuif_req_masked & (cpuif_addr == 15'h6004); + decoded_reg_strb.intr_block_rf.notif_intr_en_r = cpuif_req_masked & (cpuif_addr == 15'h6008); + decoded_reg_strb.intr_block_rf.error_global_intr_r = cpuif_req_masked & (cpuif_addr == 15'h600c); + decoded_reg_strb.intr_block_rf.notif_global_intr_r = cpuif_req_masked & (cpuif_addr == 15'h6010); + decoded_reg_strb.intr_block_rf.error_internal_intr_r = cpuif_req_masked & (cpuif_addr == 15'h6014); + decoded_reg_strb.intr_block_rf.notif_internal_intr_r = cpuif_req_masked & (cpuif_addr == 15'h6018); + decoded_reg_strb.intr_block_rf.error_intr_trig_r = cpuif_req_masked & (cpuif_addr == 15'h601c); + decoded_reg_strb.intr_block_rf.notif_intr_trig_r = cpuif_req_masked & (cpuif_addr == 15'h6020); + decoded_reg_strb.intr_block_rf.error_internal_intr_count_r = cpuif_req_masked & (cpuif_addr == 15'h6100); + decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r = cpuif_req_masked & (cpuif_addr == 15'h6180); + decoded_reg_strb.intr_block_rf.error_internal_intr_count_incr_r = cpuif_req_masked & (cpuif_addr == 15'h6200); + decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_incr_r = cpuif_req_masked & (cpuif_addr == 15'h6204); + decoded_strb_is_external = is_external; + external_req = is_external; + + end + + // Pass down signals to next stage + assign decoded_addr = cpuif_addr; + + assign decoded_req = cpuif_req_masked; + assign decoded_req_is_wr = cpuif_req_is_wr; + assign decoded_wr_data = cpuif_wr_data; + assign decoded_wr_biten = cpuif_wr_biten; + + //-------------------------------------------------------------------------- + // Field logic + //-------------------------------------------------------------------------- + typedef struct packed{ + struct packed{ + struct packed{ + logic [2:0] next; + logic load_next; + } CTRL; + struct packed{ + logic next; + logic load_next; + } ZEROIZE; + } MLDSA_CTRL; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + } ENTROPY; + } [16-1:0]MLDSA_ENTROPY; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + } SEED; + } [8-1:0]MLDSA_SEED; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + } SIGN_RND; + } [8-1:0]MLDSA_SIGN_RND; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + } MSG; + } [16-1:0]MLDSA_MSG; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + } VERIFY_RES; + } [16-1:0]MLDSA_VERIFY_RES; + struct packed{ + struct packed{ + struct packed{ + logic next; + logic load_next; + } error_en; + struct packed{ + logic next; + logic load_next; + } notif_en; + } global_intr_en_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } error_internal_en; + } error_intr_en_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } notif_cmd_done_en; + } notif_intr_en_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } agg_sts; + } error_global_intr_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } agg_sts; + } notif_global_intr_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } error_internal_sts; + } error_internal_intr_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } notif_cmd_done_sts; + } notif_internal_intr_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } error_internal_trig; + } error_intr_trig_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + } notif_cmd_done_trig; + } notif_intr_trig_r; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + logic incrthreshold; + logic incrsaturate; + } cnt; + } error_internal_intr_count_r; + struct packed{ + struct packed{ + logic [31:0] next; + logic load_next; + logic incrthreshold; + logic incrsaturate; + } cnt; + } notif_cmd_done_intr_count_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + logic decrthreshold; + logic underflow; + } pulse; + } error_internal_intr_count_incr_r; + struct packed{ + struct packed{ + logic next; + logic load_next; + logic decrthreshold; + logic underflow; + } pulse; + } notif_cmd_done_intr_count_incr_r; + } intr_block_rf; + } field_combo_t; + field_combo_t field_combo; + + typedef struct packed{ + struct packed{ + struct packed{ + logic [2:0] value; + } CTRL; + struct packed{ + logic value; + } ZEROIZE; + } MLDSA_CTRL; + struct packed{ + struct packed{ + logic [31:0] value; + } ENTROPY; + } [16-1:0]MLDSA_ENTROPY; + struct packed{ + struct packed{ + logic [31:0] value; + } SEED; + } [8-1:0]MLDSA_SEED; + struct packed{ + struct packed{ + logic [31:0] value; + } SIGN_RND; + } [8-1:0]MLDSA_SIGN_RND; + struct packed{ + struct packed{ + logic [31:0] value; + } MSG; + } [16-1:0]MLDSA_MSG; + struct packed{ + struct packed{ + logic [31:0] value; + } VERIFY_RES; + } [16-1:0]MLDSA_VERIFY_RES; + struct packed{ + struct packed{ + struct packed{ + logic value; + } error_en; + struct packed{ + logic value; + } notif_en; + } global_intr_en_r; + struct packed{ + struct packed{ + logic value; + } error_internal_en; + } error_intr_en_r; + struct packed{ + struct packed{ + logic value; + } notif_cmd_done_en; + } notif_intr_en_r; + struct packed{ + struct packed{ + logic value; + } agg_sts; + } error_global_intr_r; + struct packed{ + struct packed{ + logic value; + } agg_sts; + } notif_global_intr_r; + struct packed{ + struct packed{ + logic value; + } error_internal_sts; + } error_internal_intr_r; + struct packed{ + struct packed{ + logic value; + } notif_cmd_done_sts; + } notif_internal_intr_r; + struct packed{ + struct packed{ + logic value; + } error_internal_trig; + } error_intr_trig_r; + struct packed{ + struct packed{ + logic value; + } notif_cmd_done_trig; + } notif_intr_trig_r; + struct packed{ + struct packed{ + logic [31:0] value; + } cnt; + } error_internal_intr_count_r; + struct packed{ + struct packed{ + logic [31:0] value; + } cnt; + } notif_cmd_done_intr_count_r; + struct packed{ + struct packed{ + logic value; + } pulse; + } error_internal_intr_count_incr_r; + struct packed{ + struct packed{ + logic value; + } pulse; + } notif_cmd_done_intr_count_incr_r; + } intr_block_rf; + } field_storage_t; + field_storage_t field_storage; + + // Field: mldsa_reg.MLDSA_CTRL.CTRL + always_comb begin + automatic logic [2:0] next_c = field_storage.MLDSA_CTRL.CTRL.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.MLDSA_CTRL && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write + next_c = (field_storage.MLDSA_CTRL.CTRL.value & ~decoded_wr_biten[2:0]) | (decoded_wr_data[2:0] & decoded_wr_biten[2:0]); + load_next_c = '1; + end else if(hwif_in.MLDSA_CTRL.CTRL.hwclr) begin // HW Clear + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_CTRL.CTRL.next = next_c; + field_combo.MLDSA_CTRL.CTRL.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_CTRL.CTRL.value <= 3'h0; + end else if(field_combo.MLDSA_CTRL.CTRL.load_next) begin + field_storage.MLDSA_CTRL.CTRL.value <= field_combo.MLDSA_CTRL.CTRL.next; + end + end + assign hwif_out.MLDSA_CTRL.CTRL.value = field_storage.MLDSA_CTRL.CTRL.value; + // Field: mldsa_reg.MLDSA_CTRL.ZEROIZE + always_comb begin + automatic logic [0:0] next_c = field_storage.MLDSA_CTRL.ZEROIZE.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.MLDSA_CTRL && decoded_req_is_wr) begin // SW write + next_c = (field_storage.MLDSA_CTRL.ZEROIZE.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); + load_next_c = '1; + end else begin // singlepulse clears back to 0 + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_CTRL.ZEROIZE.next = next_c; + field_combo.MLDSA_CTRL.ZEROIZE.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_CTRL.ZEROIZE.value <= 1'h0; + end else if(field_combo.MLDSA_CTRL.ZEROIZE.load_next) begin + field_storage.MLDSA_CTRL.ZEROIZE.value <= field_combo.MLDSA_CTRL.ZEROIZE.next; + end + end + assign hwif_out.MLDSA_CTRL.ZEROIZE.value = field_storage.MLDSA_CTRL.ZEROIZE.value; + for(genvar i0=0; i0<16; i0++) begin + // Field: mldsa_reg.MLDSA_ENTROPY[].ENTROPY + always_comb begin + automatic logic [31:0] next_c = field_storage.MLDSA_ENTROPY[i0].ENTROPY.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.MLDSA_ENTROPY[i0] && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write + next_c = (field_storage.MLDSA_ENTROPY[i0].ENTROPY.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + load_next_c = '1; + end else if(hwif_in.MLDSA_ENTROPY[i0].ENTROPY.hwclr) begin // HW Clear + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_ENTROPY[i0].ENTROPY.next = next_c; + field_combo.MLDSA_ENTROPY[i0].ENTROPY.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_ENTROPY[i0].ENTROPY.value <= 32'h0; + end else if(field_combo.MLDSA_ENTROPY[i0].ENTROPY.load_next) begin + field_storage.MLDSA_ENTROPY[i0].ENTROPY.value <= field_combo.MLDSA_ENTROPY[i0].ENTROPY.next; + end + end + assign hwif_out.MLDSA_ENTROPY[i0].ENTROPY.value = field_storage.MLDSA_ENTROPY[i0].ENTROPY.value; + end + for(genvar i0=0; i0<8; i0++) begin + // Field: mldsa_reg.MLDSA_SEED[].SEED + always_comb begin + automatic logic [31:0] next_c = field_storage.MLDSA_SEED[i0].SEED.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.MLDSA_SEED[i0] && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write + next_c = (field_storage.MLDSA_SEED[i0].SEED.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + load_next_c = '1; + end else if(hwif_in.MLDSA_SEED[i0].SEED.we) begin // HW Write - we + next_c = hwif_in.MLDSA_SEED[i0].SEED.next; + load_next_c = '1; + end else if(hwif_in.MLDSA_SEED[i0].SEED.hwclr) begin // HW Clear + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_SEED[i0].SEED.next = next_c; + field_combo.MLDSA_SEED[i0].SEED.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_SEED[i0].SEED.value <= 32'h0; + end else if(field_combo.MLDSA_SEED[i0].SEED.load_next) begin + field_storage.MLDSA_SEED[i0].SEED.value <= field_combo.MLDSA_SEED[i0].SEED.next; + end + end + assign hwif_out.MLDSA_SEED[i0].SEED.value = field_storage.MLDSA_SEED[i0].SEED.value; + end + for(genvar i0=0; i0<8; i0++) begin + // Field: mldsa_reg.MLDSA_SIGN_RND[].SIGN_RND + always_comb begin + automatic logic [31:0] next_c = field_storage.MLDSA_SIGN_RND[i0].SIGN_RND.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.MLDSA_SIGN_RND[i0] && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write + next_c = (field_storage.MLDSA_SIGN_RND[i0].SIGN_RND.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + load_next_c = '1; + end else if(hwif_in.MLDSA_SIGN_RND[i0].SIGN_RND.hwclr) begin // HW Clear + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_SIGN_RND[i0].SIGN_RND.next = next_c; + field_combo.MLDSA_SIGN_RND[i0].SIGN_RND.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_SIGN_RND[i0].SIGN_RND.value <= 32'h0; + end else if(field_combo.MLDSA_SIGN_RND[i0].SIGN_RND.load_next) begin + field_storage.MLDSA_SIGN_RND[i0].SIGN_RND.value <= field_combo.MLDSA_SIGN_RND[i0].SIGN_RND.next; + end + end + assign hwif_out.MLDSA_SIGN_RND[i0].SIGN_RND.value = field_storage.MLDSA_SIGN_RND[i0].SIGN_RND.value; + end + for(genvar i0=0; i0<16; i0++) begin + // Field: mldsa_reg.MLDSA_MSG[].MSG + always_comb begin + automatic logic [31:0] next_c = field_storage.MLDSA_MSG[i0].MSG.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.MLDSA_MSG[i0] && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write + next_c = (field_storage.MLDSA_MSG[i0].MSG.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + load_next_c = '1; + end else if(hwif_in.MLDSA_MSG[i0].MSG.we) begin // HW Write - we + next_c = hwif_in.MLDSA_MSG[i0].MSG.next; + load_next_c = '1; + end else if(hwif_in.MLDSA_MSG[i0].MSG.hwclr) begin // HW Clear + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_MSG[i0].MSG.next = next_c; + field_combo.MLDSA_MSG[i0].MSG.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_MSG[i0].MSG.value <= 32'h0; + end else if(field_combo.MLDSA_MSG[i0].MSG.load_next) begin + field_storage.MLDSA_MSG[i0].MSG.value <= field_combo.MLDSA_MSG[i0].MSG.next; + end + end + assign hwif_out.MLDSA_MSG[i0].MSG.value = field_storage.MLDSA_MSG[i0].MSG.value; + end + for(genvar i0=0; i0<16; i0++) begin + // Field: mldsa_reg.MLDSA_VERIFY_RES[].VERIFY_RES + always_comb begin + automatic logic [31:0] next_c = field_storage.MLDSA_VERIFY_RES[i0].VERIFY_RES.value; + automatic logic load_next_c = '0; + if(hwif_in.MLDSA_VERIFY_RES[i0].VERIFY_RES.we) begin // HW Write - we + next_c = hwif_in.MLDSA_VERIFY_RES[i0].VERIFY_RES.next; + load_next_c = '1; + end else if(hwif_in.MLDSA_VERIFY_RES[i0].VERIFY_RES.hwclr) begin // HW Clear + next_c = '0; + load_next_c = '1; + end + field_combo.MLDSA_VERIFY_RES[i0].VERIFY_RES.next = next_c; + field_combo.MLDSA_VERIFY_RES[i0].VERIFY_RES.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.MLDSA_VERIFY_RES[i0].VERIFY_RES.value <= 32'h0; + end else if(field_combo.MLDSA_VERIFY_RES[i0].VERIFY_RES.load_next) begin + field_storage.MLDSA_VERIFY_RES[i0].VERIFY_RES.value <= field_combo.MLDSA_VERIFY_RES[i0].VERIFY_RES.next; + end + end + assign hwif_out.MLDSA_VERIFY_RES[i0].VERIFY_RES.value = field_storage.MLDSA_VERIFY_RES[i0].VERIFY_RES.value; + end + for(genvar i0=0; i0<648; i0++) begin + + assign hwif_out.MLDSA_PUBKEY[i0].req = decoded_reg_strb.MLDSA_PUBKEY[i0]; + assign hwif_out.MLDSA_PUBKEY[i0].req_is_wr = decoded_req_is_wr; + assign hwif_out.MLDSA_PUBKEY[i0].wr_data = decoded_wr_data; + assign hwif_out.MLDSA_PUBKEY[i0].wr_biten = decoded_wr_biten; + end + for(genvar i0=0; i0<1157; i0++) begin + + assign hwif_out.MLDSA_SIGNATURE[i0].req = decoded_reg_strb.MLDSA_SIGNATURE[i0]; + assign hwif_out.MLDSA_SIGNATURE[i0].req_is_wr = decoded_req_is_wr; + assign hwif_out.MLDSA_SIGNATURE[i0].wr_data = decoded_wr_data; + assign hwif_out.MLDSA_SIGNATURE[i0].wr_biten = decoded_wr_biten; + end + assign hwif_out.MLDSA_PRIVKEY_OUT.req = decoded_reg_strb.MLDSA_PRIVKEY_OUT; + assign hwif_out.MLDSA_PRIVKEY_OUT.addr = decoded_addr[12:0]; + assign hwif_out.MLDSA_PRIVKEY_OUT.req_is_wr = decoded_req_is_wr; + assign hwif_out.MLDSA_PRIVKEY_OUT.wr_data = decoded_wr_data; + assign hwif_out.MLDSA_PRIVKEY_OUT.wr_biten = decoded_wr_biten; + assign hwif_out.MLDSA_PRIVKEY_IN.req = decoded_reg_strb.MLDSA_PRIVKEY_IN; + assign hwif_out.MLDSA_PRIVKEY_IN.addr = decoded_addr[12:0]; + assign hwif_out.MLDSA_PRIVKEY_IN.req_is_wr = decoded_req_is_wr; + assign hwif_out.MLDSA_PRIVKEY_IN.wr_data = decoded_wr_data; + assign hwif_out.MLDSA_PRIVKEY_IN.wr_biten = decoded_wr_biten; + // Field: mldsa_reg.intr_block_rf.global_intr_en_r.error_en + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write + next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end + field_combo.intr_block_rf.global_intr_en_r.error_en.next = next_c; + field_combo.intr_block_rf.global_intr_en_r.error_en.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.global_intr_en_r.error_en.value <= 1'h0; + end else if(field_combo.intr_block_rf.global_intr_en_r.error_en.load_next) begin + field_storage.intr_block_rf.global_intr_en_r.error_en.value <= field_combo.intr_block_rf.global_intr_en_r.error_en.next; + end + end + // Field: mldsa_reg.intr_block_rf.global_intr_en_r.notif_en + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write + next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); + load_next_c = '1; + end + field_combo.intr_block_rf.global_intr_en_r.notif_en.next = next_c; + field_combo.intr_block_rf.global_intr_en_r.notif_en.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.global_intr_en_r.notif_en.value <= 1'h0; + end else if(field_combo.intr_block_rf.global_intr_en_r.notif_en.load_next) begin + field_storage.intr_block_rf.global_intr_en_r.notif_en.value <= field_combo.intr_block_rf.global_intr_en_r.notif_en.next; + end + end + // Field: mldsa_reg.intr_block_rf.error_intr_en_r.error_internal_en + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write + next_c = (field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end + field_combo.intr_block_rf.error_intr_en_r.error_internal_en.next = next_c; + field_combo.intr_block_rf.error_intr_en_r.error_internal_en.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value <= 1'h0; + end else if(field_combo.intr_block_rf.error_intr_en_r.error_internal_en.load_next) begin + field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value <= field_combo.intr_block_rf.error_intr_en_r.error_internal_en.next; + end + end + // Field: mldsa_reg.intr_block_rf.notif_intr_en_r.notif_cmd_done_en + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr) begin // SW write + next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end + field_combo.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.next = next_c; + field_combo.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value <= 1'h0; + end else if(field_combo.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.load_next) begin + field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value <= field_combo.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.next; + end + end + // Field: mldsa_reg.intr_block_rf.error_global_intr_r.agg_sts + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; + + // HW Write + next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; + load_next_c = '1; + field_combo.intr_block_rf.error_global_intr_r.agg_sts.next = next_c; + field_combo.intr_block_rf.error_global_intr_r.agg_sts.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.error_global_intr_r.agg_sts.value <= 1'h0; + end else if(field_combo.intr_block_rf.error_global_intr_r.agg_sts.load_next) begin + field_storage.intr_block_rf.error_global_intr_r.agg_sts.value <= field_combo.intr_block_rf.error_global_intr_r.agg_sts.next; + end + end + assign hwif_out.intr_block_rf.error_global_intr_r.intr = + |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); + // Field: mldsa_reg.intr_block_rf.notif_global_intr_r.agg_sts + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; + + // HW Write + next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; + load_next_c = '1; + field_combo.intr_block_rf.notif_global_intr_r.agg_sts.next = next_c; + field_combo.intr_block_rf.notif_global_intr_r.agg_sts.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value <= 1'h0; + end else if(field_combo.intr_block_rf.notif_global_intr_r.agg_sts.load_next) begin + field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value <= field_combo.intr_block_rf.notif_global_intr_r.agg_sts.next; + end + end + assign hwif_out.intr_block_rf.notif_global_intr_r.intr = + |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); + // Field: mldsa_reg.intr_block_rf.error_internal_intr_r.error_internal_sts + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value; + automatic logic load_next_c = '0; + if(field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value != '0) begin // stickybit + next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; + load_next_c = '1; + end else if(hwif_in.intr_block_rf.error_internal_intr_r.error_internal_sts.hwset) begin // HW Set + next_c = '1; + load_next_c = '1; + end else if(decoded_reg_strb.intr_block_rf.error_internal_intr_r && decoded_req_is_wr) begin // SW write 1 clear + next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value & ~(decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end + field_combo.intr_block_rf.error_internal_intr_r.error_internal_sts.next = next_c; + field_combo.intr_block_rf.error_internal_intr_r.error_internal_sts.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.hard_reset_b) begin + if(~hwif_in.hard_reset_b) begin + field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value <= 1'h0; + end else if(field_combo.intr_block_rf.error_internal_intr_r.error_internal_sts.load_next) begin + field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value <= field_combo.intr_block_rf.error_internal_intr_r.error_internal_sts.next; + end + end + assign hwif_out.intr_block_rf.error_internal_intr_r.intr = + |(field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value & field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value); + // Field: mldsa_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; + if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit + next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + load_next_c = '1; + end else if(hwif_in.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.hwset) begin // HW Set + next_c = '1; + load_next_c = '1; + end else if(decoded_reg_strb.intr_block_rf.notif_internal_intr_r && decoded_req_is_wr) begin // SW write 1 clear + next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & ~(decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end + field_combo.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.next = next_c; + field_combo.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value <= 1'h0; + end else if(field_combo.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.load_next) begin + field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value <= field_combo.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.next; + end + end + assign hwif_out.intr_block_rf.notif_internal_intr_r.intr = + |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); + // Field: mldsa_reg.intr_block_rf.error_intr_trig_r.error_internal_trig + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set + next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end else begin // singlepulse clears back to 0 + next_c = '0; + load_next_c = '1; + end + field_combo.intr_block_rf.error_intr_trig_r.error_internal_trig.next = next_c; + field_combo.intr_block_rf.error_intr_trig_r.error_internal_trig.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value <= 1'h0; + end else if(field_combo.intr_block_rf.error_intr_trig_r.error_internal_trig.load_next) begin + field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value <= field_combo.intr_block_rf.error_intr_trig_r.error_internal_trig.next; + end + end + // Field: mldsa_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set + next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + load_next_c = '1; + end else begin // singlepulse clears back to 0 + next_c = '0; + load_next_c = '1; + end + field_combo.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.next = next_c; + field_combo.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value <= 1'h0; + end else if(field_combo.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.load_next) begin + field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value <= field_combo.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.next; + end + end + // Field: mldsa_reg.intr_block_rf.error_internal_intr_count_r.cnt + always_comb begin + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.error_internal_intr_count_r && decoded_req_is_wr) begin // SW write + next_c = (field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + load_next_c = '1; + end + if(field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value) begin // increment + if(((33)'(next_c) + 32'h1) > 32'hffffffff) begin // up-counter saturated + next_c = 32'hffffffff; + end else begin + next_c = next_c + 32'h1; + end + load_next_c = '1; + end + field_combo.intr_block_rf.error_internal_intr_count_r.cnt.incrthreshold = (field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value >= 32'hffffffff); + field_combo.intr_block_rf.error_internal_intr_count_r.cnt.incrsaturate = (field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value >= 32'hffffffff); + if(next_c > 32'hffffffff) begin + next_c = 32'hffffffff; + load_next_c = '1; + end + field_combo.intr_block_rf.error_internal_intr_count_r.cnt.next = next_c; + field_combo.intr_block_rf.error_internal_intr_count_r.cnt.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.hard_reset_b) begin + if(~hwif_in.hard_reset_b) begin + field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value <= 32'h0; + end else if(field_combo.intr_block_rf.error_internal_intr_count_r.cnt.load_next) begin + field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value <= field_combo.intr_block_rf.error_internal_intr_count_r.cnt.next; + end + end + // Field: mldsa_reg.intr_block_rf.notif_cmd_done_intr_count_r.cnt + always_comb begin + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr) begin // SW write + next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + load_next_c = '1; + end + if(field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value) begin // increment + if(((33)'(next_c) + 32'h1) > 32'hffffffff) begin // up-counter saturated + next_c = 32'hffffffff; + end else begin + next_c = next_c + 32'h1; + end + load_next_c = '1; + end + field_combo.intr_block_rf.notif_cmd_done_intr_count_r.cnt.incrthreshold = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value >= 32'hffffffff); + field_combo.intr_block_rf.notif_cmd_done_intr_count_r.cnt.incrsaturate = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value >= 32'hffffffff); + if(next_c > 32'hffffffff) begin + next_c = 32'hffffffff; + load_next_c = '1; + end + field_combo.intr_block_rf.notif_cmd_done_intr_count_r.cnt.next = next_c; + field_combo.intr_block_rf.notif_cmd_done_intr_count_r.cnt.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value <= 32'h0; + end else if(field_combo.intr_block_rf.notif_cmd_done_intr_count_r.cnt.load_next) begin + field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value <= field_combo.intr_block_rf.notif_cmd_done_intr_count_r.cnt.next; + end + end + // Field: mldsa_reg.intr_block_rf.error_internal_intr_count_incr_r.pulse + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; + if(field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value) begin // HW Write - we + next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; + load_next_c = '1; + end else if(hwif_in.intr_block_rf.error_internal_intr_r.error_internal_sts.hwset) begin // HW Set + next_c = '1; + load_next_c = '1; + end + if(field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value) begin // decrement + field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.underflow = (next_c < (1'h1)); + next_c = next_c - 1'h1; + load_next_c = '1; + end else begin + field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.underflow = '0; + end + field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.decrthreshold = (field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value <= 1'd0); + field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.next = next_c; + field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value <= 1'h0; + end else if(field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.load_next) begin + field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value <= field_combo.intr_block_rf.error_internal_intr_count_incr_r.pulse.next; + end + end + // Field: mldsa_reg.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse + always_comb begin + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; + if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we + next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + load_next_c = '1; + end else if(hwif_in.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.hwset) begin // HW Set + next_c = '1; + load_next_c = '1; + end + if(field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value) begin // decrement + field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.underflow = (next_c < (1'h1)); + next_c = next_c - 1'h1; + load_next_c = '1; + end else begin + field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.underflow = '0; + end + field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.decrthreshold = (field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value <= 1'd0); + field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.next = next_c; + field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.reset_b) begin + if(~hwif_in.reset_b) begin + field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value <= 1'h0; + end else if(field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.load_next) begin + field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value <= field_combo.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.next; + end + end + + //-------------------------------------------------------------------------- + // Write response + //-------------------------------------------------------------------------- + always_comb begin + automatic logic wr_ack; + wr_ack = '0; + for(int i0=0; i0<648; i0++) begin + wr_ack |= hwif_in.MLDSA_PUBKEY[i0].wr_ack; + end + for(int i0=0; i0<1157; i0++) begin + wr_ack |= hwif_in.MLDSA_SIGNATURE[i0].wr_ack; + end + wr_ack |= hwif_in.MLDSA_PRIVKEY_OUT.wr_ack; + wr_ack |= hwif_in.MLDSA_PRIVKEY_IN.wr_ack; + external_wr_ack = wr_ack; + end + assign cpuif_wr_ack = external_wr_ack | (decoded_req & decoded_req_is_wr & ~decoded_strb_is_external); + // Writes are always granted with no error response + assign cpuif_wr_err = '0; + + //-------------------------------------------------------------------------- + // Readback + //-------------------------------------------------------------------------- + logic readback_external_rd_ack_c; + always_comb begin + automatic logic rd_ack; + rd_ack = '0; + for(int i0=0; i0<648; i0++) begin + rd_ack |= hwif_in.MLDSA_PUBKEY[i0].rd_ack; + end + for(int i0=0; i0<1157; i0++) begin + rd_ack |= hwif_in.MLDSA_SIGNATURE[i0].rd_ack; + end + rd_ack |= hwif_in.MLDSA_PRIVKEY_OUT.rd_ack; + rd_ack |= hwif_in.MLDSA_PRIVKEY_IN.rd_ack; + readback_external_rd_ack_c = rd_ack; + end + + logic readback_external_rd_ack; + + assign readback_external_rd_ack = readback_external_rd_ack_c; + + logic readback_err; + logic readback_done; + logic [31:0] readback_data; + + // Assign readback values to a flattened array + logic [1841-1:0][31:0] readback_array; + for(genvar i0=0; i0<2; i0++) begin + assign readback_array[i0*1 + 0][31:0] = (decoded_reg_strb.MLDSA_NAME[i0] && !decoded_req_is_wr) ? hwif_in.MLDSA_NAME[i0].NAME.next : '0; + end + for(genvar i0=0; i0<2; i0++) begin + assign readback_array[i0*1 + 2][31:0] = (decoded_reg_strb.MLDSA_VERSION[i0] && !decoded_req_is_wr) ? hwif_in.MLDSA_VERSION[i0].VERSION.next : '0; + end + assign readback_array[4][0:0] = (decoded_reg_strb.MLDSA_STATUS && !decoded_req_is_wr) ? hwif_in.MLDSA_STATUS.READY.next : '0; + assign readback_array[4][1:1] = (decoded_reg_strb.MLDSA_STATUS && !decoded_req_is_wr) ? hwif_in.MLDSA_STATUS.VALID.next : '0; + assign readback_array[4][31:2] = '0; + for(genvar i0=0; i0<16; i0++) begin + assign readback_array[i0*1 + 5][31:0] = (decoded_reg_strb.MLDSA_VERIFY_RES[i0] && !decoded_req_is_wr) ? field_storage.MLDSA_VERIFY_RES[i0].VERIFY_RES.value : '0; + end + for(genvar i0=0; i0<648; i0++) begin + assign readback_array[i0*1 + 21] = hwif_in.MLDSA_PUBKEY[i0].rd_ack ? hwif_in.MLDSA_PUBKEY[i0].rd_data : '0; + end + for(genvar i0=0; i0<1157; i0++) begin + assign readback_array[i0*1 + 669] = hwif_in.MLDSA_SIGNATURE[i0].rd_ack ? hwif_in.MLDSA_SIGNATURE[i0].rd_data : '0; + end + assign readback_array[1826] = hwif_in.MLDSA_PRIVKEY_OUT.rd_ack ? hwif_in.MLDSA_PRIVKEY_OUT.rd_data : '0; + assign readback_array[1827] = hwif_in.MLDSA_PRIVKEY_IN.rd_ack ? hwif_in.MLDSA_PRIVKEY_IN.rd_data : '0; + assign readback_array[1828][0:0] = (decoded_reg_strb.intr_block_rf.global_intr_en_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.global_intr_en_r.error_en.value : '0; + assign readback_array[1828][1:1] = (decoded_reg_strb.intr_block_rf.global_intr_en_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.global_intr_en_r.notif_en.value : '0; + assign readback_array[1828][31:2] = '0; + assign readback_array[1829][0:0] = (decoded_reg_strb.intr_block_rf.error_intr_en_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value : '0; + assign readback_array[1829][31:1] = '0; + assign readback_array[1830][0:0] = (decoded_reg_strb.intr_block_rf.notif_intr_en_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value : '0; + assign readback_array[1830][31:1] = '0; + assign readback_array[1831][0:0] = (decoded_reg_strb.intr_block_rf.error_global_intr_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.error_global_intr_r.agg_sts.value : '0; + assign readback_array[1831][31:1] = '0; + assign readback_array[1832][0:0] = (decoded_reg_strb.intr_block_rf.notif_global_intr_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value : '0; + assign readback_array[1832][31:1] = '0; + assign readback_array[1833][0:0] = (decoded_reg_strb.intr_block_rf.error_internal_intr_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value : '0; + assign readback_array[1833][31:1] = '0; + assign readback_array[1834][0:0] = (decoded_reg_strb.intr_block_rf.notif_internal_intr_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value : '0; + assign readback_array[1834][31:1] = '0; + assign readback_array[1835][0:0] = (decoded_reg_strb.intr_block_rf.error_intr_trig_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value : '0; + assign readback_array[1835][31:1] = '0; + assign readback_array[1836][0:0] = (decoded_reg_strb.intr_block_rf.notif_intr_trig_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value : '0; + assign readback_array[1836][31:1] = '0; + assign readback_array[1837][31:0] = (decoded_reg_strb.intr_block_rf.error_internal_intr_count_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value : '0; + assign readback_array[1838][31:0] = (decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value : '0; + assign readback_array[1839][0:0] = (decoded_reg_strb.intr_block_rf.error_internal_intr_count_incr_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value : '0; + assign readback_array[1839][31:1] = '0; + assign readback_array[1840][0:0] = (decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_incr_r && !decoded_req_is_wr) ? field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value : '0; + assign readback_array[1840][31:1] = '0; + + // Reduce the array + always_comb begin + automatic logic [31:0] readback_data_var; + readback_done = decoded_req & ~decoded_req_is_wr & ~decoded_strb_is_external; + readback_err = '0; + readback_data_var = '0; + for(int i=0; i<1841; i++) readback_data_var |= readback_array[i]; + readback_data = readback_data_var; + end + + assign external_rd_ack = readback_external_rd_ack; + assign cpuif_rd_ack = readback_done | readback_external_rd_ack; + assign cpuif_rd_data = readback_data; + assign cpuif_rd_err = readback_err; + +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.hard_reset_b) + +endmodule \ No newline at end of file diff --git a/src/mldsa/rtl/mldsa_reg_pkg.sv b/src/mldsa/rtl/mldsa_reg_pkg.sv new file mode 100644 index 000000000..151dcd1c2 --- /dev/null +++ b/src/mldsa/rtl/mldsa_reg_pkg.sv @@ -0,0 +1,279 @@ +// Generated by PeakRDL-regblock - A free and open-source SystemVerilog generator +// https://github.com/SystemRDL/PeakRDL-regblock + +package mldsa_reg_pkg; + + localparam MLDSA_REG_DATA_WIDTH = 32; + localparam MLDSA_REG_MIN_ADDR_WIDTH = 15; + + typedef struct packed{ + logic [31:0] next; + } mldsa_reg__MLDSA_NAME__NAME__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_NAME__NAME__in_t NAME; + } mldsa_reg__MLDSA_NAME__in_t; + + typedef struct packed{ + logic [31:0] next; + } mldsa_reg__MLDSA_VERSION__VERSION__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_VERSION__VERSION__in_t VERSION; + } mldsa_reg__MLDSA_VERSION__in_t; + + typedef struct packed{ + logic hwclr; + } mldsa_reg__MLDSA_CTRL__CTRL__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_CTRL__CTRL__in_t CTRL; + } mldsa_reg__MLDSA_CTRL__in_t; + + typedef struct packed{ + logic next; + } mldsa_reg__MLDSA_STATUS__READY__in_t; + + typedef struct packed{ + logic next; + } mldsa_reg__MLDSA_STATUS__VALID__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_STATUS__READY__in_t READY; + mldsa_reg__MLDSA_STATUS__VALID__in_t VALID; + } mldsa_reg__MLDSA_STATUS__in_t; + + typedef struct packed{ + logic hwclr; + } mldsa_reg__MLDSA_ENTROPY__ENTROPY__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_ENTROPY__ENTROPY__in_t ENTROPY; + } mldsa_reg__MLDSA_ENTROPY__in_t; + + typedef struct packed{ + logic [31:0] next; + logic we; + logic hwclr; + } mldsa_reg__MLDSA_SEED__SEED__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_SEED__SEED__in_t SEED; + } mldsa_reg__MLDSA_SEED__in_t; + + typedef struct packed{ + logic hwclr; + } mldsa_reg__MLDSA_SIGN_RND__SIGN_RND__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_SIGN_RND__SIGN_RND__in_t SIGN_RND; + } mldsa_reg__MLDSA_SIGN_RND__in_t; + + typedef struct packed{ + logic [31:0] next; + logic we; + logic hwclr; + } mldsa_reg__MLDSA_MSG__MSG__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_MSG__MSG__in_t MSG; + } mldsa_reg__MLDSA_MSG__in_t; + + typedef struct packed{ + logic [31:0] next; + logic we; + logic hwclr; + } mldsa_reg__MLDSA_VERIFY_RES__VERIFY_RES__in_t; + + typedef struct packed{ + mldsa_reg__MLDSA_VERIFY_RES__VERIFY_RES__in_t VERIFY_RES; + } mldsa_reg__MLDSA_VERIFY_RES__in_t; + + typedef struct packed{ + logic rd_ack; + logic [31:0] rd_data; + logic wr_ack; + } mldsa_reg__MLDSA_PUBKEY__external__in_t; + + typedef struct packed{ + logic rd_ack; + logic [31:0] rd_data; + logic wr_ack; + } mldsa_reg__MLDSA_SIGNATURE__external__in_t; + + typedef struct packed{ + logic rd_ack; + logic [31:0] rd_data; + logic wr_ack; + } mldsa_reg__MLDSA_PRIVKEY_OUT__external__in_t; + + typedef struct packed{ + logic rd_ack; + logic [31:0] rd_data; + logic wr_ack; + } mldsa_reg__MLDSA_PRIVKEY_IN__external__in_t; + + typedef struct packed{ + logic hwset; + } mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02__error_internal_sts_enable_d33001bb_next_52b75ffa_resetsignal_0d7eaa27__in_t; + + typedef struct packed{ + mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02__error_internal_sts_enable_d33001bb_next_52b75ffa_resetsignal_0d7eaa27__in_t error_internal_sts; + } mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02__in_t; + + typedef struct packed{ + logic hwset; + } mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e__notif_cmd_done_sts_enable_dabe0b8b_next_540fa3b7__in_t; + + typedef struct packed{ + mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e__notif_cmd_done_sts_enable_dabe0b8b_next_540fa3b7__in_t notif_cmd_done_sts; + } mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e__in_t; + + typedef struct packed{ + mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02__in_t error_internal_intr_r; + mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e__in_t notif_internal_intr_r; + } mldsa_reg__intr_block_t__in_t; + + typedef struct packed{ + logic reset_b; + logic hard_reset_b; + logic mldsa_ready; + mldsa_reg__MLDSA_NAME__in_t [2-1:0]MLDSA_NAME; + mldsa_reg__MLDSA_VERSION__in_t [2-1:0]MLDSA_VERSION; + mldsa_reg__MLDSA_CTRL__in_t MLDSA_CTRL; + mldsa_reg__MLDSA_STATUS__in_t MLDSA_STATUS; + mldsa_reg__MLDSA_ENTROPY__in_t [16-1:0]MLDSA_ENTROPY; + mldsa_reg__MLDSA_SEED__in_t [8-1:0]MLDSA_SEED; + mldsa_reg__MLDSA_SIGN_RND__in_t [8-1:0]MLDSA_SIGN_RND; + mldsa_reg__MLDSA_MSG__in_t [16-1:0]MLDSA_MSG; + mldsa_reg__MLDSA_VERIFY_RES__in_t [16-1:0]MLDSA_VERIFY_RES; + mldsa_reg__MLDSA_PUBKEY__external__in_t [648-1:0]MLDSA_PUBKEY; + mldsa_reg__MLDSA_SIGNATURE__external__in_t [1157-1:0]MLDSA_SIGNATURE; + mldsa_reg__MLDSA_PRIVKEY_OUT__external__in_t MLDSA_PRIVKEY_OUT; + mldsa_reg__MLDSA_PRIVKEY_IN__external__in_t MLDSA_PRIVKEY_IN; + mldsa_reg__intr_block_t__in_t intr_block_rf; + } mldsa_reg__in_t; + + typedef struct packed{ + logic [2:0] value; + } mldsa_reg__MLDSA_CTRL__CTRL__out_t; + + typedef struct packed{ + logic value; + } mldsa_reg__MLDSA_CTRL__ZEROIZE__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_CTRL__CTRL__out_t CTRL; + mldsa_reg__MLDSA_CTRL__ZEROIZE__out_t ZEROIZE; + } mldsa_reg__MLDSA_CTRL__out_t; + + typedef struct packed{ + logic [31:0] value; + } mldsa_reg__MLDSA_ENTROPY__ENTROPY__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_ENTROPY__ENTROPY__out_t ENTROPY; + } mldsa_reg__MLDSA_ENTROPY__out_t; + + typedef struct packed{ + logic [31:0] value; + } mldsa_reg__MLDSA_SEED__SEED__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_SEED__SEED__out_t SEED; + } mldsa_reg__MLDSA_SEED__out_t; + + typedef struct packed{ + logic [31:0] value; + } mldsa_reg__MLDSA_SIGN_RND__SIGN_RND__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_SIGN_RND__SIGN_RND__out_t SIGN_RND; + } mldsa_reg__MLDSA_SIGN_RND__out_t; + + typedef struct packed{ + logic [31:0] value; + } mldsa_reg__MLDSA_MSG__MSG__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_MSG__MSG__out_t MSG; + } mldsa_reg__MLDSA_MSG__out_t; + + typedef struct packed{ + logic [31:0] value; + } mldsa_reg__MLDSA_VERIFY_RES__VERIFY_RES__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_VERIFY_RES__VERIFY_RES__out_t VERIFY_RES; + } mldsa_reg__MLDSA_VERIFY_RES__out_t; + + typedef struct packed{ + logic req; + logic req_is_wr; + logic [31:0] wr_data; + logic [31:0] wr_biten; + } mldsa_reg__MLDSA_PUBKEY__external__out_t; + + typedef struct packed{ + logic req; + logic req_is_wr; + logic [31:0] wr_data; + logic [31:0] wr_biten; + } mldsa_reg__MLDSA_SIGNATURE__external__out_t; + + typedef struct packed{ + logic req; + logic [12:0] addr; + logic req_is_wr; + logic [31:0] wr_data; + logic [31:0] wr_biten; + } mldsa_reg__MLDSA_PRIVKEY_OUT__external__out_t; + + typedef struct packed{ + logic req; + logic [12:0] addr; + logic req_is_wr; + logic [31:0] wr_data; + logic [31:0] wr_biten; + } mldsa_reg__MLDSA_PRIVKEY_IN__external__out_t; + + typedef struct packed{ + logic intr; + } mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a__out_t; + + typedef struct packed{ + logic intr; + } mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a__out_t; + + typedef struct packed{ + logic intr; + } mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02__out_t; + + typedef struct packed{ + logic intr; + } mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e__out_t; + + typedef struct packed{ + mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a__out_t error_global_intr_r; + mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a__out_t notif_global_intr_r; + mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02__out_t error_internal_intr_r; + mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e__out_t notif_internal_intr_r; + } mldsa_reg__intr_block_t__out_t; + + typedef struct packed{ + mldsa_reg__MLDSA_CTRL__out_t MLDSA_CTRL; + mldsa_reg__MLDSA_ENTROPY__out_t [16-1:0]MLDSA_ENTROPY; + mldsa_reg__MLDSA_SEED__out_t [8-1:0]MLDSA_SEED; + mldsa_reg__MLDSA_SIGN_RND__out_t [8-1:0]MLDSA_SIGN_RND; + mldsa_reg__MLDSA_MSG__out_t [16-1:0]MLDSA_MSG; + mldsa_reg__MLDSA_VERIFY_RES__out_t [16-1:0]MLDSA_VERIFY_RES; + mldsa_reg__MLDSA_PUBKEY__external__out_t [648-1:0]MLDSA_PUBKEY; + mldsa_reg__MLDSA_SIGNATURE__external__out_t [1157-1:0]MLDSA_SIGNATURE; + mldsa_reg__MLDSA_PRIVKEY_OUT__external__out_t MLDSA_PRIVKEY_OUT; + mldsa_reg__MLDSA_PRIVKEY_IN__external__out_t MLDSA_PRIVKEY_IN; + mldsa_reg__intr_block_t__out_t intr_block_rf; + } mldsa_reg__out_t; + + localparam MLDSA_REG_ADDR_WIDTH = 32'd15; + +endpackage \ No newline at end of file diff --git a/src/mldsa/rtl/mldsa_reg_uvm.sv b/src/mldsa/rtl/mldsa_reg_uvm.sv new file mode 100644 index 000000000..eddca70d9 --- /dev/null +++ b/src/mldsa/rtl/mldsa_reg_uvm.sv @@ -0,0 +1,976 @@ + +// This file was autogenerated by PeakRDL-uvm +package mldsa_reg_uvm; + `include "uvm_macros.svh" + import uvm_pkg::*; + `include "mldsa_reg_covergroups.svh" + // Reg - mldsa_reg::MLDSA_NAME + class mldsa_reg__MLDSA_NAME extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_NAME_bit_cg NAME_bit_cg[32]; + mldsa_reg__MLDSA_NAME_fld_cg fld_cg; + rand uvm_reg_field NAME; + + function new(string name = "mldsa_reg__MLDSA_NAME"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.NAME = new("NAME"); + this.NAME.configure(this, 32, 0, "RO", 1, 'h0, 0, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(NAME_bit_cg[bt]) NAME_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_NAME + + // Reg - mldsa_reg::MLDSA_VERSION + class mldsa_reg__MLDSA_VERSION extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_VERSION_bit_cg VERSION_bit_cg[32]; + mldsa_reg__MLDSA_VERSION_fld_cg fld_cg; + rand uvm_reg_field VERSION; + + function new(string name = "mldsa_reg__MLDSA_VERSION"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.VERSION = new("VERSION"); + this.VERSION.configure(this, 32, 0, "RO", 1, 'h0, 0, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(VERSION_bit_cg[bt]) VERSION_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_VERSION + + // Reg - mldsa_reg::MLDSA_CTRL + class mldsa_reg__MLDSA_CTRL extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_CTRL_bit_cg CTRL_bit_cg[3]; + mldsa_reg__MLDSA_CTRL_bit_cg ZEROIZE_bit_cg[1]; + mldsa_reg__MLDSA_CTRL_fld_cg fld_cg; + rand uvm_reg_field CTRL; + rand uvm_reg_field ZEROIZE; + + function new(string name = "mldsa_reg__MLDSA_CTRL"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.CTRL = new("CTRL"); + this.CTRL.configure(this, 3, 0, "WO", 1, 'h0, 1, 1, 0); + this.ZEROIZE = new("ZEROIZE"); + this.ZEROIZE.configure(this, 1, 3, "WO", 0, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(CTRL_bit_cg[bt]) CTRL_bit_cg[bt] = new(); + foreach(ZEROIZE_bit_cg[bt]) ZEROIZE_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_CTRL + + // Reg - mldsa_reg::MLDSA_STATUS + class mldsa_reg__MLDSA_STATUS extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_STATUS_bit_cg READY_bit_cg[1]; + mldsa_reg__MLDSA_STATUS_bit_cg VALID_bit_cg[1]; + mldsa_reg__MLDSA_STATUS_fld_cg fld_cg; + rand uvm_reg_field READY; + rand uvm_reg_field VALID; + + function new(string name = "mldsa_reg__MLDSA_STATUS"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.READY = new("READY"); + this.READY.configure(this, 1, 0, "RO", 1, 'h0, 1, 1, 0); + this.VALID = new("VALID"); + this.VALID.configure(this, 1, 1, "RO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(READY_bit_cg[bt]) READY_bit_cg[bt] = new(); + foreach(VALID_bit_cg[bt]) VALID_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_STATUS + + // Reg - mldsa_reg::MLDSA_ENTROPY + class mldsa_reg__MLDSA_ENTROPY extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_ENTROPY_bit_cg ENTROPY_bit_cg[32]; + mldsa_reg__MLDSA_ENTROPY_fld_cg fld_cg; + rand uvm_reg_field ENTROPY; + + function new(string name = "mldsa_reg__MLDSA_ENTROPY"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.ENTROPY = new("ENTROPY"); + this.ENTROPY.configure(this, 32, 0, "WO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(ENTROPY_bit_cg[bt]) ENTROPY_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_ENTROPY + + // Reg - mldsa_reg::MLDSA_SEED + class mldsa_reg__MLDSA_SEED extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_SEED_bit_cg SEED_bit_cg[32]; + mldsa_reg__MLDSA_SEED_fld_cg fld_cg; + rand uvm_reg_field SEED; + + function new(string name = "mldsa_reg__MLDSA_SEED"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.SEED = new("SEED"); + this.SEED.configure(this, 32, 0, "WO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(SEED_bit_cg[bt]) SEED_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_SEED + + // Reg - mldsa_reg::MLDSA_SIGN_RND + class mldsa_reg__MLDSA_SIGN_RND extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_SIGN_RND_bit_cg SIGN_RND_bit_cg[32]; + mldsa_reg__MLDSA_SIGN_RND_fld_cg fld_cg; + rand uvm_reg_field SIGN_RND; + + function new(string name = "mldsa_reg__MLDSA_SIGN_RND"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.SIGN_RND = new("SIGN_RND"); + this.SIGN_RND.configure(this, 32, 0, "WO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(SIGN_RND_bit_cg[bt]) SIGN_RND_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_SIGN_RND + + // Reg - mldsa_reg::MLDSA_MSG + class mldsa_reg__MLDSA_MSG extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_MSG_bit_cg MSG_bit_cg[32]; + mldsa_reg__MLDSA_MSG_fld_cg fld_cg; + rand uvm_reg_field MSG; + + function new(string name = "mldsa_reg__MLDSA_MSG"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.MSG = new("MSG"); + this.MSG.configure(this, 32, 0, "WO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(MSG_bit_cg[bt]) MSG_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_MSG + + // Reg - mldsa_reg::MLDSA_VERIFY_RES + class mldsa_reg__MLDSA_VERIFY_RES extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_VERIFY_RES_bit_cg VERIFY_RES_bit_cg[32]; + mldsa_reg__MLDSA_VERIFY_RES_fld_cg fld_cg; + rand uvm_reg_field VERIFY_RES; + + function new(string name = "mldsa_reg__MLDSA_VERIFY_RES"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.VERIFY_RES = new("VERIFY_RES"); + this.VERIFY_RES.configure(this, 32, 0, "RO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(VERIFY_RES_bit_cg[bt]) VERIFY_RES_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_VERIFY_RES + + // Reg - mldsa_reg::MLDSA_PUBKEY + class mldsa_reg__MLDSA_PUBKEY extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_PUBKEY_bit_cg PUBKEY_bit_cg[32]; + mldsa_reg__MLDSA_PUBKEY_fld_cg fld_cg; + rand uvm_reg_field PUBKEY; + + function new(string name = "mldsa_reg__MLDSA_PUBKEY"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.PUBKEY = new("PUBKEY"); + this.PUBKEY.configure(this, 32, 0, "RW", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(PUBKEY_bit_cg[bt]) PUBKEY_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_PUBKEY + + // Reg - mldsa_reg::MLDSA_SIGNATURE + class mldsa_reg__MLDSA_SIGNATURE extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__MLDSA_SIGNATURE_bit_cg SIGNATURE_bit_cg[32]; + mldsa_reg__MLDSA_SIGNATURE_fld_cg fld_cg; + rand uvm_reg_field SIGNATURE; + + function new(string name = "mldsa_reg__MLDSA_SIGNATURE"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.SIGNATURE = new("SIGNATURE"); + this.SIGNATURE.configure(this, 32, 0, "RW", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(SIGNATURE_bit_cg[bt]) SIGNATURE_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__MLDSA_SIGNATURE + + // Mem - mldsa_reg::MLDSA_PRIVKEY_OUT + class mldsa_reg__MLDSA_PRIVKEY_OUT extends uvm_reg_block; + rand uvm_mem m_mem; + + function new(string name = "mldsa_reg__MLDSA_PRIVKEY_OUT"); + super.new(name); + endfunction : new + + virtual function void build(); + this.default_map = create_map("reg_map", 0, 4.0, UVM_NO_ENDIAN); + this.m_mem = new("m_mem", 1224, 32, "RO"); + this.m_mem.configure(this); + this.default_map.add_mem(this.m_mem, 0); + endfunction : build + endclass : mldsa_reg__MLDSA_PRIVKEY_OUT + + // Mem - mldsa_reg::MLDSA_PRIVKEY_IN + class mldsa_reg__MLDSA_PRIVKEY_IN extends uvm_reg_block; + rand uvm_mem m_mem; + + function new(string name = "mldsa_reg__MLDSA_PRIVKEY_IN"); + super.new(name); + endfunction : new + + virtual function void build(); + this.default_map = create_map("reg_map", 0, 4.0, UVM_NO_ENDIAN); + this.m_mem = new("m_mem", 1224, 32, "RW"); + this.m_mem.configure(this); + this.default_map.add_mem(this.m_mem, 0); + endfunction : build + endclass : mldsa_reg__MLDSA_PRIVKEY_IN + + // Reg - mldsa_reg::intr_block_t::global_intr_en_t + class mldsa_reg__intr_block_t__global_intr_en_t extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__global_intr_en_t_bit_cg error_en_bit_cg[1]; + mldsa_reg__intr_block_t__global_intr_en_t_bit_cg notif_en_bit_cg[1]; + mldsa_reg__intr_block_t__global_intr_en_t_fld_cg fld_cg; + rand uvm_reg_field error_en; + rand uvm_reg_field notif_en; + + function new(string name = "mldsa_reg__intr_block_t__global_intr_en_t"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.error_en = new("error_en"); + this.error_en.configure(this, 1, 0, "RW", 0, 'h0, 1, 1, 0); + this.notif_en = new("notif_en"); + this.notif_en.configure(this, 1, 1, "RW", 0, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(error_en_bit_cg[bt]) error_en_bit_cg[bt] = new(); + foreach(notif_en_bit_cg[bt]) notif_en_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__global_intr_en_t + + // Reg - mldsa_reg::intr_block_t::error_intr_en_t + class mldsa_reg__intr_block_t__error_intr_en_t extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__error_intr_en_t_bit_cg error_internal_en_bit_cg[1]; + mldsa_reg__intr_block_t__error_intr_en_t_fld_cg fld_cg; + rand uvm_reg_field error_internal_en; + + function new(string name = "mldsa_reg__intr_block_t__error_intr_en_t"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.error_internal_en = new("error_internal_en"); + this.error_internal_en.configure(this, 1, 0, "RW", 0, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(error_internal_en_bit_cg[bt]) error_internal_en_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__error_intr_en_t + + // Reg - mldsa_reg::intr_block_t::notif_intr_en_t + class mldsa_reg__intr_block_t__notif_intr_en_t extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__notif_intr_en_t_bit_cg notif_cmd_done_en_bit_cg[1]; + mldsa_reg__intr_block_t__notif_intr_en_t_fld_cg fld_cg; + rand uvm_reg_field notif_cmd_done_en; + + function new(string name = "mldsa_reg__intr_block_t__notif_intr_en_t"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.notif_cmd_done_en = new("notif_cmd_done_en"); + this.notif_cmd_done_en.configure(this, 1, 0, "RW", 0, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(notif_cmd_done_en_bit_cg[bt]) notif_cmd_done_en_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__notif_intr_en_t + + // Reg - mldsa_reg::intr_block_t::global_intr_t_agg_sts_dd3dcf0a + class mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a_bit_cg agg_sts_bit_cg[1]; + mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a_fld_cg fld_cg; + rand uvm_reg_field agg_sts; + + function new(string name = "mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.agg_sts = new("agg_sts"); + this.agg_sts.configure(this, 1, 0, "RO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(agg_sts_bit_cg[bt]) agg_sts_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a + + // Reg - mldsa_reg::intr_block_t::global_intr_t_agg_sts_e6399b4a + class mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a_bit_cg agg_sts_bit_cg[1]; + mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a_fld_cg fld_cg; + rand uvm_reg_field agg_sts; + + function new(string name = "mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.agg_sts = new("agg_sts"); + this.agg_sts.configure(this, 1, 0, "RO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(agg_sts_bit_cg[bt]) agg_sts_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a + + // Reg - mldsa_reg::intr_block_t::error_intr_t_error_internal_sts_83adab02 + class mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02 extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02_bit_cg error_internal_sts_bit_cg[1]; + mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02_fld_cg fld_cg; + rand uvm_reg_field error_internal_sts; + + function new(string name = "mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.error_internal_sts = new("error_internal_sts"); + this.error_internal_sts.configure(this, 1, 0, "W1C", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(error_internal_sts_bit_cg[bt]) error_internal_sts_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02 + + // Reg - mldsa_reg::intr_block_t::notif_intr_t_notif_cmd_done_sts_1c68637e + class mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e_bit_cg notif_cmd_done_sts_bit_cg[1]; + mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e_fld_cg fld_cg; + rand uvm_reg_field notif_cmd_done_sts; + + function new(string name = "mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.notif_cmd_done_sts = new("notif_cmd_done_sts"); + this.notif_cmd_done_sts.configure(this, 1, 0, "W1C", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(notif_cmd_done_sts_bit_cg[bt]) notif_cmd_done_sts_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e + + // Reg - mldsa_reg::intr_block_t::error_intr_trig_t + class mldsa_reg__intr_block_t__error_intr_trig_t extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__error_intr_trig_t_bit_cg error_internal_trig_bit_cg[1]; + mldsa_reg__intr_block_t__error_intr_trig_t_fld_cg fld_cg; + rand uvm_reg_field error_internal_trig; + + function new(string name = "mldsa_reg__intr_block_t__error_intr_trig_t"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.error_internal_trig = new("error_internal_trig"); + this.error_internal_trig.configure(this, 1, 0, "W1S", 0, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(error_internal_trig_bit_cg[bt]) error_internal_trig_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__error_intr_trig_t + + // Reg - mldsa_reg::intr_block_t::notif_intr_trig_t + class mldsa_reg__intr_block_t__notif_intr_trig_t extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__notif_intr_trig_t_bit_cg notif_cmd_done_trig_bit_cg[1]; + mldsa_reg__intr_block_t__notif_intr_trig_t_fld_cg fld_cg; + rand uvm_reg_field notif_cmd_done_trig; + + function new(string name = "mldsa_reg__intr_block_t__notif_intr_trig_t"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.notif_cmd_done_trig = new("notif_cmd_done_trig"); + this.notif_cmd_done_trig.configure(this, 1, 0, "W1S", 0, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(notif_cmd_done_trig_bit_cg[bt]) notif_cmd_done_trig_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__notif_intr_trig_t + + // Reg - mldsa_reg::intr_block_t::intr_count_t_cnt_60ddff93 + class mldsa_reg__intr_block_t__intr_count_t_cnt_60ddff93 extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__intr_count_t_cnt_60ddff93_bit_cg cnt_bit_cg[32]; + mldsa_reg__intr_block_t__intr_count_t_cnt_60ddff93_fld_cg fld_cg; + rand uvm_reg_field cnt; + + function new(string name = "mldsa_reg__intr_block_t__intr_count_t_cnt_60ddff93"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.cnt = new("cnt"); + this.cnt.configure(this, 32, 0, "RW", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(cnt_bit_cg[bt]) cnt_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__intr_count_t_cnt_60ddff93 + + // Reg - mldsa_reg::intr_block_t::intr_count_t_cnt_be67d6d5 + class mldsa_reg__intr_block_t__intr_count_t_cnt_be67d6d5 extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__intr_count_t_cnt_be67d6d5_bit_cg cnt_bit_cg[32]; + mldsa_reg__intr_block_t__intr_count_t_cnt_be67d6d5_fld_cg fld_cg; + rand uvm_reg_field cnt; + + function new(string name = "mldsa_reg__intr_block_t__intr_count_t_cnt_be67d6d5"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.cnt = new("cnt"); + this.cnt.configure(this, 32, 0, "RW", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(cnt_bit_cg[bt]) cnt_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__intr_count_t_cnt_be67d6d5 + + // Reg - mldsa_reg::intr_block_t::intr_count_incr_t_pulse_15e6ed7e + class mldsa_reg__intr_block_t__intr_count_incr_t_pulse_15e6ed7e extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__intr_count_incr_t_pulse_15e6ed7e_bit_cg pulse_bit_cg[1]; + mldsa_reg__intr_block_t__intr_count_incr_t_pulse_15e6ed7e_fld_cg fld_cg; + rand uvm_reg_field pulse; + + function new(string name = "mldsa_reg__intr_block_t__intr_count_incr_t_pulse_15e6ed7e"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.pulse = new("pulse"); + this.pulse.configure(this, 1, 0, "RO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(pulse_bit_cg[bt]) pulse_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__intr_count_incr_t_pulse_15e6ed7e + + // Reg - mldsa_reg::intr_block_t::intr_count_incr_t_pulse_6173128e + class mldsa_reg__intr_block_t__intr_count_incr_t_pulse_6173128e extends uvm_reg; + protected uvm_reg_data_t m_current; + protected uvm_reg_data_t m_data; + protected bit m_is_read; + + mldsa_reg__intr_block_t__intr_count_incr_t_pulse_6173128e_bit_cg pulse_bit_cg[1]; + mldsa_reg__intr_block_t__intr_count_incr_t_pulse_6173128e_fld_cg fld_cg; + rand uvm_reg_field pulse; + + function new(string name = "mldsa_reg__intr_block_t__intr_count_incr_t_pulse_6173128e"); + super.new(name, 32, build_coverage(UVM_CVR_ALL)); + endfunction : new + extern virtual function void sample_values(); + extern protected virtual function void sample(uvm_reg_data_t data, + uvm_reg_data_t byte_en, + bit is_read, + uvm_reg_map map); + + virtual function void build(); + this.pulse = new("pulse"); + this.pulse.configure(this, 1, 0, "RO", 1, 'h0, 1, 1, 0); + if (has_coverage(UVM_CVR_REG_BITS)) begin + foreach(pulse_bit_cg[bt]) pulse_bit_cg[bt] = new(); + end + if (has_coverage(UVM_CVR_FIELD_VALS)) + fld_cg = new(); + endfunction : build + endclass : mldsa_reg__intr_block_t__intr_count_incr_t_pulse_6173128e + + // Regfile - mldsa_reg::intr_block_t + class mldsa_reg__intr_block_t extends uvm_reg_block; + rand mldsa_reg__intr_block_t__global_intr_en_t global_intr_en_r; + rand mldsa_reg__intr_block_t__error_intr_en_t error_intr_en_r; + rand mldsa_reg__intr_block_t__notif_intr_en_t notif_intr_en_r; + rand mldsa_reg__intr_block_t__global_intr_t_agg_sts_dd3dcf0a error_global_intr_r; + rand mldsa_reg__intr_block_t__global_intr_t_agg_sts_e6399b4a notif_global_intr_r; + rand mldsa_reg__intr_block_t__error_intr_t_error_internal_sts_83adab02 error_internal_intr_r; + rand mldsa_reg__intr_block_t__notif_intr_t_notif_cmd_done_sts_1c68637e notif_internal_intr_r; + rand mldsa_reg__intr_block_t__error_intr_trig_t error_intr_trig_r; + rand mldsa_reg__intr_block_t__notif_intr_trig_t notif_intr_trig_r; + rand mldsa_reg__intr_block_t__intr_count_t_cnt_60ddff93 error_internal_intr_count_r; + rand mldsa_reg__intr_block_t__intr_count_t_cnt_be67d6d5 notif_cmd_done_intr_count_r; + rand mldsa_reg__intr_block_t__intr_count_incr_t_pulse_15e6ed7e error_internal_intr_count_incr_r; + rand mldsa_reg__intr_block_t__intr_count_incr_t_pulse_6173128e notif_cmd_done_intr_count_incr_r; + + function new(string name = "mldsa_reg__intr_block_t"); + super.new(name); + endfunction : new + + virtual function void build(); + this.default_map = create_map("reg_map", 0, 4, UVM_NO_ENDIAN); + this.global_intr_en_r = new("global_intr_en_r"); + this.global_intr_en_r.configure(this); + + this.global_intr_en_r.build(); + this.default_map.add_reg(this.global_intr_en_r, 'h0); + this.error_intr_en_r = new("error_intr_en_r"); + this.error_intr_en_r.configure(this); + + this.error_intr_en_r.build(); + this.default_map.add_reg(this.error_intr_en_r, 'h4); + this.notif_intr_en_r = new("notif_intr_en_r"); + this.notif_intr_en_r.configure(this); + + this.notif_intr_en_r.build(); + this.default_map.add_reg(this.notif_intr_en_r, 'h8); + this.error_global_intr_r = new("error_global_intr_r"); + this.error_global_intr_r.configure(this); + + this.error_global_intr_r.build(); + this.default_map.add_reg(this.error_global_intr_r, 'hc); + this.notif_global_intr_r = new("notif_global_intr_r"); + this.notif_global_intr_r.configure(this); + + this.notif_global_intr_r.build(); + this.default_map.add_reg(this.notif_global_intr_r, 'h10); + this.error_internal_intr_r = new("error_internal_intr_r"); + this.error_internal_intr_r.configure(this); + + this.error_internal_intr_r.build(); + this.default_map.add_reg(this.error_internal_intr_r, 'h14); + this.notif_internal_intr_r = new("notif_internal_intr_r"); + this.notif_internal_intr_r.configure(this); + + this.notif_internal_intr_r.build(); + this.default_map.add_reg(this.notif_internal_intr_r, 'h18); + this.error_intr_trig_r = new("error_intr_trig_r"); + this.error_intr_trig_r.configure(this); + + this.error_intr_trig_r.build(); + this.default_map.add_reg(this.error_intr_trig_r, 'h1c); + this.notif_intr_trig_r = new("notif_intr_trig_r"); + this.notif_intr_trig_r.configure(this); + + this.notif_intr_trig_r.build(); + this.default_map.add_reg(this.notif_intr_trig_r, 'h20); + this.error_internal_intr_count_r = new("error_internal_intr_count_r"); + this.error_internal_intr_count_r.configure(this); + + this.error_internal_intr_count_r.build(); + this.default_map.add_reg(this.error_internal_intr_count_r, 'h100); + this.notif_cmd_done_intr_count_r = new("notif_cmd_done_intr_count_r"); + this.notif_cmd_done_intr_count_r.configure(this); + + this.notif_cmd_done_intr_count_r.build(); + this.default_map.add_reg(this.notif_cmd_done_intr_count_r, 'h180); + this.error_internal_intr_count_incr_r = new("error_internal_intr_count_incr_r"); + this.error_internal_intr_count_incr_r.configure(this); + + this.error_internal_intr_count_incr_r.build(); + this.default_map.add_reg(this.error_internal_intr_count_incr_r, 'h200); + this.notif_cmd_done_intr_count_incr_r = new("notif_cmd_done_intr_count_incr_r"); + this.notif_cmd_done_intr_count_incr_r.configure(this); + + this.notif_cmd_done_intr_count_incr_r.build(); + this.default_map.add_reg(this.notif_cmd_done_intr_count_incr_r, 'h204); + endfunction : build + endclass : mldsa_reg__intr_block_t + + // Addrmap - mldsa_reg + class mldsa_reg extends uvm_reg_block; + rand mldsa_reg__MLDSA_NAME MLDSA_NAME[2]; + rand mldsa_reg__MLDSA_VERSION MLDSA_VERSION[2]; + rand mldsa_reg__MLDSA_CTRL MLDSA_CTRL; + rand mldsa_reg__MLDSA_STATUS MLDSA_STATUS; + rand mldsa_reg__MLDSA_ENTROPY MLDSA_ENTROPY[16]; + rand mldsa_reg__MLDSA_SEED MLDSA_SEED[8]; + rand mldsa_reg__MLDSA_SIGN_RND MLDSA_SIGN_RND[8]; + rand mldsa_reg__MLDSA_MSG MLDSA_MSG[16]; + rand mldsa_reg__MLDSA_VERIFY_RES MLDSA_VERIFY_RES[16]; + rand mldsa_reg__MLDSA_PUBKEY MLDSA_PUBKEY[648]; + rand mldsa_reg__MLDSA_SIGNATURE MLDSA_SIGNATURE[1157]; + rand mldsa_reg__MLDSA_PRIVKEY_OUT MLDSA_PRIVKEY_OUT; + rand mldsa_reg__MLDSA_PRIVKEY_IN MLDSA_PRIVKEY_IN; + rand mldsa_reg__intr_block_t intr_block_rf; + + function new(string name = "mldsa_reg"); + super.new(name); + endfunction : new + + virtual function void build(); + this.default_map = create_map("reg_map", 0, 4, UVM_NO_ENDIAN); + foreach(this.MLDSA_NAME[i0]) begin + this.MLDSA_NAME[i0] = new($sformatf("MLDSA_NAME[%0d]", i0)); + this.MLDSA_NAME[i0].configure(this); + + this.MLDSA_NAME[i0].build(); + this.default_map.add_reg(this.MLDSA_NAME[i0], 'h0 + i0*'h4); + end + foreach(this.MLDSA_VERSION[i0]) begin + this.MLDSA_VERSION[i0] = new($sformatf("MLDSA_VERSION[%0d]", i0)); + this.MLDSA_VERSION[i0].configure(this); + + this.MLDSA_VERSION[i0].build(); + this.default_map.add_reg(this.MLDSA_VERSION[i0], 'h8 + i0*'h4); + end + this.MLDSA_CTRL = new("MLDSA_CTRL"); + this.MLDSA_CTRL.configure(this); + + this.MLDSA_CTRL.build(); + this.default_map.add_reg(this.MLDSA_CTRL, 'h10); + this.MLDSA_STATUS = new("MLDSA_STATUS"); + this.MLDSA_STATUS.configure(this); + + this.MLDSA_STATUS.build(); + this.default_map.add_reg(this.MLDSA_STATUS, 'h14); + foreach(this.MLDSA_ENTROPY[i0]) begin + this.MLDSA_ENTROPY[i0] = new($sformatf("MLDSA_ENTROPY[%0d]", i0)); + this.MLDSA_ENTROPY[i0].configure(this); + + this.MLDSA_ENTROPY[i0].build(); + this.default_map.add_reg(this.MLDSA_ENTROPY[i0], 'h18 + i0*'h4); + end + foreach(this.MLDSA_SEED[i0]) begin + this.MLDSA_SEED[i0] = new($sformatf("MLDSA_SEED[%0d]", i0)); + this.MLDSA_SEED[i0].configure(this); + + this.MLDSA_SEED[i0].build(); + this.default_map.add_reg(this.MLDSA_SEED[i0], 'h58 + i0*'h4); + end + foreach(this.MLDSA_SIGN_RND[i0]) begin + this.MLDSA_SIGN_RND[i0] = new($sformatf("MLDSA_SIGN_RND[%0d]", i0)); + this.MLDSA_SIGN_RND[i0].configure(this); + + this.MLDSA_SIGN_RND[i0].build(); + this.default_map.add_reg(this.MLDSA_SIGN_RND[i0], 'h78 + i0*'h4); + end + foreach(this.MLDSA_MSG[i0]) begin + this.MLDSA_MSG[i0] = new($sformatf("MLDSA_MSG[%0d]", i0)); + this.MLDSA_MSG[i0].configure(this); + + this.MLDSA_MSG[i0].build(); + this.default_map.add_reg(this.MLDSA_MSG[i0], 'h98 + i0*'h4); + end + foreach(this.MLDSA_VERIFY_RES[i0]) begin + this.MLDSA_VERIFY_RES[i0] = new($sformatf("MLDSA_VERIFY_RES[%0d]", i0)); + this.MLDSA_VERIFY_RES[i0].configure(this); + + this.MLDSA_VERIFY_RES[i0].build(); + this.default_map.add_reg(this.MLDSA_VERIFY_RES[i0], 'hd8 + i0*'h4); + end + foreach(this.MLDSA_PUBKEY[i0]) begin + this.MLDSA_PUBKEY[i0] = new($sformatf("MLDSA_PUBKEY[%0d]", i0)); + this.MLDSA_PUBKEY[i0].configure(this); + + this.MLDSA_PUBKEY[i0].build(); + this.default_map.add_reg(this.MLDSA_PUBKEY[i0], 'h118 + i0*'h4); + end + foreach(this.MLDSA_SIGNATURE[i0]) begin + this.MLDSA_SIGNATURE[i0] = new($sformatf("MLDSA_SIGNATURE[%0d]", i0)); + this.MLDSA_SIGNATURE[i0].configure(this); + + this.MLDSA_SIGNATURE[i0].build(); + this.default_map.add_reg(this.MLDSA_SIGNATURE[i0], 'hb38 + i0*'h4); + end + this.MLDSA_PRIVKEY_OUT = new("MLDSA_PRIVKEY_OUT"); + this.MLDSA_PRIVKEY_OUT.configure(this); + this.MLDSA_PRIVKEY_OUT.build(); + this.default_map.add_submap(this.MLDSA_PRIVKEY_OUT.default_map, 'h2000); + this.MLDSA_PRIVKEY_IN = new("MLDSA_PRIVKEY_IN"); + this.MLDSA_PRIVKEY_IN.configure(this); + this.MLDSA_PRIVKEY_IN.build(); + this.default_map.add_submap(this.MLDSA_PRIVKEY_IN.default_map, 'h4000); + this.intr_block_rf = new("intr_block_rf"); + this.intr_block_rf.configure(this); + this.intr_block_rf.build(); + this.default_map.add_submap(this.intr_block_rf.default_map, 'h6000); + endfunction : build + endclass : mldsa_reg + + `include "mldsa_reg_sample.svh" +endpackage: mldsa_reg_uvm diff --git a/src/mldsa/tb/.keygen_input_for_test.hex.swp b/src/mldsa/tb/.keygen_input_for_test.hex.swp new file mode 100644 index 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next_c = field_storage.PCR_CTRL[i0].lock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.PCR_CTRL[i0].lock.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.PCR_CTRL[i0] && decoded_req_is_wr && !(hwif_in.PCR_CTRL[i0].lock.swwel)) begin // SW write next_c = (field_storage.PCR_CTRL[i0].lock.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -170,10 +168,8 @@ module pv_reg ( assign hwif_out.PCR_CTRL[i0].lock.value = field_storage.PCR_CTRL[i0].lock.value; // Field: pv_reg.PCR_CTRL[].clear always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.PCR_CTRL[i0].clear.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.PCR_CTRL[i0].clear.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.PCR_CTRL[i0] && decoded_req_is_wr && !(hwif_in.PCR_CTRL[i0].clear.swwel)) begin // SW write next_c = (field_storage.PCR_CTRL[i0].clear.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -194,10 +190,8 @@ module pv_reg ( assign hwif_out.PCR_CTRL[i0].clear.value = field_storage.PCR_CTRL[i0].clear.value; // Field: pv_reg.PCR_CTRL[].rsvd0 always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.PCR_CTRL[i0].rsvd0.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.PCR_CTRL[i0].rsvd0.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.PCR_CTRL[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.PCR_CTRL[i0].rsvd0.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -218,10 +212,8 @@ module pv_reg ( assign hwif_out.PCR_CTRL[i0].rsvd0.value = field_storage.PCR_CTRL[i0].rsvd0.value; // Field: pv_reg.PCR_CTRL[].rsvd1 always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.PCR_CTRL[i0].rsvd1.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.PCR_CTRL[i0].rsvd1.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.PCR_CTRL[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.PCR_CTRL[i0].rsvd1.value & ~decoded_wr_biten[7:3]) | (decoded_wr_data[7:3] & decoded_wr_biten[7:3]); load_next_c = '1; @@ -242,10 +234,8 @@ module pv_reg ( for(genvar i1=0; i1<12; i1++) begin // Field: pv_reg.PCR_ENTRY[][].data always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.PCR_ENTRY[i0][i1].data.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.PCR_ENTRY[i0][i1].data.value; + automatic logic load_next_c = '0; if(hwif_in.PCR_ENTRY[i0][i1].data.we) begin // HW Write - we next_c = hwif_in.PCR_ENTRY[i0][i1].data.next; load_next_c = '1; @@ -281,7 +271,7 @@ module pv_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [416-1:0][31:0] readback_array; for(genvar i0=0; i0<32; i0++) begin @@ -313,4 +303,4 @@ module pv_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.hard_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/sha256/rtl/sha256_reg.sv b/src/sha256/rtl/sha256_reg.sv index 87b7451c8..bda350c79 100644 --- a/src/sha256/rtl/sha256_reg.sv +++ b/src/sha256/rtl/sha256_reg.sv @@ -533,10 +533,8 @@ module sha256_reg ( // Field: sha256_reg.SHA256_CTRL.INIT always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.INIT.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA256_CTRL.INIT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA256_CTRL.INIT.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -557,10 +555,8 @@ module sha256_reg ( assign hwif_out.SHA256_CTRL.INIT.value = field_storage.SHA256_CTRL.INIT.value; // Field: sha256_reg.SHA256_CTRL.NEXT always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.NEXT.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA256_CTRL.NEXT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA256_CTRL.NEXT.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -581,10 +577,8 @@ module sha256_reg ( assign hwif_out.SHA256_CTRL.NEXT.value = field_storage.SHA256_CTRL.NEXT.value; // Field: sha256_reg.SHA256_CTRL.MODE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.MODE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA256_CTRL.MODE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr && hwif_in.sha256_ready) begin // SW write next_c = (field_storage.SHA256_CTRL.MODE.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -602,10 +596,8 @@ module sha256_reg ( assign hwif_out.SHA256_CTRL.MODE.value = field_storage.SHA256_CTRL.MODE.value; // Field: sha256_reg.SHA256_CTRL.ZEROIZE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.ZEROIZE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA256_CTRL.ZEROIZE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA256_CTRL.ZEROIZE.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -626,10 +618,8 @@ module sha256_reg ( assign hwif_out.SHA256_CTRL.ZEROIZE.value = field_storage.SHA256_CTRL.ZEROIZE.value; // Field: sha256_reg.SHA256_CTRL.WNTZ_MODE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.WNTZ_MODE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA256_CTRL.WNTZ_MODE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr && hwif_in.sha256_ready) begin // SW write next_c = (field_storage.SHA256_CTRL.WNTZ_MODE.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]); load_next_c = '1; @@ -650,10 +640,8 @@ module sha256_reg ( assign hwif_out.SHA256_CTRL.WNTZ_MODE.value = field_storage.SHA256_CTRL.WNTZ_MODE.value; // Field: sha256_reg.SHA256_CTRL.WNTZ_W always_comb begin - automatic logic [3:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.WNTZ_W.value; - load_next_c = '0; + automatic logic [3:0] next_c = field_storage.SHA256_CTRL.WNTZ_W.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr && hwif_in.sha256_ready) begin // SW write next_c = (field_storage.SHA256_CTRL.WNTZ_W.value & ~decoded_wr_biten[8:5]) | (decoded_wr_data[8:5] & decoded_wr_biten[8:5]); load_next_c = '1; @@ -671,10 +659,8 @@ module sha256_reg ( assign hwif_out.SHA256_CTRL.WNTZ_W.value = field_storage.SHA256_CTRL.WNTZ_W.value; // Field: sha256_reg.SHA256_CTRL.WNTZ_N_MODE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_CTRL.WNTZ_N_MODE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA256_CTRL.WNTZ_N_MODE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_CTRL && decoded_req_is_wr && hwif_in.sha256_ready) begin // SW write next_c = (field_storage.SHA256_CTRL.WNTZ_N_MODE.value & ~decoded_wr_biten[9:9]) | (decoded_wr_data[9:9] & decoded_wr_biten[9:9]); load_next_c = '1; @@ -693,10 +679,8 @@ module sha256_reg ( for(genvar i0=0; i0<16; i0++) begin // Field: sha256_reg.SHA256_BLOCK[].BLOCK always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_BLOCK[i0].BLOCK.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.SHA256_BLOCK[i0].BLOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA256_BLOCK[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA256_BLOCK[i0].BLOCK.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -719,10 +703,8 @@ module sha256_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: sha256_reg.SHA256_DIGEST[].DIGEST always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA256_DIGEST[i0].DIGEST.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.SHA256_DIGEST[i0].DIGEST.value; + automatic logic load_next_c = '0; if(hwif_in.SHA256_DIGEST[i0].DIGEST.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -743,10 +725,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -763,10 +743,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -783,10 +761,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_en_r.error0_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error0_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -803,10 +779,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_en_r.error1_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error1_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -823,10 +797,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_en_r.error2_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error2_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -843,10 +815,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_en_r.error3_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error3_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -863,10 +833,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.notif_intr_en_r.notif_cmd_done_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -883,10 +851,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -905,10 +871,8 @@ module sha256_reg ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: sha256_reg.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -927,10 +891,8 @@ module sha256_reg ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: sha256_reg.intr_block_rf.error_internal_intr_r.error0_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -953,10 +915,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_internal_intr_r.error1_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -979,10 +939,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_internal_intr_r.error2_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1005,10 +963,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_internal_intr_r.error3_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1036,10 +992,8 @@ module sha256_reg ( || |(field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value & field_storage.intr_block_rf.error_intr_en_r.error3_en.value); // Field: sha256_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1064,10 +1018,8 @@ module sha256_reg ( |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); // Field: sha256_reg.intr_block_rf.error_intr_trig_r.error0_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1087,10 +1039,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_trig_r.error1_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1110,10 +1060,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_trig_r.error2_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1133,10 +1081,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error_intr_trig_r.error3_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1156,10 +1102,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1179,10 +1123,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error0_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error0_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error0_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1213,10 +1155,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error1_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error1_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error1_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1247,10 +1187,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error2_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error2_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error2_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1281,10 +1219,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error3_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error3_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error3_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1315,10 +1251,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.notif_cmd_done_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1349,10 +1283,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error0_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1380,10 +1312,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error1_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1411,10 +1341,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error2_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1442,10 +1370,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.error3_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1473,10 +1399,8 @@ module sha256_reg ( end // Field: sha256_reg.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1517,7 +1441,7 @@ module sha256_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [32-1:0][31:0] readback_array; for(genvar i0=0; i0<2; i0++) begin @@ -1593,4 +1517,4 @@ module sha256_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.error_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/sha512/rtl/sha512_reg.sv b/src/sha512/rtl/sha512_reg.sv index 3f893839f..696944628 100644 --- a/src/sha512/rtl/sha512_reg.sv +++ b/src/sha512/rtl/sha512_reg.sv @@ -697,10 +697,8 @@ module sha512_reg ( // Field: sha512_reg.SHA512_CTRL.INIT always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_CTRL.INIT.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_CTRL.INIT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_CTRL.INIT.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -721,10 +719,8 @@ module sha512_reg ( assign hwif_out.SHA512_CTRL.INIT.value = field_storage.SHA512_CTRL.INIT.value; // Field: sha512_reg.SHA512_CTRL.NEXT always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_CTRL.NEXT.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_CTRL.NEXT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_CTRL.NEXT.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -745,10 +741,8 @@ module sha512_reg ( assign hwif_out.SHA512_CTRL.NEXT.value = field_storage.SHA512_CTRL.NEXT.value; // Field: sha512_reg.SHA512_CTRL.MODE always_comb begin - automatic logic [1:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_CTRL.MODE.value; - load_next_c = '0; + automatic logic [1:0] next_c = field_storage.SHA512_CTRL.MODE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_CTRL.MODE.value & ~decoded_wr_biten[3:2]) | (decoded_wr_data[3:2] & decoded_wr_biten[3:2]); load_next_c = '1; @@ -766,10 +760,8 @@ module sha512_reg ( assign hwif_out.SHA512_CTRL.MODE.value = field_storage.SHA512_CTRL.MODE.value; // Field: sha512_reg.SHA512_CTRL.ZEROIZE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_CTRL.ZEROIZE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_CTRL.ZEROIZE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_CTRL.ZEROIZE.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]); load_next_c = '1; @@ -790,10 +782,8 @@ module sha512_reg ( assign hwif_out.SHA512_CTRL.ZEROIZE.value = field_storage.SHA512_CTRL.ZEROIZE.value; // Field: sha512_reg.SHA512_CTRL.LAST always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_CTRL.LAST.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_CTRL.LAST.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_CTRL.LAST.value & ~decoded_wr_biten[5:5]) | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]); load_next_c = '1; @@ -815,10 +805,8 @@ module sha512_reg ( for(genvar i0=0; i0<32; i0++) begin // Field: sha512_reg.SHA512_BLOCK[].BLOCK always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_BLOCK[i0].BLOCK.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.SHA512_BLOCK[i0].BLOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_BLOCK[i0] && decoded_req_is_wr && !(hwif_in.SHA512_BLOCK[i0].BLOCK.swwel)) begin // SW write next_c = (field_storage.SHA512_BLOCK[i0].BLOCK.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -844,10 +832,8 @@ module sha512_reg ( for(genvar i0=0; i0<16; i0++) begin // Field: sha512_reg.SHA512_DIGEST[].DIGEST always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_DIGEST[i0].DIGEST.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.SHA512_DIGEST[i0].DIGEST.value; + automatic logic load_next_c = '0; if(hwif_in.SHA512_DIGEST[i0].DIGEST.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -868,10 +854,8 @@ module sha512_reg ( end // Field: sha512_reg.SHA512_VAULT_RD_CTRL.read_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_VAULT_RD_CTRL.read_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_VAULT_RD_CTRL.read_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_VAULT_RD_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_VAULT_RD_CTRL.read_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -892,10 +876,8 @@ module sha512_reg ( assign hwif_out.SHA512_VAULT_RD_CTRL.read_en.value = field_storage.SHA512_VAULT_RD_CTRL.read_en.value; // Field: sha512_reg.SHA512_VAULT_RD_CTRL.read_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_VAULT_RD_CTRL.read_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.SHA512_VAULT_RD_CTRL.read_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_VAULT_RD_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_VAULT_RD_CTRL.read_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -913,10 +895,8 @@ module sha512_reg ( assign hwif_out.SHA512_VAULT_RD_CTRL.read_entry.value = field_storage.SHA512_VAULT_RD_CTRL.read_entry.value; // Field: sha512_reg.SHA512_VAULT_RD_CTRL.pcr_hash_extend always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_VAULT_RD_CTRL.pcr_hash_extend.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_VAULT_RD_CTRL.pcr_hash_extend.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_VAULT_RD_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_VAULT_RD_CTRL.pcr_hash_extend.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -934,10 +914,8 @@ module sha512_reg ( assign hwif_out.SHA512_VAULT_RD_CTRL.pcr_hash_extend.value = field_storage.SHA512_VAULT_RD_CTRL.pcr_hash_extend.value; // Field: sha512_reg.SHA512_VAULT_RD_CTRL.rsvd always_comb begin - automatic logic [24:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_VAULT_RD_CTRL.rsvd.value; - load_next_c = '0; + automatic logic [24:0] next_c = field_storage.SHA512_VAULT_RD_CTRL.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_VAULT_RD_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_VAULT_RD_CTRL.rsvd.value & ~decoded_wr_biten[31:7]) | (decoded_wr_data[31:7] & decoded_wr_biten[31:7]); load_next_c = '1; @@ -955,10 +933,8 @@ module sha512_reg ( assign hwif_out.SHA512_VAULT_RD_CTRL.rsvd.value = field_storage.SHA512_VAULT_RD_CTRL.rsvd.value; // Field: sha512_reg.SHA512_VAULT_RD_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_VAULT_RD_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_VAULT_RD_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.SHA512_VAULT_RD_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -978,10 +954,8 @@ module sha512_reg ( end // Field: sha512_reg.SHA512_KV_WR_CTRL.write_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.write_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_CTRL.write_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.write_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1002,10 +976,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.write_en.value = field_storage.SHA512_KV_WR_CTRL.write_en.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.write_entry always_comb begin - automatic logic [4:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.write_entry.value; - load_next_c = '0; + automatic logic [4:0] next_c = field_storage.SHA512_KV_WR_CTRL.write_entry.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.write_entry.value & ~decoded_wr_biten[5:1]) | (decoded_wr_data[5:1] & decoded_wr_biten[5:1]); load_next_c = '1; @@ -1023,10 +995,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.write_entry.value = field_storage.SHA512_KV_WR_CTRL.write_entry.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.hmac_key_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.hmac_key_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_CTRL.hmac_key_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.hmac_key_dest_valid.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -1044,10 +1014,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.hmac_key_dest_valid.value = field_storage.SHA512_KV_WR_CTRL.hmac_key_dest_valid.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.hmac_block_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.hmac_block_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_CTRL.hmac_block_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.hmac_block_dest_valid.value & ~decoded_wr_biten[7:7]) | (decoded_wr_data[7:7] & decoded_wr_biten[7:7]); load_next_c = '1; @@ -1065,10 +1033,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.hmac_block_dest_valid.value = field_storage.SHA512_KV_WR_CTRL.hmac_block_dest_valid.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.sha_block_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.sha_block_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_CTRL.sha_block_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.sha_block_dest_valid.value & ~decoded_wr_biten[8:8]) | (decoded_wr_data[8:8] & decoded_wr_biten[8:8]); load_next_c = '1; @@ -1086,10 +1052,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.sha_block_dest_valid.value = field_storage.SHA512_KV_WR_CTRL.sha_block_dest_valid.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.ecc_pkey_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.ecc_pkey_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_CTRL.ecc_pkey_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.ecc_pkey_dest_valid.value & ~decoded_wr_biten[9:9]) | (decoded_wr_data[9:9] & decoded_wr_biten[9:9]); load_next_c = '1; @@ -1107,10 +1071,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.ecc_pkey_dest_valid.value = field_storage.SHA512_KV_WR_CTRL.ecc_pkey_dest_valid.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.ecc_seed_dest_valid always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.ecc_seed_dest_valid.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_CTRL.ecc_seed_dest_valid.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.ecc_seed_dest_valid.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]); load_next_c = '1; @@ -1128,10 +1090,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.ecc_seed_dest_valid.value = field_storage.SHA512_KV_WR_CTRL.ecc_seed_dest_valid.value; // Field: sha512_reg.SHA512_KV_WR_CTRL.rsvd always_comb begin - automatic logic [20:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_CTRL.rsvd.value; - load_next_c = '0; + automatic logic [20:0] next_c = field_storage.SHA512_KV_WR_CTRL.rsvd.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_KV_WR_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_KV_WR_CTRL.rsvd.value & ~decoded_wr_biten[31:11]) | (decoded_wr_data[31:11] & decoded_wr_biten[31:11]); load_next_c = '1; @@ -1149,10 +1109,8 @@ module sha512_reg ( assign hwif_out.SHA512_KV_WR_CTRL.rsvd.value = field_storage.SHA512_KV_WR_CTRL.rsvd.value; // Field: sha512_reg.SHA512_KV_WR_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_KV_WR_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_KV_WR_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.SHA512_KV_WR_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1173,10 +1131,8 @@ module sha512_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: sha512_reg.SHA512_GEN_PCR_HASH_NONCE[].NONCE always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_GEN_PCR_HASH_NONCE[i0].NONCE.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.SHA512_GEN_PCR_HASH_NONCE[i0].NONCE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_GEN_PCR_HASH_NONCE[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_GEN_PCR_HASH_NONCE[i0].NONCE.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1195,10 +1151,8 @@ module sha512_reg ( end // Field: sha512_reg.SHA512_GEN_PCR_HASH_CTRL.START always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_GEN_PCR_HASH_CTRL.START.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_GEN_PCR_HASH_CTRL.START.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.SHA512_GEN_PCR_HASH_CTRL && decoded_req_is_wr) begin // SW write next_c = (field_storage.SHA512_GEN_PCR_HASH_CTRL.START.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1219,10 +1173,8 @@ module sha512_reg ( assign hwif_out.SHA512_GEN_PCR_HASH_CTRL.START.value = field_storage.SHA512_GEN_PCR_HASH_CTRL.START.value; // Field: sha512_reg.SHA512_GEN_PCR_HASH_STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_GEN_PCR_HASH_STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.SHA512_GEN_PCR_HASH_STATUS.VALID.value; + automatic logic load_next_c = '0; if(hwif_in.SHA512_GEN_PCR_HASH_STATUS.VALID.hwset) begin // HW Set next_c = '1; load_next_c = '1; @@ -1243,10 +1195,8 @@ module sha512_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: sha512_reg.SHA512_GEN_PCR_HASH_DIGEST[].DIGEST always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.SHA512_GEN_PCR_HASH_DIGEST[i0].DIGEST.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.SHA512_GEN_PCR_HASH_DIGEST[i0].DIGEST.value; + automatic logic load_next_c = '0; if(hwif_in.SHA512_GEN_PCR_HASH_DIGEST[i0].DIGEST.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -1267,10 +1217,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1287,10 +1235,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1307,10 +1253,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_en_r.error0_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error0_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1327,10 +1271,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_en_r.error1_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error1_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1347,10 +1289,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_en_r.error2_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error2_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1367,10 +1307,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_en_r.error3_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error3_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1387,10 +1325,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.notif_intr_en_r.notif_cmd_done_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1407,10 +1343,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -1429,10 +1363,8 @@ module sha512_reg ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: sha512_reg.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -1451,10 +1383,8 @@ module sha512_reg ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: sha512_reg.intr_block_rf.error_internal_intr_r.error0_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1477,10 +1407,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_internal_intr_r.error1_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1503,10 +1431,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_internal_intr_r.error2_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1529,10 +1455,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_internal_intr_r.error3_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1560,10 +1484,8 @@ module sha512_reg ( || |(field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value & field_storage.intr_block_rf.error_intr_en_r.error3_en.value); // Field: sha512_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1588,10 +1510,8 @@ module sha512_reg ( |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); // Field: sha512_reg.intr_block_rf.error_intr_trig_r.error0_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1611,10 +1531,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_trig_r.error1_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1634,10 +1552,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_trig_r.error2_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1657,10 +1573,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error_intr_trig_r.error3_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1680,10 +1594,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1703,10 +1615,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error0_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error0_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error0_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1737,10 +1647,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error1_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error1_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error1_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1771,10 +1679,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error2_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error2_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error2_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1805,10 +1711,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error3_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error3_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.error3_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1839,10 +1743,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.notif_cmd_done_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1873,10 +1775,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error0_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1904,10 +1804,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error1_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1935,10 +1833,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error2_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1966,10 +1862,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.error3_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1997,10 +1891,8 @@ module sha512_reg ( end // Field: sha512_reg.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -2041,7 +1933,7 @@ module sha512_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [57-1:0][31:0] readback_array; for(genvar i0=0; i0<2; i0++) begin @@ -2142,4 +2034,4 @@ module sha512_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.error_reset_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/soc_ifc/rtl/mbox_csr.sv b/src/soc_ifc/rtl/mbox_csr.sv index c58f79ea2..329cb0008 100644 --- a/src/soc_ifc/rtl/mbox_csr.sv +++ b/src/soc_ifc/rtl/mbox_csr.sv @@ -247,10 +247,8 @@ module mbox_csr ( // Field: mbox_csr.mbox_lock.lock always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_lock.lock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.mbox_lock.lock.value; + automatic logic load_next_c = '0; if(hwif_in.mbox_lock.lock.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -272,10 +270,8 @@ module mbox_csr ( assign hwif_out.mbox_lock.lock.swmod = decoded_reg_strb.mbox_lock && !decoded_req_is_wr; // Field: mbox_csr.mbox_user.user always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_user.user.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.mbox_user.user.value; + automatic logic load_next_c = '0; if(hwif_in.lock_set) begin // HW Write - we next_c = hwif_in.mbox_user.user.next; load_next_c = '1; @@ -293,10 +289,8 @@ module mbox_csr ( assign hwif_out.mbox_user.user.value = field_storage.mbox_user.user.value; // Field: mbox_csr.mbox_cmd.command always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_cmd.command.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.mbox_cmd.command.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.mbox_cmd && decoded_req_is_wr && hwif_in.valid_requester) begin // SW write next_c = (field_storage.mbox_cmd.command.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -314,10 +308,8 @@ module mbox_csr ( assign hwif_out.mbox_cmd.command.swmod = decoded_reg_strb.mbox_cmd && decoded_req_is_wr; // Field: mbox_csr.mbox_dlen.length always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_dlen.length.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.mbox_dlen.length.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.mbox_dlen && decoded_req_is_wr && hwif_in.valid_requester) begin // SW write next_c = (field_storage.mbox_dlen.length.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -336,10 +328,8 @@ module mbox_csr ( assign hwif_out.mbox_dlen.length.swmod = decoded_reg_strb.mbox_dlen && decoded_req_is_wr; // Field: mbox_csr.mbox_datain.datain always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_datain.datain.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.mbox_datain.datain.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.mbox_datain && decoded_req_is_wr && hwif_in.valid_requester) begin // SW write next_c = (field_storage.mbox_datain.datain.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -357,10 +347,8 @@ module mbox_csr ( assign hwif_out.mbox_datain.datain.swmod = decoded_reg_strb.mbox_datain && decoded_req_is_wr; // Field: mbox_csr.mbox_dataout.dataout always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_dataout.dataout.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.mbox_dataout.dataout.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.mbox_dataout && decoded_req_is_wr && hwif_in.mbox_dataout.dataout.swwe) begin // SW write next_c = (field_storage.mbox_dataout.dataout.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -382,10 +370,8 @@ module mbox_csr ( assign hwif_out.mbox_dataout.dataout.swacc = decoded_reg_strb.mbox_dataout; // Field: mbox_csr.mbox_execute.execute always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_execute.execute.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.mbox_execute.execute.value; + automatic logic load_next_c = '0; if(hwif_in.mbox_execute.execute.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -407,10 +393,8 @@ module mbox_csr ( assign hwif_out.mbox_execute.execute.swmod = decoded_reg_strb.mbox_execute && decoded_req_is_wr; // Field: mbox_csr.mbox_status.status always_comb begin - automatic logic [3:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_status.status.value; - load_next_c = '0; + automatic logic [3:0] next_c = field_storage.mbox_status.status.value; + automatic logic load_next_c = '0; if(hwif_in.mbox_status.status.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -432,10 +416,8 @@ module mbox_csr ( assign hwif_out.mbox_status.status.swmod = decoded_reg_strb.mbox_status && decoded_req_is_wr; // Field: mbox_csr.mbox_status.ecc_single_error always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_status.ecc_single_error.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.mbox_status.ecc_single_error.value; + automatic logic load_next_c = '0; if(!field_storage.mbox_execute.execute.value) begin // HW Write - wel next_c = field_storage.mbox_execute.execute.value; load_next_c = '1; @@ -456,10 +438,8 @@ module mbox_csr ( assign hwif_out.mbox_status.ecc_single_error.value = field_storage.mbox_status.ecc_single_error.value; // Field: mbox_csr.mbox_status.ecc_double_error always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_status.ecc_double_error.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.mbox_status.ecc_double_error.value; + automatic logic load_next_c = '0; if(!field_storage.mbox_execute.execute.value) begin // HW Write - wel next_c = field_storage.mbox_execute.execute.value; load_next_c = '1; @@ -480,10 +460,8 @@ module mbox_csr ( assign hwif_out.mbox_status.ecc_double_error.value = field_storage.mbox_status.ecc_double_error.value; // Field: mbox_csr.mbox_status.mbox_fsm_ps always_comb begin - automatic logic [2:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_status.mbox_fsm_ps.value; - load_next_c = '0; + automatic logic [2:0] next_c = field_storage.mbox_status.mbox_fsm_ps.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.mbox_status.mbox_fsm_ps.next; @@ -501,10 +479,8 @@ module mbox_csr ( assign hwif_out.mbox_status.mbox_fsm_ps.value = field_storage.mbox_status.mbox_fsm_ps.value; // Field: mbox_csr.mbox_status.soc_has_lock always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_status.soc_has_lock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.mbox_status.soc_has_lock.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.mbox_status.soc_has_lock.next; @@ -522,10 +498,8 @@ module mbox_csr ( assign hwif_out.mbox_status.soc_has_lock.value = field_storage.mbox_status.soc_has_lock.value; // Field: mbox_csr.mbox_status.mbox_rdptr always_comb begin - automatic logic [14:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_status.mbox_rdptr.value; - load_next_c = '0; + automatic logic [14:0] next_c = field_storage.mbox_status.mbox_rdptr.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.mbox_status.mbox_rdptr.next; @@ -543,10 +517,8 @@ module mbox_csr ( assign hwif_out.mbox_status.mbox_rdptr.value = field_storage.mbox_status.mbox_rdptr.value; // Field: mbox_csr.mbox_unlock.unlock always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.mbox_unlock.unlock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.mbox_unlock.unlock.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.mbox_unlock && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.mbox_unlock.unlock.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -580,7 +552,7 @@ module mbox_csr ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [9-1:0][31:0] readback_array; assign readback_array[0][0:0] = (decoded_reg_strb.mbox_lock && !decoded_req_is_wr) ? field_storage.mbox_lock.lock.value : '0; @@ -618,4 +590,4 @@ module mbox_csr ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.cptra_rst_b) -endmodule +endmodule \ No newline at end of file diff --git a/src/soc_ifc/rtl/sha512_acc_csr.sv b/src/soc_ifc/rtl/sha512_acc_csr.sv index ba52bf8ec..196c2f538 100644 --- a/src/soc_ifc/rtl/sha512_acc_csr.sv +++ b/src/soc_ifc/rtl/sha512_acc_csr.sv @@ -584,10 +584,8 @@ module sha512_acc_csr ( // Field: sha512_acc_csr.LOCK.LOCK always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.LOCK.LOCK.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.LOCK.LOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.LOCK && !decoded_req_is_wr) begin // SW set on read next_c = '1; load_next_c = '1; @@ -609,10 +607,8 @@ module sha512_acc_csr ( assign hwif_out.LOCK.LOCK.swmod = decoded_reg_strb.LOCK; // Field: sha512_acc_csr.USER.USER always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.USER.USER.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.USER.USER.value; + automatic logic load_next_c = '0; if(hwif_in.lock_set) begin // HW Write - we next_c = hwif_in.USER.USER.next; load_next_c = '1; @@ -630,10 +626,8 @@ module sha512_acc_csr ( assign hwif_out.USER.USER.value = field_storage.USER.USER.value; // Field: sha512_acc_csr.MODE.MODE always_comb begin - automatic logic [1:0] next_c; - automatic logic load_next_c; - next_c = field_storage.MODE.MODE.value; - load_next_c = '0; + automatic logic [1:0] next_c = field_storage.MODE.MODE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.MODE && decoded_req_is_wr && hwif_in.valid_user) begin // SW write next_c = (field_storage.MODE.MODE.value & ~decoded_wr_biten[1:0]) | (decoded_wr_data[1:0] & decoded_wr_biten[1:0]); load_next_c = '1; @@ -652,10 +646,8 @@ module sha512_acc_csr ( assign hwif_out.MODE.MODE.swmod = decoded_reg_strb.MODE && decoded_req_is_wr; // Field: sha512_acc_csr.MODE.ENDIAN_TOGGLE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.MODE.ENDIAN_TOGGLE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.MODE.ENDIAN_TOGGLE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.MODE && decoded_req_is_wr && hwif_in.valid_user) begin // SW write next_c = (field_storage.MODE.ENDIAN_TOGGLE.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -673,10 +665,8 @@ module sha512_acc_csr ( assign hwif_out.MODE.ENDIAN_TOGGLE.value = field_storage.MODE.ENDIAN_TOGGLE.value; // Field: sha512_acc_csr.START_ADDRESS.ADDR always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.START_ADDRESS.ADDR.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.START_ADDRESS.ADDR.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.START_ADDRESS && decoded_req_is_wr && hwif_in.valid_user) begin // SW write next_c = (field_storage.START_ADDRESS.ADDR.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -694,10 +684,8 @@ module sha512_acc_csr ( assign hwif_out.START_ADDRESS.ADDR.value = field_storage.START_ADDRESS.ADDR.value; // Field: sha512_acc_csr.DLEN.LENGTH always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DLEN.LENGTH.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.DLEN.LENGTH.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DLEN && decoded_req_is_wr && hwif_in.valid_user) begin // SW write next_c = (field_storage.DLEN.LENGTH.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -715,10 +703,8 @@ module sha512_acc_csr ( assign hwif_out.DLEN.LENGTH.value = field_storage.DLEN.LENGTH.value; // Field: sha512_acc_csr.DATAIN.DATAIN always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DATAIN.DATAIN.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.DATAIN.DATAIN.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.DATAIN && decoded_req_is_wr && hwif_in.valid_user) begin // SW write next_c = (field_storage.DATAIN.DATAIN.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -736,10 +722,8 @@ module sha512_acc_csr ( assign hwif_out.DATAIN.DATAIN.swmod = decoded_reg_strb.DATAIN && decoded_req_is_wr; // Field: sha512_acc_csr.EXECUTE.EXECUTE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.EXECUTE.EXECUTE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.EXECUTE.EXECUTE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.EXECUTE && decoded_req_is_wr && hwif_in.valid_user) begin // SW write next_c = (field_storage.EXECUTE.EXECUTE.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -760,10 +744,8 @@ module sha512_acc_csr ( assign hwif_out.EXECUTE.EXECUTE.value = field_storage.EXECUTE.EXECUTE.value; // Field: sha512_acc_csr.STATUS.VALID always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.STATUS.VALID.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.STATUS.VALID.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.STATUS.VALID.next; @@ -781,10 +763,8 @@ module sha512_acc_csr ( assign hwif_out.STATUS.VALID.value = field_storage.STATUS.VALID.value; // Field: sha512_acc_csr.STATUS.SOC_HAS_LOCK always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.STATUS.SOC_HAS_LOCK.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.STATUS.SOC_HAS_LOCK.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.STATUS.SOC_HAS_LOCK.next; @@ -803,10 +783,8 @@ module sha512_acc_csr ( for(genvar i0=0; i0<16; i0++) begin // Field: sha512_acc_csr.DIGEST[].DIGEST always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.DIGEST[i0].DIGEST.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.DIGEST[i0].DIGEST.value; + automatic logic load_next_c = '0; if(hwif_in.DIGEST[i0].DIGEST.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -827,10 +805,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.CONTROL.ZEROIZE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CONTROL.ZEROIZE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CONTROL.ZEROIZE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CONTROL && decoded_req_is_wr) begin // SW write next_c = (field_storage.CONTROL.ZEROIZE.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -851,10 +827,8 @@ module sha512_acc_csr ( assign hwif_out.CONTROL.ZEROIZE.value = field_storage.CONTROL.ZEROIZE.value; // Field: sha512_acc_csr.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -871,10 +845,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -891,10 +863,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_en_r.error0_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error0_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error0_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -911,10 +881,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_en_r.error1_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error1_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error1_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -931,10 +899,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_en_r.error2_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error2_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error2_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -951,10 +917,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_en_r.error3_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error3_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error3_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -971,10 +935,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.notif_intr_en_r.notif_cmd_done_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -991,10 +953,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -1013,10 +973,8 @@ module sha512_acc_csr ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: sha512_acc_csr.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -1035,10 +993,8 @@ module sha512_acc_csr ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: sha512_acc_csr.intr_block_rf.error_internal_intr_r.error0_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error0_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1061,10 +1017,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_internal_intr_r.error1_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error1_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1087,10 +1041,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_internal_intr_r.error2_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error2_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1113,10 +1065,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_internal_intr_r.error3_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1144,10 +1094,8 @@ module sha512_acc_csr ( || |(field_storage.intr_block_rf.error_internal_intr_r.error3_sts.value & field_storage.intr_block_rf.error_intr_en_r.error3_en.value); // Field: sha512_acc_csr.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1172,10 +1120,8 @@ module sha512_acc_csr ( |(field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_done_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_done_en.value); // Field: sha512_acc_csr.intr_block_rf.error_intr_trig_r.error0_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1195,10 +1141,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_trig_r.error1_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1218,10 +1162,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_trig_r.error2_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1241,10 +1183,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error_intr_trig_r.error3_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -1264,10 +1204,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1287,10 +1225,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error0_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error0_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error0_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error0_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1321,10 +1257,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error1_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error1_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error1_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error1_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1355,10 +1289,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error2_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error2_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error2_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error2_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1389,10 +1321,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error3_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error3_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error3_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error3_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1423,10 +1353,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.notif_cmd_done_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_done_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_done_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -1457,10 +1385,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error0_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error0_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error0_trig.value; load_next_c = '1; @@ -1488,10 +1414,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error1_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error1_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error1_trig.value; load_next_c = '1; @@ -1519,10 +1443,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error2_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error2_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error2_trig.value; load_next_c = '1; @@ -1550,10 +1472,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.error3_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error3_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error3_trig.value; load_next_c = '1; @@ -1581,10 +1501,8 @@ module sha512_acc_csr ( end // Field: sha512_acc_csr.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_done_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_done_trig.value; load_next_c = '1; @@ -1625,7 +1543,7 @@ module sha512_acc_csr ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [44-1:0][31:0] readback_array; assign readback_array[0][0:0] = (decoded_reg_strb.LOCK && !decoded_req_is_wr) ? field_storage.LOCK.LOCK.value : '0; @@ -1707,4 +1625,4 @@ module sha512_acc_csr ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.cptra_pwrgood) -endmodule +endmodule \ No newline at end of file diff --git a/src/soc_ifc/rtl/soc_ifc_reg.sv b/src/soc_ifc/rtl/soc_ifc_reg.sv index 60e85ee1f..b2fa45d40 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg.sv +++ b/src/soc_ifc/rtl/soc_ifc_reg.sv @@ -1916,10 +1916,8 @@ module soc_ifc_reg ( // Field: soc_ifc_reg.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc.value & ~(decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -1940,10 +1938,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc.value = field_storage.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc.value; // Field: soc_ifc_reg.CPTRA_HW_ERROR_FATAL.dccm_ecc_unc always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_FATAL.dccm_ecc_unc.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_FATAL.dccm_ecc_unc.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_FATAL.dccm_ecc_unc.value & ~(decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -1964,10 +1960,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_FATAL.dccm_ecc_unc.value = field_storage.CPTRA_HW_ERROR_FATAL.dccm_ecc_unc.value; // Field: soc_ifc_reg.CPTRA_HW_ERROR_FATAL.nmi_pin always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_FATAL.nmi_pin.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_FATAL.nmi_pin.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_FATAL.nmi_pin.value & ~(decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -1988,10 +1982,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_FATAL.nmi_pin.value = field_storage.CPTRA_HW_ERROR_FATAL.nmi_pin.value; // Field: soc_ifc_reg.CPTRA_HW_ERROR_FATAL.crypto_err always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_FATAL.crypto_err.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_FATAL.crypto_err.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_FATAL.crypto_err.value & ~(decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -2012,10 +2004,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_FATAL.crypto_err.value = field_storage.CPTRA_HW_ERROR_FATAL.crypto_err.value; // Field: soc_ifc_reg.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_no_lock always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_no_lock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_no_lock.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_NON_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_no_lock.value & ~(decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2036,10 +2026,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_no_lock.value = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_no_lock.value; // Field: soc_ifc_reg.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_ooo always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_ooo.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_ooo.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_NON_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_ooo.value & ~(decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -2060,10 +2048,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_ooo.value = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_prot_ooo.value; // Field: soc_ifc_reg.CPTRA_HW_ERROR_NON_FATAL.mbox_ecc_unc always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_ecc_unc.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_ecc_unc.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_NON_FATAL && decoded_req_is_wr) begin // SW write 1 clear next_c = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_ecc_unc.value & ~(decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -2084,10 +2070,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_NON_FATAL.mbox_ecc_unc.value = field_storage.CPTRA_HW_ERROR_NON_FATAL.mbox_ecc_unc.value; // Field: soc_ifc_reg.CPTRA_FW_ERROR_FATAL.error_code always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FW_ERROR_FATAL.error_code.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_FW_ERROR_FATAL.error_code.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FW_ERROR_FATAL && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_FW_ERROR_FATAL.error_code.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2109,10 +2093,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FW_ERROR_FATAL.error_code.swmod = decoded_reg_strb.CPTRA_FW_ERROR_FATAL && decoded_req_is_wr; // Field: soc_ifc_reg.CPTRA_FW_ERROR_NON_FATAL.error_code always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FW_ERROR_NON_FATAL.error_code.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_FW_ERROR_NON_FATAL.error_code.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FW_ERROR_NON_FATAL && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_FW_ERROR_NON_FATAL.error_code.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2134,10 +2116,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FW_ERROR_NON_FATAL.error_code.swmod = decoded_reg_strb.CPTRA_FW_ERROR_NON_FATAL && decoded_req_is_wr; // Field: soc_ifc_reg.CPTRA_HW_ERROR_ENC.error_code always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_HW_ERROR_ENC.error_code.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_HW_ERROR_ENC.error_code.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_HW_ERROR_ENC && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_HW_ERROR_ENC.error_code.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2155,10 +2135,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_HW_ERROR_ENC.error_code.value = field_storage.CPTRA_HW_ERROR_ENC.error_code.value; // Field: soc_ifc_reg.CPTRA_FW_ERROR_ENC.error_code always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FW_ERROR_ENC.error_code.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_FW_ERROR_ENC.error_code.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FW_ERROR_ENC && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_FW_ERROR_ENC.error_code.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2177,10 +2155,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: soc_ifc_reg.CPTRA_FW_EXTENDED_ERROR_INFO[].error_info always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FW_EXTENDED_ERROR_INFO[i0].error_info.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_FW_EXTENDED_ERROR_INFO[i0].error_info.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FW_EXTENDED_ERROR_INFO[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_FW_EXTENDED_ERROR_INFO[i0].error_info.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2199,10 +2175,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_BOOT_STATUS.status always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_BOOT_STATUS.status.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_BOOT_STATUS.status.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_BOOT_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_BOOT_STATUS.status.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2220,10 +2194,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_BOOT_STATUS.status.value = field_storage.CPTRA_BOOT_STATUS.status.value; // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.status always_comb begin - automatic logic [23:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FLOW_STATUS.status.value; - load_next_c = '0; + automatic logic [23:0] next_c = field_storage.CPTRA_FLOW_STATUS.status.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_FLOW_STATUS.status.value & ~decoded_wr_biten[23:0]) | (decoded_wr_data[23:0] & decoded_wr_biten[23:0]); load_next_c = '1; @@ -2240,10 +2212,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.idevid_csr_ready always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value & ~decoded_wr_biten[24:24]) | (decoded_wr_data[24:24] & decoded_wr_biten[24:24]); load_next_c = '1; @@ -2261,10 +2231,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FLOW_STATUS.idevid_csr_ready.value = field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value; // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.ready_for_fw always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FLOW_STATUS.ready_for_fw.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_FLOW_STATUS.ready_for_fw.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_FLOW_STATUS.ready_for_fw.value & ~decoded_wr_biten[28:28]) | (decoded_wr_data[28:28] & decoded_wr_biten[28:28]); load_next_c = '1; @@ -2282,10 +2250,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FLOW_STATUS.ready_for_fw.value = field_storage.CPTRA_FLOW_STATUS.ready_for_fw.value; // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.ready_for_runtime always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FLOW_STATUS.ready_for_runtime.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_FLOW_STATUS.ready_for_runtime.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_FLOW_STATUS.ready_for_runtime.value & ~decoded_wr_biten[29:29]) | (decoded_wr_data[29:29] & decoded_wr_biten[29:29]); load_next_c = '1; @@ -2303,10 +2269,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FLOW_STATUS.ready_for_runtime.value = field_storage.CPTRA_FLOW_STATUS.ready_for_runtime.value; // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.mailbox_flow_done always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FLOW_STATUS.mailbox_flow_done.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_FLOW_STATUS.mailbox_flow_done.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_FLOW_STATUS.mailbox_flow_done.value & ~decoded_wr_biten[31:31]) | (decoded_wr_data[31:31] & decoded_wr_biten[31:31]); load_next_c = '1; @@ -2324,10 +2288,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FLOW_STATUS.mailbox_flow_done.value = field_storage.CPTRA_FLOW_STATUS.mailbox_flow_done.value; // Field: soc_ifc_reg.CPTRA_RESET_REASON.FW_UPD_RESET always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_RESET_REASON.FW_UPD_RESET.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_RESET_REASON.FW_UPD_RESET.value; + automatic logic load_next_c = '0; if(hwif_in.CPTRA_RESET_REASON.FW_UPD_RESET.we) begin // HW Write - we next_c = hwif_in.CPTRA_RESET_REASON.FW_UPD_RESET.next; load_next_c = '1; @@ -2345,10 +2307,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_RESET_REASON.FW_UPD_RESET.value = field_storage.CPTRA_RESET_REASON.FW_UPD_RESET.value; // Field: soc_ifc_reg.CPTRA_RESET_REASON.WARM_RESET always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_RESET_REASON.WARM_RESET.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_RESET_REASON.WARM_RESET.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.CPTRA_RESET_REASON.WARM_RESET.next; @@ -2367,10 +2327,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<5; i0++) begin // Field: soc_ifc_reg.CPTRA_MBOX_VALID_PAUSER[].PAUSER always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_MBOX_VALID_PAUSER[i0].PAUSER.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_MBOX_VALID_PAUSER[i0].PAUSER.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_MBOX_VALID_PAUSER[i0] && decoded_req_is_wr && !(hwif_in.CPTRA_MBOX_VALID_PAUSER[i0].PAUSER.swwel)) begin // SW write next_c = (field_storage.CPTRA_MBOX_VALID_PAUSER[i0].PAUSER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2390,10 +2348,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<5; i0++) begin // Field: soc_ifc_reg.CPTRA_MBOX_PAUSER_LOCK[].LOCK always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_MBOX_PAUSER_LOCK[i0].LOCK.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_MBOX_PAUSER_LOCK[i0].LOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_MBOX_PAUSER_LOCK[i0] && decoded_req_is_wr && !(hwif_in.CPTRA_MBOX_PAUSER_LOCK[i0].LOCK.swwel)) begin // SW write next_c = (field_storage.CPTRA_MBOX_PAUSER_LOCK[i0].LOCK.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2412,10 +2368,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_TRNG_VALID_PAUSER.PAUSER always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TRNG_VALID_PAUSER.PAUSER.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_TRNG_VALID_PAUSER.PAUSER.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TRNG_VALID_PAUSER && decoded_req_is_wr && !(hwif_in.CPTRA_TRNG_VALID_PAUSER.PAUSER.swwel)) begin // SW write next_c = (field_storage.CPTRA_TRNG_VALID_PAUSER.PAUSER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2433,10 +2387,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_TRNG_VALID_PAUSER.PAUSER.value = field_storage.CPTRA_TRNG_VALID_PAUSER.PAUSER.value; // Field: soc_ifc_reg.CPTRA_TRNG_PAUSER_LOCK.LOCK always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TRNG_PAUSER_LOCK.LOCK.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_TRNG_PAUSER_LOCK.LOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TRNG_PAUSER_LOCK && decoded_req_is_wr && !(hwif_in.CPTRA_TRNG_PAUSER_LOCK.LOCK.swwel)) begin // SW write next_c = (field_storage.CPTRA_TRNG_PAUSER_LOCK.LOCK.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2455,10 +2407,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: soc_ifc_reg.CPTRA_TRNG_DATA[].DATA always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TRNG_DATA[i0].DATA.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_TRNG_DATA[i0].DATA.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TRNG_DATA[i0] && decoded_req_is_wr && hwif_in.CPTRA_TRNG_DATA[i0].DATA.swwe) begin // SW write next_c = (field_storage.CPTRA_TRNG_DATA[i0].DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2480,10 +2430,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_TRNG_CTRL.clear always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TRNG_CTRL.clear.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_TRNG_CTRL.clear.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TRNG_CTRL && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_TRNG_CTRL.clear.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2504,10 +2452,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_TRNG_CTRL.clear.value = field_storage.CPTRA_TRNG_CTRL.clear.value; // Field: soc_ifc_reg.CPTRA_TRNG_STATUS.DATA_REQ always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TRNG_STATUS.DATA_REQ.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_TRNG_STATUS.DATA_REQ.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TRNG_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_TRNG_STATUS.DATA_REQ.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2525,10 +2471,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_TRNG_STATUS.DATA_REQ.value = field_storage.CPTRA_TRNG_STATUS.DATA_REQ.value; // Field: soc_ifc_reg.CPTRA_TRNG_STATUS.DATA_WR_DONE always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TRNG_STATUS.DATA_WR_DONE.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_TRNG_STATUS.DATA_WR_DONE.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TRNG_STATUS && decoded_req_is_wr && hwif_in.CPTRA_TRNG_STATUS.DATA_WR_DONE.swwe) begin // SW write next_c = (field_storage.CPTRA_TRNG_STATUS.DATA_WR_DONE.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -2548,10 +2492,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_FUSE_WR_DONE.done always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FUSE_WR_DONE.done.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_FUSE_WR_DONE.done.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FUSE_WR_DONE && decoded_req_is_wr && hwif_in.CPTRA_FUSE_WR_DONE.done.swwe) begin // SW write next_c = (field_storage.CPTRA_FUSE_WR_DONE.done.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2570,10 +2512,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FUSE_WR_DONE.done.swmod = decoded_reg_strb.CPTRA_FUSE_WR_DONE && decoded_req_is_wr; // Field: soc_ifc_reg.CPTRA_TIMER_CONFIG.clk_period always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_TIMER_CONFIG.clk_period.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_TIMER_CONFIG.clk_period.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_TIMER_CONFIG && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_TIMER_CONFIG.clk_period.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2590,10 +2530,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_BOOTFSM_GO.GO always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_BOOTFSM_GO.GO.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_BOOTFSM_GO.GO.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_BOOTFSM_GO && decoded_req_is_wr && hwif_in.soc_req) begin // SW write next_c = (field_storage.CPTRA_BOOTFSM_GO.GO.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2614,10 +2552,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_BOOTFSM_GO.GO.value = field_storage.CPTRA_BOOTFSM_GO.GO.value; // Field: soc_ifc_reg.CPTRA_DBG_MANUF_SERVICE_REG.DATA always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_DBG_MANUF_SERVICE_REG.DATA.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_DBG_MANUF_SERVICE_REG.DATA.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_DBG_MANUF_SERVICE_REG && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_DBG_MANUF_SERVICE_REG.DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2638,10 +2574,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_DBG_MANUF_SERVICE_REG.DATA.value = field_storage.CPTRA_DBG_MANUF_SERVICE_REG.DATA.value; // Field: soc_ifc_reg.CPTRA_CLK_GATING_EN.clk_gating_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_CLK_GATING_EN.clk_gating_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_CLK_GATING_EN.clk_gating_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_CLK_GATING_EN && decoded_req_is_wr && hwif_in.soc_req) begin // SW write next_c = (field_storage.CPTRA_CLK_GATING_EN.clk_gating_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2660,10 +2594,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_GENERIC_INPUT_WIRES[].generic_wires always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_GENERIC_INPUT_WIRES[i0].generic_wires.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_GENERIC_INPUT_WIRES[i0].generic_wires.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_in.CPTRA_GENERIC_INPUT_WIRES[i0].generic_wires.next; @@ -2683,10 +2615,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_GENERIC_OUTPUT_WIRES[].generic_wires always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_GENERIC_OUTPUT_WIRES[i0].generic_wires.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_GENERIC_OUTPUT_WIRES[i0].generic_wires.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_GENERIC_OUTPUT_WIRES[i0] && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_GENERIC_OUTPUT_WIRES[i0].generic_wires.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2706,10 +2636,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_FW_REV_ID[].REV_ID always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FW_REV_ID[i0].REV_ID.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_FW_REV_ID[i0].REV_ID.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FW_REV_ID[i0] && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_FW_REV_ID[i0].REV_ID.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2728,10 +2656,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_WDT_TIMER1_EN.timer1_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_TIMER1_EN.timer1_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_WDT_TIMER1_EN.timer1_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_TIMER1_EN && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_TIMER1_EN.timer1_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2749,10 +2675,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_WDT_TIMER1_EN.timer1_en.value = field_storage.CPTRA_WDT_TIMER1_EN.timer1_en.value; // Field: soc_ifc_reg.CPTRA_WDT_TIMER1_CTRL.timer1_restart always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_TIMER1_CTRL.timer1_restart.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_WDT_TIMER1_CTRL.timer1_restart.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_TIMER1_CTRL && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_TIMER1_CTRL.timer1_restart.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2774,10 +2698,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_WDT_TIMER1_TIMEOUT_PERIOD[].timer1_timeout_period always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_TIMER1_TIMEOUT_PERIOD[i0].timer1_timeout_period.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_WDT_TIMER1_TIMEOUT_PERIOD[i0].timer1_timeout_period.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_TIMER1_TIMEOUT_PERIOD[i0] && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_TIMER1_TIMEOUT_PERIOD[i0].timer1_timeout_period.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2796,10 +2718,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_WDT_TIMER2_EN.timer2_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_TIMER2_EN.timer2_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_WDT_TIMER2_EN.timer2_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_TIMER2_EN && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_TIMER2_EN.timer2_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2817,10 +2737,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_WDT_TIMER2_EN.timer2_en.value = field_storage.CPTRA_WDT_TIMER2_EN.timer2_en.value; // Field: soc_ifc_reg.CPTRA_WDT_TIMER2_CTRL.timer2_restart always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_TIMER2_CTRL.timer2_restart.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_WDT_TIMER2_CTRL.timer2_restart.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_TIMER2_CTRL && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_TIMER2_CTRL.timer2_restart.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2842,10 +2760,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_WDT_TIMER2_TIMEOUT_PERIOD[].timer2_timeout_period always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_TIMER2_TIMEOUT_PERIOD[i0].timer2_timeout_period.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_WDT_TIMER2_TIMEOUT_PERIOD[i0].timer2_timeout_period.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_TIMER2_TIMEOUT_PERIOD[i0] && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_TIMER2_TIMEOUT_PERIOD[i0].timer2_timeout_period.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2864,10 +2780,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_WDT_STATUS.t1_timeout always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_STATUS.t1_timeout.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_WDT_STATUS.t1_timeout.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_STATUS.t1_timeout.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2888,10 +2802,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_WDT_STATUS.t1_timeout.value = field_storage.CPTRA_WDT_STATUS.t1_timeout.value; // Field: soc_ifc_reg.CPTRA_WDT_STATUS.t2_timeout always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_STATUS.t2_timeout.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_WDT_STATUS.t2_timeout.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.CPTRA_WDT_STATUS.t2_timeout.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -2912,10 +2824,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_WDT_STATUS.t2_timeout.value = field_storage.CPTRA_WDT_STATUS.t2_timeout.value; // Field: soc_ifc_reg.CPTRA_FUSE_VALID_PAUSER.PAUSER always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FUSE_VALID_PAUSER.PAUSER.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_FUSE_VALID_PAUSER.PAUSER.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FUSE_VALID_PAUSER && decoded_req_is_wr && !(hwif_in.CPTRA_FUSE_VALID_PAUSER.PAUSER.swwel)) begin // SW write next_c = (field_storage.CPTRA_FUSE_VALID_PAUSER.PAUSER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2933,10 +2843,8 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_FUSE_VALID_PAUSER.PAUSER.value = field_storage.CPTRA_FUSE_VALID_PAUSER.PAUSER.value; // Field: soc_ifc_reg.CPTRA_FUSE_PAUSER_LOCK.LOCK always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_FUSE_PAUSER_LOCK.LOCK.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.CPTRA_FUSE_PAUSER_LOCK.LOCK.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FUSE_PAUSER_LOCK && decoded_req_is_wr && !(hwif_in.CPTRA_FUSE_PAUSER_LOCK.LOCK.swwel)) begin // SW write next_c = (field_storage.CPTRA_FUSE_PAUSER_LOCK.LOCK.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -2955,10 +2863,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_WDT_CFG[].TIMEOUT always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_WDT_CFG[i0].TIMEOUT.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_WDT_CFG[i0].TIMEOUT.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_WDT_CFG[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_WDT_CFG[i0].TIMEOUT.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -2976,10 +2882,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_iTRNG_ENTROPY_CONFIG_0.low_threshold always_comb begin - automatic logic [15:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_0.low_threshold.value; - load_next_c = '0; + automatic logic [15:0] next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_0.low_threshold.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_iTRNG_ENTROPY_CONFIG_0 && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_0.low_threshold.value & ~decoded_wr_biten[15:0]) | (decoded_wr_data[15:0] & decoded_wr_biten[15:0]); load_next_c = '1; @@ -2996,10 +2900,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_iTRNG_ENTROPY_CONFIG_0.high_threshold always_comb begin - automatic logic [15:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_0.high_threshold.value; - load_next_c = '0; + automatic logic [15:0] next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_0.high_threshold.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_iTRNG_ENTROPY_CONFIG_0 && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_0.high_threshold.value & ~decoded_wr_biten[31:16]) | (decoded_wr_data[31:16] & decoded_wr_biten[31:16]); load_next_c = '1; @@ -3016,10 +2918,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_iTRNG_ENTROPY_CONFIG_1.repetition_count always_comb begin - automatic logic [15:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_1.repetition_count.value; - load_next_c = '0; + automatic logic [15:0] next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_1.repetition_count.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_iTRNG_ENTROPY_CONFIG_1 && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_1.repetition_count.value & ~decoded_wr_biten[15:0]) | (decoded_wr_data[15:0] & decoded_wr_biten[15:0]); load_next_c = '1; @@ -3036,10 +2936,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.CPTRA_iTRNG_ENTROPY_CONFIG_1.RSVD always_comb begin - automatic logic [15:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_1.RSVD.value; - load_next_c = '0; + automatic logic [15:0] next_c = field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_1.RSVD.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_iTRNG_ENTROPY_CONFIG_1 && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_iTRNG_ENTROPY_CONFIG_1.RSVD.value & ~decoded_wr_biten[31:16]) | (decoded_wr_data[31:16] & decoded_wr_biten[31:16]); load_next_c = '1; @@ -3057,10 +2955,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin // Field: soc_ifc_reg.CPTRA_RSVD_REG[].RSVD always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.CPTRA_RSVD_REG[i0].RSVD.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.CPTRA_RSVD_REG[i0].RSVD.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_RSVD_REG[i0] && decoded_req_is_wr) begin // SW write next_c = (field_storage.CPTRA_RSVD_REG[i0].RSVD.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3079,10 +2975,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: soc_ifc_reg.fuse_uds_seed[].seed always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_uds_seed[i0].seed.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_uds_seed[i0].seed.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_uds_seed[i0] && decoded_req_is_wr && !(hwif_in.fuse_uds_seed[i0].seed.swwel)) begin // SW write next_c = (field_storage.fuse_uds_seed[i0].seed.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3105,10 +2999,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: soc_ifc_reg.fuse_field_entropy[].seed always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_field_entropy[i0].seed.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_field_entropy[i0].seed.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_field_entropy[i0] && decoded_req_is_wr && !(hwif_in.fuse_field_entropy[i0].seed.swwel)) begin // SW write next_c = (field_storage.fuse_field_entropy[i0].seed.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3131,10 +3023,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: soc_ifc_reg.fuse_key_manifest_pk_hash[].hash always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_key_manifest_pk_hash[i0].hash.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_key_manifest_pk_hash[i0].hash.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_key_manifest_pk_hash[i0] && decoded_req_is_wr && !(hwif_in.fuse_key_manifest_pk_hash[i0].hash.swwel)) begin // SW write next_c = (field_storage.fuse_key_manifest_pk_hash[i0].hash.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3153,10 +3043,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.fuse_key_manifest_pk_hash_mask.mask always_comb begin - automatic logic [3:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_key_manifest_pk_hash_mask.mask.value; - load_next_c = '0; + automatic logic [3:0] next_c = field_storage.fuse_key_manifest_pk_hash_mask.mask.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_key_manifest_pk_hash_mask && decoded_req_is_wr && !(hwif_in.fuse_key_manifest_pk_hash_mask.mask.swwel)) begin // SW write next_c = (field_storage.fuse_key_manifest_pk_hash_mask.mask.value & ~decoded_wr_biten[3:0]) | (decoded_wr_data[3:0] & decoded_wr_biten[3:0]); load_next_c = '1; @@ -3175,10 +3063,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<12; i0++) begin // Field: soc_ifc_reg.fuse_owner_pk_hash[].hash always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_owner_pk_hash[i0].hash.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_owner_pk_hash[i0].hash.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_owner_pk_hash[i0] && decoded_req_is_wr && !(hwif_in.fuse_owner_pk_hash[i0].hash.swwel)) begin // SW write next_c = (field_storage.fuse_owner_pk_hash[i0].hash.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3197,10 +3083,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.fuse_fmc_key_manifest_svn.svn always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_fmc_key_manifest_svn.svn.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_fmc_key_manifest_svn.svn.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_fmc_key_manifest_svn && decoded_req_is_wr && !(hwif_in.fuse_fmc_key_manifest_svn.svn.swwel)) begin // SW write next_c = (field_storage.fuse_fmc_key_manifest_svn.svn.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3219,10 +3103,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<4; i0++) begin // Field: soc_ifc_reg.fuse_runtime_svn[].svn always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_runtime_svn[i0].svn.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_runtime_svn[i0].svn.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_runtime_svn[i0] && decoded_req_is_wr && !(hwif_in.fuse_runtime_svn[i0].svn.swwel)) begin // SW write next_c = (field_storage.fuse_runtime_svn[i0].svn.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3241,10 +3123,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.fuse_anti_rollback_disable.dis always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_anti_rollback_disable.dis.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.fuse_anti_rollback_disable.dis.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_anti_rollback_disable && decoded_req_is_wr && !(hwif_in.fuse_anti_rollback_disable.dis.swwel)) begin // SW write next_c = (field_storage.fuse_anti_rollback_disable.dis.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3263,10 +3143,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<24; i0++) begin // Field: soc_ifc_reg.fuse_idevid_cert_attr[].cert always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_idevid_cert_attr[i0].cert.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_idevid_cert_attr[i0].cert.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_idevid_cert_attr[i0] && decoded_req_is_wr && !(hwif_in.fuse_idevid_cert_attr[i0].cert.swwel)) begin // SW write next_c = (field_storage.fuse_idevid_cert_attr[i0].cert.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3286,10 +3164,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<4; i0++) begin // Field: soc_ifc_reg.fuse_idevid_manuf_hsm_id[].hsm_id always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_idevid_manuf_hsm_id[i0].hsm_id.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_idevid_manuf_hsm_id[i0].hsm_id.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_idevid_manuf_hsm_id[i0] && decoded_req_is_wr && !(hwif_in.fuse_idevid_manuf_hsm_id[i0].hsm_id.swwel)) begin // SW write next_c = (field_storage.fuse_idevid_manuf_hsm_id[i0].hsm_id.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3308,10 +3184,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.fuse_life_cycle.life_cycle always_comb begin - automatic logic [1:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_life_cycle.life_cycle.value; - load_next_c = '0; + automatic logic [1:0] next_c = field_storage.fuse_life_cycle.life_cycle.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_life_cycle && decoded_req_is_wr && !(hwif_in.fuse_life_cycle.life_cycle.swwel)) begin // SW write next_c = (field_storage.fuse_life_cycle.life_cycle.value & ~decoded_wr_biten[1:0]) | (decoded_wr_data[1:0] & decoded_wr_biten[1:0]); load_next_c = '1; @@ -3329,10 +3203,8 @@ module soc_ifc_reg ( assign hwif_out.fuse_life_cycle.life_cycle.value = field_storage.fuse_life_cycle.life_cycle.value; // Field: soc_ifc_reg.fuse_lms_verify.lms_verify always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_lms_verify.lms_verify.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.fuse_lms_verify.lms_verify.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_lms_verify && decoded_req_is_wr && !(hwif_in.fuse_lms_verify.lms_verify.swwel)) begin // SW write next_c = (field_storage.fuse_lms_verify.lms_verify.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3350,10 +3222,8 @@ module soc_ifc_reg ( assign hwif_out.fuse_lms_verify.lms_verify.value = field_storage.fuse_lms_verify.lms_verify.value; // Field: soc_ifc_reg.fuse_lms_revocation.lms_revocation always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_lms_revocation.lms_revocation.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.fuse_lms_revocation.lms_revocation.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_lms_revocation && decoded_req_is_wr && !(hwif_in.fuse_lms_revocation.lms_revocation.swwel)) begin // SW write next_c = (field_storage.fuse_lms_revocation.lms_revocation.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3371,10 +3241,8 @@ module soc_ifc_reg ( assign hwif_out.fuse_lms_revocation.lms_revocation.value = field_storage.fuse_lms_revocation.lms_revocation.value; // Field: soc_ifc_reg.fuse_soc_stepping_id.soc_stepping_id always_comb begin - automatic logic [15:0] next_c; - automatic logic load_next_c; - next_c = field_storage.fuse_soc_stepping_id.soc_stepping_id.value; - load_next_c = '0; + automatic logic [15:0] next_c = field_storage.fuse_soc_stepping_id.soc_stepping_id.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.fuse_soc_stepping_id && decoded_req_is_wr && !(hwif_in.fuse_soc_stepping_id.soc_stepping_id.swwel)) begin // SW write next_c = (field_storage.fuse_soc_stepping_id.soc_stepping_id.value & ~decoded_wr_biten[15:0]) | (decoded_wr_data[15:0] & decoded_wr_biten[15:0]); load_next_c = '1; @@ -3393,10 +3261,8 @@ module soc_ifc_reg ( for(genvar i0=0; i0<8; i0++) begin // Field: soc_ifc_reg.internal_obf_key[].key always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_obf_key[i0].key.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_obf_key[i0].key.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_obf_key[i0] && decoded_req_is_wr && hwif_in.internal_obf_key[i0].key.swwe) begin // SW write next_c = (field_storage.internal_obf_key[i0].key.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3420,10 +3286,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.internal_iccm_lock.lock always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_iccm_lock.lock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_iccm_lock.lock.value; + automatic logic load_next_c = '0; if(hwif_in.internal_iccm_lock.lock.hwclr) begin // HW Clear next_c = '0; load_next_c = '1; @@ -3444,10 +3308,8 @@ module soc_ifc_reg ( assign hwif_out.internal_iccm_lock.lock.value = field_storage.internal_iccm_lock.lock.value; // Field: soc_ifc_reg.internal_fw_update_reset.core_rst always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_fw_update_reset.core_rst.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_fw_update_reset.core_rst.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_fw_update_reset && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_fw_update_reset.core_rst.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3468,10 +3330,8 @@ module soc_ifc_reg ( assign hwif_out.internal_fw_update_reset.core_rst.value = field_storage.internal_fw_update_reset.core_rst.value; // Field: soc_ifc_reg.internal_fw_update_reset_wait_cycles.wait_cycles always_comb begin - automatic logic [7:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_fw_update_reset_wait_cycles.wait_cycles.value; - load_next_c = '0; + automatic logic [7:0] next_c = field_storage.internal_fw_update_reset_wait_cycles.wait_cycles.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_fw_update_reset_wait_cycles && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_fw_update_reset_wait_cycles.wait_cycles.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]); load_next_c = '1; @@ -3489,10 +3349,8 @@ module soc_ifc_reg ( assign hwif_out.internal_fw_update_reset_wait_cycles.wait_cycles.value = field_storage.internal_fw_update_reset_wait_cycles.wait_cycles.value; // Field: soc_ifc_reg.internal_nmi_vector.vec always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_nmi_vector.vec.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_nmi_vector.vec.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_nmi_vector && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_nmi_vector.vec.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3510,10 +3368,8 @@ module soc_ifc_reg ( assign hwif_out.internal_nmi_vector.vec.value = field_storage.internal_nmi_vector.vec.value; // Field: soc_ifc_reg.internal_hw_error_fatal_mask.mask_iccm_ecc_unc always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_hw_error_fatal_mask.mask_iccm_ecc_unc.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_hw_error_fatal_mask.mask_iccm_ecc_unc.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_hw_error_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_hw_error_fatal_mask.mask_iccm_ecc_unc.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3531,10 +3387,8 @@ module soc_ifc_reg ( assign hwif_out.internal_hw_error_fatal_mask.mask_iccm_ecc_unc.value = field_storage.internal_hw_error_fatal_mask.mask_iccm_ecc_unc.value; // Field: soc_ifc_reg.internal_hw_error_fatal_mask.mask_dccm_ecc_unc always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_hw_error_fatal_mask.mask_dccm_ecc_unc.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_hw_error_fatal_mask.mask_dccm_ecc_unc.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_hw_error_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_hw_error_fatal_mask.mask_dccm_ecc_unc.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -3552,10 +3406,8 @@ module soc_ifc_reg ( assign hwif_out.internal_hw_error_fatal_mask.mask_dccm_ecc_unc.value = field_storage.internal_hw_error_fatal_mask.mask_dccm_ecc_unc.value; // Field: soc_ifc_reg.internal_hw_error_fatal_mask.mask_nmi_pin always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_hw_error_fatal_mask.mask_nmi_pin.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_hw_error_fatal_mask.mask_nmi_pin.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_hw_error_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_hw_error_fatal_mask.mask_nmi_pin.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -3573,10 +3425,8 @@ module soc_ifc_reg ( assign hwif_out.internal_hw_error_fatal_mask.mask_nmi_pin.value = field_storage.internal_hw_error_fatal_mask.mask_nmi_pin.value; // Field: soc_ifc_reg.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_hw_error_non_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3594,10 +3444,8 @@ module soc_ifc_reg ( assign hwif_out.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock.value = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock.value; // Field: soc_ifc_reg.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_hw_error_non_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -3615,10 +3463,8 @@ module soc_ifc_reg ( assign hwif_out.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo.value = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo.value; // Field: soc_ifc_reg.internal_hw_error_non_fatal_mask.mask_mbox_ecc_unc always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_ecc_unc.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_ecc_unc.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_hw_error_non_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_hw_error_non_fatal_mask.mask_mbox_ecc_unc.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -3636,10 +3482,8 @@ module soc_ifc_reg ( assign hwif_out.internal_hw_error_non_fatal_mask.mask_mbox_ecc_unc.value = field_storage.internal_hw_error_non_fatal_mask.mask_mbox_ecc_unc.value; // Field: soc_ifc_reg.internal_fw_error_fatal_mask.mask always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_fw_error_fatal_mask.mask.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_fw_error_fatal_mask.mask.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_fw_error_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_fw_error_fatal_mask.mask.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3657,10 +3501,8 @@ module soc_ifc_reg ( assign hwif_out.internal_fw_error_fatal_mask.mask.value = field_storage.internal_fw_error_fatal_mask.mask.value; // Field: soc_ifc_reg.internal_fw_error_non_fatal_mask.mask always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_fw_error_non_fatal_mask.mask.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_fw_error_non_fatal_mask.mask.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_fw_error_non_fatal_mask && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_fw_error_non_fatal_mask.mask.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3678,10 +3520,8 @@ module soc_ifc_reg ( assign hwif_out.internal_fw_error_non_fatal_mask.mask.value = field_storage.internal_fw_error_non_fatal_mask.mask.value; // Field: soc_ifc_reg.internal_rv_mtime_l.count_l always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_rv_mtime_l.count_l.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_rv_mtime_l.count_l.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_rv_mtime_l && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_rv_mtime_l.count_l.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3709,10 +3549,8 @@ module soc_ifc_reg ( assign hwif_out.internal_rv_mtime_l.count_l.overflow = field_combo.internal_rv_mtime_l.count_l.overflow; // Field: soc_ifc_reg.internal_rv_mtime_h.count_h always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_rv_mtime_h.count_h.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_rv_mtime_h.count_h.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_rv_mtime_h && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_rv_mtime_h.count_h.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3739,10 +3577,8 @@ module soc_ifc_reg ( assign hwif_out.internal_rv_mtime_h.count_h.swmod = decoded_reg_strb.internal_rv_mtime_h && decoded_req_is_wr; // Field: soc_ifc_reg.internal_rv_mtimecmp_l.compare_l always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_rv_mtimecmp_l.compare_l.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_rv_mtimecmp_l.compare_l.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_rv_mtimecmp_l && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_rv_mtimecmp_l.compare_l.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3760,10 +3596,8 @@ module soc_ifc_reg ( assign hwif_out.internal_rv_mtimecmp_l.compare_l.value = field_storage.internal_rv_mtimecmp_l.compare_l.value; // Field: soc_ifc_reg.internal_rv_mtimecmp_h.compare_h always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.internal_rv_mtimecmp_h.compare_h.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.internal_rv_mtimecmp_h.compare_h.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.internal_rv_mtimecmp_h && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.internal_rv_mtimecmp_h.compare_h.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -3781,10 +3615,8 @@ module soc_ifc_reg ( assign hwif_out.internal_rv_mtimecmp_h.compare_h.value = field_storage.internal_rv_mtimecmp_h.compare_h.value; // Field: soc_ifc_reg.intr_block_rf.global_intr_en_r.error_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.error_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.error_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3801,10 +3633,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.global_intr_en_r.notif_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.global_intr_en_r.notif_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.global_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.global_intr_en_r.notif_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -3821,10 +3651,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_internal_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_internal_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -3841,10 +3669,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_inv_dev_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_inv_dev_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_inv_dev_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_inv_dev_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -3861,10 +3687,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_cmd_fail_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_cmd_fail_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_cmd_fail_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_cmd_fail_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -3881,10 +3705,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_bad_fuse_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_bad_fuse_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_bad_fuse_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_bad_fuse_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -3901,10 +3723,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_iccm_blocked_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_iccm_blocked_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_iccm_blocked_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_iccm_blocked_en.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]); load_next_c = '1; @@ -3921,10 +3741,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_mbox_ecc_unc_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_mbox_ecc_unc_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_mbox_ecc_unc_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_mbox_ecc_unc_en.value & ~decoded_wr_biten[5:5]) | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]); load_next_c = '1; @@ -3941,10 +3759,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_wdt_timer1_timeout_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer1_timeout_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer1_timeout_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer1_timeout_en.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -3961,10 +3777,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_en_r.error_wdt_timer2_timeout_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer2_timeout_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer2_timeout_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer2_timeout_en.value & ~decoded_wr_biten[7:7]) | (decoded_wr_data[7:7] & decoded_wr_biten[7:7]); load_next_c = '1; @@ -3981,10 +3795,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_en_r.notif_cmd_avail_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_avail_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_avail_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_cmd_avail_en.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -4001,10 +3813,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_en_r.notif_mbox_ecc_cor_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_mbox_ecc_cor_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_mbox_ecc_cor_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_mbox_ecc_cor_en.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -4021,10 +3831,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_en_r.notif_debug_locked_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_debug_locked_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_debug_locked_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_debug_locked_en.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -4041,10 +3849,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_en_r.notif_scan_mode_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_scan_mode_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_scan_mode_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_scan_mode_en.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -4061,10 +3867,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_en_r.notif_soc_req_lock_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_soc_req_lock_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_soc_req_lock_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_soc_req_lock_en.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]); load_next_c = '1; @@ -4081,10 +3885,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_en_r.notif_gen_in_toggle_en always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_gen_in_toggle_en.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_en_r.notif_gen_in_toggle_en.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_en_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_intr_en_r.notif_gen_in_toggle_en.value & ~decoded_wr_biten[5:5]) | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]); load_next_c = '1; @@ -4101,10 +3903,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.error_internal_intr_r.intr; @@ -4123,10 +3923,8 @@ module soc_ifc_reg ( |(field_storage.intr_block_rf.error_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.error_en.value); // Field: soc_ifc_reg.intr_block_rf.notif_global_intr_r.agg_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value; + automatic logic load_next_c = '0; // HW Write next_c = hwif_out.intr_block_rf.notif_internal_intr_r.intr; @@ -4145,10 +3943,8 @@ module soc_ifc_reg ( |(field_storage.intr_block_rf.notif_global_intr_r.agg_sts.value & field_storage.intr_block_rf.global_intr_en_r.notif_en.value); // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_internal_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_internal_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; load_next_c = '1; @@ -4171,10 +3967,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_inv_dev_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_inv_dev_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_inv_dev_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_inv_dev_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value; load_next_c = '1; @@ -4197,10 +3991,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_cmd_fail_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_cmd_fail_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_cmd_fail_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_cmd_fail_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value; load_next_c = '1; @@ -4223,10 +4015,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_bad_fuse_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_bad_fuse_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_bad_fuse_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_bad_fuse_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value; load_next_c = '1; @@ -4249,10 +4039,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_iccm_blocked_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_iccm_blocked_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_iccm_blocked_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_iccm_blocked_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value; load_next_c = '1; @@ -4275,10 +4063,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_mbox_ecc_unc_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_mbox_ecc_unc_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_mbox_ecc_unc_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_mbox_ecc_unc_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value; load_next_c = '1; @@ -4301,10 +4087,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_wdt_timer1_timeout_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer1_timeout_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer1_timeout_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer1_timeout_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value; load_next_c = '1; @@ -4327,10 +4111,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_r.error_wdt_timer2_timeout_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer2_timeout_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer2_timeout_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer2_timeout_sts.value | field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value; load_next_c = '1; @@ -4362,10 +4144,8 @@ module soc_ifc_reg ( || |(field_storage.intr_block_rf.error_internal_intr_r.error_wdt_timer2_timeout_sts.value & field_storage.intr_block_rf.error_intr_en_r.error_wdt_timer2_timeout_en.value); // Field: soc_ifc_reg.intr_block_rf.notif_internal_intr_r.notif_cmd_avail_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_avail_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_avail_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_cmd_avail_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value; load_next_c = '1; @@ -4388,10 +4168,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_internal_intr_r.notif_mbox_ecc_cor_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_mbox_ecc_cor_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_mbox_ecc_cor_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_mbox_ecc_cor_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value; load_next_c = '1; @@ -4414,10 +4192,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_internal_intr_r.notif_debug_locked_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_debug_locked_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_debug_locked_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_debug_locked_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value; load_next_c = '1; @@ -4440,10 +4216,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_internal_intr_r.notif_scan_mode_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_scan_mode_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_scan_mode_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_scan_mode_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value; load_next_c = '1; @@ -4466,10 +4240,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_internal_intr_r.notif_soc_req_lock_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_soc_req_lock_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_soc_req_lock_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_soc_req_lock_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value; load_next_c = '1; @@ -4492,10 +4264,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_internal_intr_r.notif_gen_in_toggle_sts always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_gen_in_toggle_sts.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_gen_in_toggle_sts.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value != '0) begin // stickybit next_c = field_storage.intr_block_rf.notif_internal_intr_r.notif_gen_in_toggle_sts.value | field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value; load_next_c = '1; @@ -4525,10 +4295,8 @@ module soc_ifc_reg ( || |(field_storage.intr_block_rf.notif_internal_intr_r.notif_gen_in_toggle_sts.value & field_storage.intr_block_rf.notif_intr_en_r.notif_gen_in_toggle_en.value); // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_internal_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -4548,10 +4316,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_inv_dev_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -4571,10 +4337,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -4594,10 +4358,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -4617,10 +4379,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]); load_next_c = '1; @@ -4640,10 +4400,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]); load_next_c = '1; @@ -4663,10 +4421,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]); load_next_c = '1; @@ -4686,10 +4442,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value | (decoded_wr_data[7:7] & decoded_wr_biten[7:7]); load_next_c = '1; @@ -4709,10 +4463,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; @@ -4732,10 +4484,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]); load_next_c = '1; @@ -4755,10 +4505,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]); load_next_c = '1; @@ -4778,10 +4526,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]); load_next_c = '1; @@ -4801,10 +4547,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]); load_next_c = '1; @@ -4824,10 +4568,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_intr_trig_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write 1 set next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]); load_next_c = '1; @@ -4847,10 +4589,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_internal_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_internal_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -4881,10 +4621,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_inv_dev_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_inv_dev_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_inv_dev_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_inv_dev_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_inv_dev_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -4915,10 +4653,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_cmd_fail_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_cmd_fail_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_cmd_fail_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_cmd_fail_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_cmd_fail_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -4949,10 +4685,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_bad_fuse_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_bad_fuse_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_bad_fuse_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_bad_fuse_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_bad_fuse_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -4983,10 +4717,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_iccm_blocked_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_iccm_blocked_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_iccm_blocked_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_iccm_blocked_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_iccm_blocked_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5017,10 +4749,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_mbox_ecc_unc_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_mbox_ecc_unc_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_mbox_ecc_unc_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_mbox_ecc_unc_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_mbox_ecc_unc_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5051,10 +4781,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_wdt_timer1_timeout_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_wdt_timer1_timeout_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_wdt_timer1_timeout_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_wdt_timer1_timeout_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_wdt_timer1_timeout_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5085,10 +4813,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_wdt_timer2_timeout_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_wdt_timer2_timeout_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.error_wdt_timer2_timeout_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.error_wdt_timer2_timeout_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.error_wdt_timer2_timeout_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5119,10 +4845,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_cmd_avail_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_avail_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_cmd_avail_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_cmd_avail_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_cmd_avail_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5153,10 +4877,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_mbox_ecc_cor_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_mbox_ecc_cor_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_mbox_ecc_cor_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_mbox_ecc_cor_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_mbox_ecc_cor_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5187,10 +4909,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_debug_locked_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_debug_locked_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_debug_locked_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_debug_locked_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_debug_locked_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5221,10 +4941,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_scan_mode_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_scan_mode_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_scan_mode_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_scan_mode_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_scan_mode_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5255,10 +4973,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_soc_req_lock_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_soc_req_lock_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_soc_req_lock_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_soc_req_lock_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_soc_req_lock_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5289,10 +5005,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_gen_in_toggle_intr_count_r.cnt always_comb begin - automatic logic [31:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_gen_in_toggle_intr_count_r.cnt.value; - load_next_c = '0; + automatic logic [31:0] next_c = field_storage.intr_block_rf.notif_gen_in_toggle_intr_count_r.cnt.value; + automatic logic load_next_c = '0; if(decoded_reg_strb.intr_block_rf.notif_gen_in_toggle_intr_count_r && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write next_c = (field_storage.intr_block_rf.notif_gen_in_toggle_intr_count_r.cnt.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; @@ -5323,10 +5037,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_internal_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_internal_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_internal_trig.value; load_next_c = '1; @@ -5354,10 +5066,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_inv_dev_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_inv_dev_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_inv_dev_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_inv_dev_trig.value; load_next_c = '1; @@ -5385,10 +5095,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_cmd_fail_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_cmd_fail_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_cmd_fail_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_cmd_fail_trig.value; load_next_c = '1; @@ -5416,10 +5124,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_bad_fuse_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_bad_fuse_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_bad_fuse_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_bad_fuse_trig.value; load_next_c = '1; @@ -5447,10 +5153,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_iccm_blocked_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_iccm_blocked_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_iccm_blocked_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_iccm_blocked_trig.value; load_next_c = '1; @@ -5478,10 +5182,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_mbox_ecc_unc_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_mbox_ecc_unc_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_mbox_ecc_unc_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_mbox_ecc_unc_trig.value; load_next_c = '1; @@ -5509,10 +5211,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_wdt_timer1_timeout_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_wdt_timer1_timeout_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_wdt_timer1_timeout_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer1_timeout_trig.value; load_next_c = '1; @@ -5540,10 +5240,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.error_wdt_timer2_timeout_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.error_wdt_timer2_timeout_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.error_wdt_timer2_timeout_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.error_intr_trig_r.error_wdt_timer2_timeout_trig.value; load_next_c = '1; @@ -5571,10 +5269,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_cmd_avail_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_cmd_avail_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_cmd_avail_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_cmd_avail_trig.value; load_next_c = '1; @@ -5602,10 +5298,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_mbox_ecc_cor_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_mbox_ecc_cor_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_mbox_ecc_cor_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_mbox_ecc_cor_trig.value; load_next_c = '1; @@ -5633,10 +5327,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_debug_locked_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_debug_locked_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_debug_locked_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_debug_locked_trig.value; load_next_c = '1; @@ -5664,10 +5356,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_scan_mode_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_scan_mode_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_scan_mode_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_scan_mode_trig.value; load_next_c = '1; @@ -5695,10 +5385,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_soc_req_lock_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_soc_req_lock_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_soc_req_lock_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_soc_req_lock_trig.value; load_next_c = '1; @@ -5726,10 +5414,8 @@ module soc_ifc_reg ( end // Field: soc_ifc_reg.intr_block_rf.notif_gen_in_toggle_intr_count_incr_r.pulse always_comb begin - automatic logic [0:0] next_c; - automatic logic load_next_c; - next_c = field_storage.intr_block_rf.notif_gen_in_toggle_intr_count_incr_r.pulse.value; - load_next_c = '0; + automatic logic [0:0] next_c = field_storage.intr_block_rf.notif_gen_in_toggle_intr_count_incr_r.pulse.value; + automatic logic load_next_c = '0; if(field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value) begin // HW Write - we next_c = field_storage.intr_block_rf.notif_intr_trig_r.notif_gen_in_toggle_trig.value; load_next_c = '1; @@ -5770,7 +5456,7 @@ module soc_ifc_reg ( logic readback_err; logic readback_done; logic [31:0] readback_data; - + // Assign readback values to a flattened array logic [186-1:0][31:0] readback_array; assign readback_array[0][0:0] = (decoded_reg_strb.CPTRA_HW_ERROR_FATAL && !decoded_req_is_wr) ? field_storage.CPTRA_HW_ERROR_FATAL.iccm_ecc_unc.value : '0; @@ -5803,7 +5489,7 @@ module soc_ifc_reg ( assign readback_array[17][1:0] = (decoded_reg_strb.CPTRA_SECURITY_STATE && !decoded_req_is_wr) ? hwif_in.CPTRA_SECURITY_STATE.device_lifecycle.next : '0; assign readback_array[17][2:2] = (decoded_reg_strb.CPTRA_SECURITY_STATE && !decoded_req_is_wr) ? hwif_in.CPTRA_SECURITY_STATE.debug_locked.next : '0; assign readback_array[17][3:3] = (decoded_reg_strb.CPTRA_SECURITY_STATE && !decoded_req_is_wr) ? hwif_in.CPTRA_SECURITY_STATE.scan_mode.next : '0; - assign readback_array[17][31:4] = (decoded_reg_strb.CPTRA_SECURITY_STATE && !decoded_req_is_wr) ? 28'h0 : '0; + assign readback_array[17][31:4] = (decoded_reg_strb.CPTRA_SECURITY_STATE && !decoded_req_is_wr) ? 'h0 : '0; for(genvar i0=0; i0<5; i0++) begin assign readback_array[i0*1 + 18][31:0] = (decoded_reg_strb.CPTRA_MBOX_VALID_PAUSER[i0] && !decoded_req_is_wr) ? field_storage.CPTRA_MBOX_VALID_PAUSER[i0].PAUSER.value : '0; end @@ -5836,7 +5522,7 @@ module soc_ifc_reg ( for(genvar i0=0; i0<2; i0++) begin assign readback_array[i0*1 + 51][31:0] = (decoded_reg_strb.CPTRA_GENERIC_OUTPUT_WIRES[i0] && !decoded_req_is_wr) ? field_storage.CPTRA_GENERIC_OUTPUT_WIRES[i0].generic_wires.value : '0; end - assign readback_array[53][15:0] = (decoded_reg_strb.CPTRA_HW_REV_ID && !decoded_req_is_wr) ? 16'h11 : '0; + assign readback_array[53][15:0] = (decoded_reg_strb.CPTRA_HW_REV_ID && !decoded_req_is_wr) ? 'h11 : '0; assign readback_array[53][31:16] = (decoded_reg_strb.CPTRA_HW_REV_ID && !decoded_req_is_wr) ? hwif_in.CPTRA_HW_REV_ID.SOC_STEPPING_ID.next : '0; for(genvar i0=0; i0<2; i0++) begin assign readback_array[i0*1 + 54][31:0] = (decoded_reg_strb.CPTRA_FW_REV_ID[i0] && !decoded_req_is_wr) ? field_storage.CPTRA_FW_REV_ID[i0].REV_ID.value : '0; @@ -5914,7 +5600,7 @@ module soc_ifc_reg ( assign readback_array[141][0:0] = (decoded_reg_strb.internal_hw_error_fatal_mask && !decoded_req_is_wr) ? field_storage.internal_hw_error_fatal_mask.mask_iccm_ecc_unc.value : '0; assign readback_array[141][1:1] = (decoded_reg_strb.internal_hw_error_fatal_mask && !decoded_req_is_wr) ? field_storage.internal_hw_error_fatal_mask.mask_dccm_ecc_unc.value : '0; assign readback_array[141][2:2] = (decoded_reg_strb.internal_hw_error_fatal_mask && !decoded_req_is_wr) ? field_storage.internal_hw_error_fatal_mask.mask_nmi_pin.value : '0; - assign readback_array[141][3:3] = (decoded_reg_strb.internal_hw_error_fatal_mask && !decoded_req_is_wr) ? 1'h0 : '0; + assign readback_array[141][3:3] = (decoded_reg_strb.internal_hw_error_fatal_mask && !decoded_req_is_wr) ? 'h0 : '0; assign readback_array[141][31:4] = '0; assign readback_array[142][0:0] = (decoded_reg_strb.internal_hw_error_non_fatal_mask && !decoded_req_is_wr) ? field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_no_lock.value : '0; assign readback_array[142][1:1] = (decoded_reg_strb.internal_hw_error_non_fatal_mask && !decoded_req_is_wr) ? field_storage.internal_hw_error_non_fatal_mask.mask_mbox_prot_ooo.value : '0; @@ -6040,4 +5726,4 @@ module soc_ifc_reg ( `CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, !hwif_in.cptra_pwrgood) -endmodule +endmodule \ No newline at end of file diff --git a/src/spi_host/config/spi_host.vf b/src/spi_host/config/spi_host.vf index 1b0661420..bc5f5157f 100644 --- a/src/spi_host/config/spi_host.vf +++ b/src/spi_host/config/spi_host.vf @@ -71,4 +71,4 @@ ${CALIPTRA_ROOT}/src/spi_host/rtl/spi_host_core.sv ${CALIPTRA_ROOT}/src/spi_host/rtl/spi_host_data_fifos.sv ${CALIPTRA_ROOT}/src/spi_host/rtl/spi_host_fsm.sv ${CALIPTRA_ROOT}/src/spi_host/rtl/spi_host_reg_top.sv -${CALIPTRA_ROOT}/src/spi_host/rtl/spi_host_shift_register.sv +${CALIPTRA_ROOT}/src/spi_host/rtl/spi_host_shift_register.sv \ No newline at end of file diff --git a/src/uart/config/uart.vf b/src/uart/config/uart.vf index 5fb62f4db..c4cf5f0e3 100644 --- a/src/uart/config/uart.vf +++ b/src/uart/config/uart.vf @@ -66,4 +66,4 @@ ${CALIPTRA_ROOT}/src/uart/rtl/uart_tx.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_reg_top.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_rx.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart.sv -${CALIPTRA_ROOT}/src/uart/rtl/uart_core.sv +${CALIPTRA_ROOT}/src/uart/rtl/uart_core.sv \ No newline at end of file diff --git a/src/uart/config/uart_tb.vf b/src/uart/config/uart_tb.vf index 4332da0e6..f23f71300 100644 --- a/src/uart/config/uart_tb.vf +++ b/src/uart/config/uart_tb.vf @@ -68,4 +68,4 @@ ${CALIPTRA_ROOT}/src/uart/rtl/uart_tx.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_reg_top.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart_rx.sv ${CALIPTRA_ROOT}/src/uart/rtl/uart.sv -${CALIPTRA_ROOT}/src/uart/rtl/uart_core.sv +${CALIPTRA_ROOT}/src/uart/rtl/uart_core.sv \ No newline at end of file diff --git a/tools/scripts/Makefile b/tools/scripts/Makefile index 3beb5328c..d35916464 100644 --- a/tools/scripts/Makefile +++ b/tools/scripts/Makefile @@ -62,6 +62,7 @@ PRINTF_DIR = $(CALIPTRA_ROOT)/src/integration/test_suites/libs/printf COMP_LIB_NAMES := aes \ doe \ ecc \ + mldsa \ hmac \ keyvault \ datavault \ diff --git a/tools/scripts/reg_doc_gen.py b/tools/scripts/reg_doc_gen.py index d8bbb0e26..4c1a833a5 100644 --- a/tools/scripts/reg_doc_gen.py +++ b/tools/scripts/reg_doc_gen.py @@ -87,6 +87,19 @@ def enter_Reg(self, node): if self.tick == "`": address = address.replace("0x", "32'h", 1) self.file.write((self.tick + "define " + register_name.upper() + "\t(" + address + ")\n").expandtabs(100)) + def enter_Mem(self, node): + #getting and printing the absolute address and path for each register + mem_name = node.get_path("_", '_{index:d}') + address = hex(node.absolute_address) + if self.tick == "`": + address = address.replace("0x", "32'h", 1) + self.file.write((self.tick + "define " + mem_name.upper() + "\t(" + address + ")\n").expandtabs(100)) + #getting and printing the relative address and path for each mem (relative to the addr map it belongs to) + mem_name = node.get_rel_path(self.top_node.parent,"^","_",'_{index:d}') + address = hex(node.address_offset + self.regfile_offset) + if self.tick == "`": + address = address.replace("0x", "32'h", 1) + self.file.write((self.tick + "define " + mem_name.upper() + "\t(" + address + ")\n").expandtabs(100)) def enter_Field(self, node): field_name = node.get_rel_path(self.top_node.parent,"^","_",'_{index:d}') if node.width == 1: diff --git a/tools/scripts/reg_doc_gen.sh b/tools/scripts/reg_doc_gen.sh index 367c77598..608de542c 100755 --- a/tools/scripts/reg_doc_gen.sh +++ b/tools/scripts/reg_doc_gen.sh @@ -20,6 +20,7 @@ src/keyvault/rtl/kv_reg.rdl \ src/pcrvault/rtl/pv_reg.rdl \ src/datavault/rtl/dv_reg.rdl \ src/ecc/rtl/ecc_reg.rdl \ +src/mldsa/rtl/mldsa_reg.rdl \ src/sha512/rtl/sha512_reg.rdl \ src/sha256/rtl/sha256_reg.rdl \ src/soc_ifc/rtl/mbox_csr.rdl \ diff --git a/tools/scripts/reg_gen.sh b/tools/scripts/reg_gen.sh index 74b9a71fd..9da1352e3 100755 --- a/tools/scripts/reg_gen.sh +++ b/tools/scripts/reg_gen.sh @@ -14,6 +14,7 @@ # limitations under the License. # +python3 tools/scripts/reg_gen.py src/mldsa/rtl/mldsa_reg.rdl python3 tools/scripts/reg_gen.py src/keyvault/rtl/kv_reg.rdl python3 tools/scripts/reg_gen.py src/pcrvault/rtl/pv_reg.rdl python3 tools/scripts/reg_gen.py src/datavault/rtl/dv_reg.rdl