From bc69589ea85c0b6a49f65f318ba60626152cb038 Mon Sep 17 00:00:00 2001 From: Kiran Upadhyayula Date: Wed, 9 Oct 2024 12:00:33 -0700 Subject: [PATCH] Add adamsbridge as a submodule --- .github/workflows/build-test-verilator.yml | 1 + .github/workflows/interactive-debugging.yml | 8 ++++++++ .gitmodules | 3 +++ README.md | 2 ++ src/integration/rtl/caliptra_top.sv | 3 +-- src/integration/rtl/config_defines.svh | 2 +- submodules/adams-bridge | 1 + 7 files changed, 17 insertions(+), 3 deletions(-) create mode 100644 .gitmodules create mode 160000 submodules/adams-bridge diff --git a/.github/workflows/build-test-verilator.yml b/.github/workflows/build-test-verilator.yml index 86e08f477..d3ec4205e 100644 --- a/.github/workflows/build-test-verilator.yml +++ b/.github/workflows/build-test-verilator.yml @@ -187,6 +187,7 @@ jobs: - name: Run Caliptra Verilator Smoke Test run: | CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge cd tools/scripts make verilator CALIPTRA_ROOT=$CALIPTRA_ROOT TESTNAME=${{ matrix.test_name }} | tee output.log # Search the last 30 lines of the output for "TESTCASE PASSED" diff --git a/.github/workflows/interactive-debugging.yml b/.github/workflows/interactive-debugging.yml index de8923cf1..b9d8676b4 100644 --- a/.github/workflows/interactive-debugging.yml +++ b/.github/workflows/interactive-debugging.yml @@ -225,6 +225,7 @@ jobs: - name: Build Verilated simulation run: | export CALIPTRA_ROOT=$(pwd) + export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge mkdir run make -C run -f ${CALIPTRA_ROOT}/tools/scripts/Makefile verilator-build TESTNAME=infinite_loop DEBUG_UNLOCKED=1 \ OBJCACHE="" CC=gcc CXX=g++ LINK=g++ @@ -233,6 +234,7 @@ jobs: - name: Test core register access run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge cd run ${CALIPTRA_ROOT}/.github/scripts/gdb_test.sh \ /bin/bash -c 'cd ${CALIPTRA_ROOT}/src/integration/test_suites/infinite_loop && ./dump_and_compare.sh' @@ -240,6 +242,7 @@ jobs: - name: Test memory access run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge cd run ${CALIPTRA_ROOT}/.github/scripts/gdb_test.sh \ /bin/bash -c 'cd ${CALIPTRA_ROOT}/src/integration/test_suites/infinite_loop && ./mem_access.sh' @@ -247,6 +250,7 @@ jobs: - name: Test peripheral access run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge cd run ${CALIPTRA_ROOT}/.github/scripts/gdb_test.sh \ /bin/bash -c 'cd ${CALIPTRA_ROOT}/src/integration/test_suites/infinite_loop && ./peripheral_access.sh' @@ -300,6 +304,7 @@ jobs: - name: Build Verilated simulation run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge mkdir run make -C run -f ${CALIPTRA_ROOT}/tools/scripts/Makefile verilator-build TESTNAME=infinite_loop DEBUG_UNLOCKED=1 FORCE_CPU_RESET=1 \ OBJCACHE="" CC=gcc CXX=g++ LINK=g++ @@ -308,6 +313,7 @@ jobs: - name: Test peripheral access with core in reset run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge cd run ${CALIPTRA_ROOT}/.github/scripts/openocd_test.sh \ -f board/caliptra-verilator-rst.cfg \ @@ -316,6 +322,7 @@ jobs: - name: Build Verilated simulation run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge rm -rf run/* make -C run -f ${CALIPTRA_ROOT}/tools/scripts/Makefile verilator-build TESTNAME=infinite_loop DEBUG_UNLOCKED=1 \ OBJCACHE="" CC=gcc CXX=g++ LINK=g++ @@ -324,6 +331,7 @@ jobs: - name: Test JTAG access with clock gating run: | export CALIPTRA_ROOT=$(pwd) + ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge cd run ${CALIPTRA_ROOT}/.github/scripts/openocd_test.sh \ -f board/caliptra-verilator.cfg \ diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 000000000..ffdac4f6e --- /dev/null +++ b/.gitmodules @@ -0,0 +1,3 @@ +[submodule "submodules/adams-bridge"] + path = submodules/adams-bridge + url = https://github.com/chipsalliance/adams-bridge diff --git a/README.md b/README.md index 794dbc847..1a76a2aac 100644 --- a/README.md +++ b/README.md @@ -141,6 +141,8 @@ caliptra-rtl | |-- soc_ifc | |-- spi_host | `-- uart +|-- submodules + |-- adams-bridge `-- tools |-- README |-- scripts diff --git a/src/integration/rtl/caliptra_top.sv b/src/integration/rtl/caliptra_top.sv index 9fb091609..62d7b7949 100755 --- a/src/integration/rtl/caliptra_top.sv +++ b/src/integration/rtl/caliptra_top.sv @@ -934,8 +934,7 @@ hmac_ctrl #( mldsa_top #( .AHB_DATA_WIDTH(`CALIPTRA_AHB_HDATA_SIZE), - .AHB_ADDR_WIDTH(`CALIPTRA_SLAVE_ADDR_WIDTH(`CALIPTRA_SLAVE_SEL_MLDSA)), - .CLIENT_DATA_WIDTH(`CALIPTRA_AHB_HDATA_SIZE/2) //TODO confirm + .AHB_ADDR_WIDTH(`CALIPTRA_SLAVE_ADDR_WIDTH(`CALIPTRA_SLAVE_SEL_MLDSA)) ) mldsa ( .clk (clk_cg), .rst_b (cptra_noncore_rst_b), diff --git a/src/integration/rtl/config_defines.svh b/src/integration/rtl/config_defines.svh index 18c0bbd7d..155000439 100755 --- a/src/integration/rtl/config_defines.svh +++ b/src/integration/rtl/config_defines.svh @@ -56,7 +56,7 @@ `define CALIPTRA_SLAVE_SEL_IMEM 14 `define CALIPTRA_SLAVE_SEL_CSRNG 15 `define CALIPTRA_SLAVE_SEL_ENTROPY_SRC 16 - `define CALIPTRA_SLAVE_SEL_MLDSA 17 + `define CALIPTRA_SLAVE_SEL_MLDSA 17 // Interrupt Assignments // NOTE Vector 0 is reserved by VeeR diff --git a/submodules/adams-bridge b/submodules/adams-bridge new file mode 160000 index 000000000..8101752a9 --- /dev/null +++ b/submodules/adams-bridge @@ -0,0 +1 @@ +Subproject commit 8101752a9daf69bb88da6918b8273726c22e7484