diff --git a/hw/ip/csrng/rtl/csrng_cmd_stage.sv b/hw/ip/csrng/rtl/csrng_cmd_stage.sv
index ec988fad55c1e..f6e4687b9d791 100644
--- a/hw/ip/csrng/rtl/csrng_cmd_stage.sv
+++ b/hw/ip/csrng/rtl/csrng_cmd_stage.sv
@@ -90,6 +90,8 @@ module csrng_cmd_stage import csrng_pkg::*; #(
   logic                    cmd_gen_flag_q, cmd_gen_flag_d;
   logic [11:0]             cmd_gen_cmd_q, cmd_gen_cmd_d;
 
+  logic                    local_escalate;
+
 
   always_ff @(posedge clk_i or negedge rst_ni)
     if (!rst_ni) begin
@@ -194,6 +196,8 @@ module csrng_cmd_stage import csrng_pkg::*; #(
     .err_o(cmd_gen_cnt_err_o)
   );
 
+  // For naming consistency
+  assign local_escalate = cmd_gen_cnt_err_o;
 
   //---------------------------------------------------------
   // state machine to process command
@@ -254,87 +258,139 @@ module csrng_cmd_stage import csrng_pkg::*; #(
     cmd_stage_sm_err_o = 1'b0;
     unique case (state_q)
       Idle: begin
-        if (!cmd_fifo_zero) begin
-          state_d = ArbGnt;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (cs_enable_i) begin
+          if (!cmd_fifo_zero) begin
+            state_d = ArbGnt;
+          end
         end
       end
       ArbGnt: begin
-        cmd_arb_req_o = 1'b1;
-        if (cmd_arb_gnt_i) begin
-          state_d = SendSOP;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          cmd_arb_req_o = 1'b1;
+          if (cmd_arb_gnt_i) begin
+            state_d = SendSOP;
+          end
         end
       end
       SendSOP: begin
-        cmd_gen_1st_req = 1'b1;
-        cmd_arb_sop_o = 1'b1;
-        cmd_fifo_pop = 1'b1;
-        if (sfifo_cmd_rdata[24:12] == GenBitsCntrWidth'(1)) begin
-          cmd_gen_cnt_last = 1'b1;
-        end
-        if (cmd_len == '0) begin
-          cmd_arb_eop_o = 1'b1;
-          state_d = GenCmdChk;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
         end else begin
-          state_d = SendMOP;
-        end
-      end
-      SendMOP: begin
-        if (!cmd_fifo_zero) begin
+          cmd_gen_1st_req = 1'b1;
+          cmd_arb_sop_o = 1'b1;
           cmd_fifo_pop = 1'b1;
-          cmd_len_dec = 1'b1;
-          if (cmd_len_q == 4'h1) begin
-            cmd_arb_mop_o = 1'b1;
+          if (sfifo_cmd_rdata[24:12] == GenBitsCntrWidth'(1)) begin
+            cmd_gen_cnt_last = 1'b1;
+          end
+          if (cmd_len == '0) begin
             cmd_arb_eop_o = 1'b1;
             state_d = GenCmdChk;
           end else begin
-            cmd_arb_mop_o = 1'b1;
+            state_d = SendMOP;
+          end
+        end
+      end
+      SendMOP: begin
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          if (!cmd_fifo_zero) begin
+            cmd_fifo_pop = 1'b1;
+            cmd_len_dec = 1'b1;
+            if (cmd_len_q == 4'h1) begin
+              cmd_arb_mop_o = 1'b1;
+              cmd_arb_eop_o = 1'b1;
+              state_d = GenCmdChk;
+            end else begin
+              cmd_arb_mop_o = 1'b1;
+            end
           end
         end
       end
       GenCmdChk: begin
-        if (cmd_gen_flag_q) begin
-          cmd_gen_cnt_dec= 1'b1;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          if (cmd_gen_flag_q) begin
+            cmd_gen_cnt_dec= 1'b1;
+          end
+          state_d = CmdAck;
         end
-        state_d = CmdAck;
       end
       CmdAck: begin
-        if (cmd_ack_i) begin
-          state_d = GenReq;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          if (cmd_ack_i) begin
+            state_d = GenReq;
+          end
         end
       end
       GenReq: begin
-        // flag set if a gen request
-        if (cmd_gen_flag_q) begin
-          // must stall if genbits fifo is not clear
-          if (!sfifo_genbits_full) begin
-            if (cmd_gen_cnt == '0) begin
-              cmd_final_ack = 1'b1;
-              state_d = Idle;
-            end else begin
-              // issue a subsequent gen request
-              state_d = GenArbGnt;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          // flag set if a gen request
+          if (cmd_gen_flag_q) begin
+            // must stall if genbits fifo is not clear
+            if (!sfifo_genbits_full) begin
+              if (cmd_gen_cnt == '0) begin
+                cmd_final_ack = 1'b1;
+                state_d = Idle;
+              end else begin
+                // issue a subsequent gen request
+                state_d = GenArbGnt;
+              end
             end
+          end else begin
+            // ack for the non-gen request case
+            cmd_final_ack = 1'b1;
+            state_d = Idle;
           end
-        end else begin
-          // ack for the non-gen request case
-          cmd_final_ack = 1'b1;
-          state_d = Idle;
         end
       end
       GenArbGnt: begin
-        cmd_arb_req_o = 1'b1;
-        if (cmd_arb_gnt_i) begin
-          state_d = GenSOP;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          cmd_arb_req_o = 1'b1;
+          if (cmd_arb_gnt_i) begin
+            state_d = GenSOP;
+          end
         end
       end
       GenSOP: begin
-        cmd_arb_sop_o = 1'b1;
-        cmd_arb_eop_o = 1'b1;
-        cmd_gen_inc_req = 1'b1;
-        state_d = GenCmdChk;
-        // check for final genbits beat
-        if (cmd_gen_cnt == GenBitsCntrWidth'(1)) begin
-          cmd_gen_cnt_last = 1'b1;
+        if (local_escalate) begin
+          state_d = Error;
+        end else if (!cs_enable_i) begin
+          state_d = Idle;
+        end else begin
+          cmd_arb_sop_o = 1'b1;
+          cmd_arb_eop_o = 1'b1;
+          cmd_gen_inc_req = 1'b1;
+          state_d = GenCmdChk;
+          // check for final genbits beat
+          if (cmd_gen_cnt == GenBitsCntrWidth'(1)) begin
+            cmd_gen_cnt_last = 1'b1;
+          end
         end
       end
       Error: begin
diff --git a/hw/ip/csrng/rtl/csrng_main_sm.sv b/hw/ip/csrng/rtl/csrng_main_sm.sv
index c7eb613f52204..dcf02c090e36f 100644
--- a/hw/ip/csrng/rtl/csrng_main_sm.sv
+++ b/hw/ip/csrng/rtl/csrng_main_sm.sv
@@ -53,6 +53,9 @@ module csrng_main_sm import csrng_pkg::*; #(
     main_sm_err_o = 1'b0;
     unique case (state_q)
       Idle: begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else
         if (enable_i) begin
           if (ctr_drbg_cmd_req_rdy_i) begin
             // signal the arbiter to grant this request
@@ -64,7 +67,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       ParseCmd: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           if (ctr_drbg_cmd_req_rdy_i) begin
@@ -96,7 +101,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       InstantPrep: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           if (flag0_i) begin
@@ -112,7 +119,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       InstantReq: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           instant_req_o = 1'b1;
@@ -120,7 +129,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       ReseedPrep: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           if (flag0_i) begin
@@ -136,7 +147,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       ReseedReq: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           reseed_req_o = 1'b1;
@@ -144,7 +157,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       GeneratePrep: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           // assumes all adata is present now
@@ -152,7 +167,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       GenerateReq: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           generate_req_o = 1'b1;
@@ -160,7 +177,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       UpdatePrep: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           // assumes all adata is present now
@@ -168,7 +187,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       UpdateReq: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           update_req_o = 1'b1;
@@ -176,7 +197,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       UninstantPrep: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           // assumes all adata is present now
@@ -184,7 +207,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       UninstantReq: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           uninstant_req_o = 1'b1;
@@ -192,7 +217,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       ClrAData: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           clr_adata_packer_o = 1'b1;
@@ -200,7 +227,9 @@ module csrng_main_sm import csrng_pkg::*; #(
         end
       end
       CmdCompWait: begin
-        if (!enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!enable_i) begin
           state_d = Idle;
         end else begin
           if (cmd_complete_i) begin
@@ -213,9 +242,6 @@ module csrng_main_sm import csrng_pkg::*; #(
       end
       default: state_d = Error;
     endcase
-    if (local_escalate_i) begin
-      state_d = Error;
-    end
   end
 
 endmodule
diff --git a/hw/ip/edn/rtl/edn_main_sm.sv b/hw/ip/edn/rtl/edn_main_sm.sv
index ee7ce1f26559b..329034d97d7f1 100644
--- a/hw/ip/edn/rtl/edn_main_sm.sv
+++ b/hw/ip/edn/rtl/edn_main_sm.sv
@@ -104,7 +104,9 @@ module edn_main_sm #(
     main_sm_err_o = 1'b0;
     unique case (state_q)
       Idle: begin
-        if (boot_req_mode_i && edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (boot_req_mode_i && edn_enable_i) begin
           state_d = BootLoadIns;
         end else if (auto_req_mode_i && edn_enable_i) begin
           state_d = AutoLoadIns;
@@ -114,15 +116,31 @@ module edn_main_sm #(
         end
       end
       BootLoadIns: begin
-        boot_wr_cmd_reg_o = 1'b1;
-        state_d = BootLoadGen;
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
+          state_d = Idle;
+        end
+        else begin
+          boot_wr_cmd_reg_o = 1'b1;
+          state_d = BootLoadGen;
+        end
       end
       BootLoadGen: begin
-        boot_wr_cmd_genfifo_o = 1'b1;
-        state_d = BootInsAckWait;
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
+          state_d = Idle;
+        end
+        else begin
+          boot_wr_cmd_genfifo_o = 1'b1;
+          state_d = BootInsAckWait;
+        end
       end
       BootInsAckWait: begin
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
           if (csrng_cmd_ack_i) begin
@@ -131,21 +149,32 @@ module edn_main_sm #(
         end
       end
       BootCaptGenCnt: begin
-        capt_gencmd_fifo_cnt_o = 1'b1;
-        state_d = BootSendGenCmd;
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
+          state_d = Idle;
+        end
+        else begin
+          capt_gencmd_fifo_cnt_o = 1'b1;
+          state_d = BootSendGenCmd;
+        end
       end
       BootSendGenCmd: begin
-        boot_send_gencmd_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          boot_send_gencmd_o = 1'b1;
           if (cmd_sent_i) begin
             state_d = BootGenAckWait;
           end
         end
       end
       BootGenAckWait: begin
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
           if (csrng_cmd_ack_i) begin
@@ -154,31 +183,43 @@ module edn_main_sm #(
         end
       end
       BootPulse: begin
-        main_sm_done_pulse_o = 1'b1;
-        state_d = BootDone;
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
+          state_d = Idle;
+        end else begin
+          main_sm_done_pulse_o = 1'b1;
+          state_d = BootDone;
+        end
       end
       BootDone: begin
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end
       end
       //-----------------------------------
       AutoLoadIns: begin
-        auto_set_intr_gate_o = 1'b1;
-        auto_first_ack_wait_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          auto_set_intr_gate_o = 1'b1;
+          auto_first_ack_wait_o = 1'b1;
           if (sw_cmd_req_load_i) begin
             state_d = AutoFirstAckWait;
           end
         end
       end
       AutoFirstAckWait: begin
-        auto_first_ack_wait_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          auto_first_ack_wait_o = 1'b1;
           if (csrng_cmd_ack_i) begin
             auto_clr_intr_gate_o = 1'b1;
             state_d = AutoDispatch;
@@ -186,20 +227,24 @@ module edn_main_sm #(
         end
       end
       AutoAckWait: begin
-        auto_req_mode_busy_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          auto_req_mode_busy_o = 1'b1;
           if (csrng_cmd_ack_i) begin
             state_d = AutoDispatch;
           end
         end
       end
       AutoDispatch: begin
-        auto_req_mode_busy_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          auto_req_mode_busy_o = 1'b1;
           if (!auto_req_mode_i) begin
             main_sm_done_pulse_o = 1'b1;
             state_d = Idle;
@@ -213,39 +258,57 @@ module edn_main_sm #(
         end
       end
       AutoCaptGenCnt: begin
-        auto_req_mode_busy_o = 1'b1;
-        capt_gencmd_fifo_cnt_o = 1'b1;
-        state_d = AutoSendGenCmd;
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
+          state_d = Idle;
+        end else begin
+          auto_req_mode_busy_o = 1'b1;
+          capt_gencmd_fifo_cnt_o = 1'b1;
+          state_d = AutoSendGenCmd;
+        end
       end
       AutoSendGenCmd: begin
-        auto_req_mode_busy_o = 1'b1;
-        send_gencmd_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          auto_req_mode_busy_o = 1'b1;
+          send_gencmd_o = 1'b1;
           if (cmd_sent_i) begin
             state_d = AutoAckWait;
           end
         end
       end
       AutoCaptReseedCnt: begin
-        auto_req_mode_busy_o = 1'b1;
-        capt_rescmd_fifo_cnt_o = 1'b1;
-        state_d = AutoSendReseedCmd;
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
+          state_d = Idle;
+        end else begin
+          auto_req_mode_busy_o = 1'b1;
+          capt_rescmd_fifo_cnt_o = 1'b1;
+          state_d = AutoSendReseedCmd;
+        end
       end
       AutoSendReseedCmd: begin
-        auto_req_mode_busy_o = 1'b1;
-        send_rescmd_o = 1'b1;
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end else begin
+          auto_req_mode_busy_o = 1'b1;
+          send_rescmd_o = 1'b1;
           if (cmd_sent_i) begin
             state_d = AutoAckWait;
           end
         end
       end
       SWPortMode: begin
-        if (!edn_enable_i) begin
+        if (local_escalate_i) begin
+          state_d = Error;
+        end else if (!edn_enable_i) begin
           state_d = Idle;
         end
       end
@@ -254,9 +317,6 @@ module edn_main_sm #(
       end
       default: state_d = Error;
     endcase
-    if (local_escalate_i) begin
-      state_d = Error;
-    end
   end
 
 endmodule