From 13745f356897a7499918287ff82e2cad4c4bd4ab Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 18 Oct 2024 16:54:43 +0200 Subject: [PATCH 01/10] applications: sdp: gpio: move SRAM partitions to backend overlays Move division of SRAM to backends' overlays so that it would be possible to have different FLPR SRAM size for each backend. Signed-off-by: Magdalena Pastula --- .../nrf54l15dk_nrf54l15_cpuflpr.overlay | 22 ------------------- .../nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay | 20 +++++++++++++++++ .../nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay | 20 +++++++++++++++++ 3 files changed, 40 insertions(+), 22 deletions(-) diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay index ccbed019993..165da128bfc 100644 --- a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay @@ -4,28 +4,6 @@ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause */ -/ { - soc { - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - - sram_tx: memory@2003c000 { - reg = <0x2003c000 0x0800>; - }; - - sram_rx: memory@2003c800 { - reg = <0x2003c800 0x0800>; - }; - }; - }; -}; - -&cpuflpr_sram { - reg = <0x2003d000 DT_SIZE_K(12)>; - ranges = <0x0 0x2003d000 0x3000>; -}; - &cpuflpr_vevif_rx { status = "okay"; interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay index 8413634b2da..4df6ef5eb5a 100644 --- a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay @@ -5,6 +5,21 @@ */ / { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@2003c000 { + reg = <0x2003c000 0x0800>; + }; + + sram_rx: memory@2003c800 { + reg = <0x2003c800 0x0800>; + }; + }; + }; + ipc { ipc0: ipc0 { compatible = "zephyr,ipc-icmsg"; @@ -16,3 +31,8 @@ }; }; }; + +&cpuflpr_sram { + reg = <0x2003d000 DT_SIZE_K(12)>; + ranges = <0x0 0x2003d000 0x3000>; +}; diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay index 747ef88e440..2192394fc45 100644 --- a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay @@ -5,9 +5,29 @@ */ / { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@2003c000 { + reg = <0x2003c000 0x0800>; + }; + + sram_rx: memory@2003c800 { + reg = <0x2003c800 0x0800>; + }; + }; + }; + mbox_consumer: mbox_consumer { compatible = "vnd,mbox-consumer"; mboxes = <&cpuflpr_vevif_rx 16>, <&cpuflpr_vevif_tx 20>; mbox-names = "rx", "tx"; }; }; + +&cpuflpr_sram { + reg = <0x2003d000 DT_SIZE_K(12)>; + ranges = <0x0 0x2003d000 0x3000>; +}; From 84fee7b70279af2d3bfa6f15decef79b5e5aad6d Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 13 Sep 2024 17:48:45 +0200 Subject: [PATCH 02/10] application: sdp: add icbmsg backend for eGPIO Add icbmsg as a possible backend for eGPIO. Signed-off-by: Magdalena Pastula --- applications/sdp/gpio/CMakeLists.txt | 1 + ...nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay | 40 +++++++++++++++++++ applications/sdp/gpio/sample.yaml | 13 ++++++ applications/sdp/gpio/src/backend/backend.h | 4 +- 4 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay diff --git a/applications/sdp/gpio/CMakeLists.txt b/applications/sdp/gpio/CMakeLists.txt index 2e996f5b15c..e1f91a4b6eb 100644 --- a/applications/sdp/gpio/CMakeLists.txt +++ b/applications/sdp/gpio/CMakeLists.txt @@ -11,4 +11,5 @@ project(emulated_gpio) target_sources(app PRIVATE src/main.c) target_sources_ifdef(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG app PRIVATE src/backend/backend_icmsg.c) +target_sources_ifdef(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICBMSG app PRIVATE src/backend/backend_icmsg.c) target_sources_ifdef(CONFIG_GPIO_NRFE_EGPIO_BACKEND_MBOX app PRIVATE src/backend/backend_mbox.c) diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay new file mode 100644 index 00000000000..3b45642d36c --- /dev/null +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@2003b800 { + reg = <0x2003b800 0x0800>; + }; + + sram_rx: memory@2003c000 { + reg = <0x2003c000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icbmsg"; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + tx-blocks = <18>; + rx-blocks = <16>; + mboxes = <&cpuflpr_vevif_rx 16>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuflpr_sram { + reg = <0x2003c800 DT_SIZE_K(14)>; + ranges = <0x0 0x2003c800 0x3800>; +}; diff --git a/applications/sdp/gpio/sample.yaml b/applications/sdp/gpio/sample.yaml index 05eaef69915..cec7ec72170 100644 --- a/applications/sdp/gpio/sample.yaml +++ b/applications/sdp/gpio/sample.yaml @@ -26,3 +26,16 @@ tests: - CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG=y - CONFIG_IPC_SERVICE=y - CONFIG_IPC_SERVICE_BACKEND_ICMSG=y + + applications.sdp.egpio_icbmsg: + sysbuild: true + build_only: true + platform_allow: nrf54l15dk/nrf54l15/cpuflpr + tags: ci_build sysbuild + extra_args: + EXTRA_DTC_OVERLAY_FILE="./boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay" + extra_configs: + - CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICBMSG=y + - CONFIG_IPC_SERVICE=y + - CONFIG_IPC_SERVICE_BACKEND_ICBMSG=y + - CONFIG_IPC_SERVICE_BACKEND_ICBMSG_NUM_EP=1 diff --git a/applications/sdp/gpio/src/backend/backend.h b/applications/sdp/gpio/src/backend/backend.h index 02e6bb37541..11bf1369323 100644 --- a/applications/sdp/gpio/src/backend/backend.h +++ b/applications/sdp/gpio/src/backend/backend.h @@ -9,7 +9,9 @@ #include -#if !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG) && !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_MBOX) +#if !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG) && \ + !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_MBOX) && \ + !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICBMSG) #error "Define communication backend type" #endif From 91353b285787ed79daa5d5a91854e791c98bc54f Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 13 Sep 2024 17:49:44 +0200 Subject: [PATCH 03/10] drivers: gpio: add icbmsg backend to eGPIO Add icbmsg as possible backend for eGPIO. Signed-off-by: Magdalena Pastula --- drivers/gpio/CMakeLists.txt | 2 +- drivers/gpio/Kconfig | 5 +++++ drivers/gpio/gpio_nrfe.h | 4 +++- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/CMakeLists.txt b/drivers/gpio/CMakeLists.txt index 3f234f723fc..fa723608fe4 100644 --- a/drivers/gpio/CMakeLists.txt +++ b/drivers/gpio/CMakeLists.txt @@ -7,7 +7,7 @@ zephyr_library_amend() if(CONFIG_GPIO_NRFE) - if(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG) + if(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG OR CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICBMSG) zephyr_library_sources(gpio_nrfe_icmsg.c) elseif(CONFIG_GPIO_NRFE_EGPIO_BACKEND_MBOX) zephyr_library_sources(gpio_nrfe_mbox.c) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 58998b09c49..44da1d10f10 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -37,4 +37,9 @@ config GPIO_NRFE_EGPIO_BACKEND_ICMSG help Use ICMSG backend driver for eGPIO. +config GPIO_NRFE_EGPIO_BACKEND_ICBMSG + bool "ICBMSG backend for eGPIO" + help + Use ICBMSG backend driver for eGPIO. + endchoice diff --git a/drivers/gpio/gpio_nrfe.h b/drivers/gpio/gpio_nrfe.h index 0a797e42955..9949a02cb5a 100644 --- a/drivers/gpio/gpio_nrfe.h +++ b/drivers/gpio/gpio_nrfe.h @@ -10,7 +10,9 @@ #include #include -#if !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG) && !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_MBOX) +#if !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICMSG) && \ + !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_MBOX) && \ + !defined(CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICBMSG) #error "Configure communication backend type" #endif From 9c05a9d9cd0346b45dbc1c6e33d92ecc2b803441 Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 13 Sep 2024 17:50:39 +0200 Subject: [PATCH 04/10] cmake: sysbuild: add icbmsg backend to eGPIO Add icbmsg as possible backend for eGPIO. Signed-off-by: Magdalena Pastula --- cmake/sysbuild/sdp.cmake | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/cmake/sysbuild/sdp.cmake b/cmake/sysbuild/sdp.cmake index d935a388705..c9b8ce1bb5d 100644 --- a/cmake/sysbuild/sdp.cmake +++ b/cmake/sysbuild/sdp.cmake @@ -28,6 +28,18 @@ function(egpio_update_kconfig) endif() sysbuild_cache_set(VAR ${DEFAULT_IMAGE}_SNIPPET APPEND REMOVE_DUPLICATES "emulated-gpio-icmsg") message(STATUS "eGPIO: Using ICMSG backend") + elseif(SB_CONFIG_EGPIO_BACKEND_ICBMSG) + foreach(image ${PRE_CMAKE_IMAGES}) + set_config_bool(${image} CONFIG_GPIO_NRFE_EGPIO_BACKEND_ICBMSG y) + set_property(TARGET ${image} APPEND_STRING PROPERTY CONFIG "CONFIG_IPC_SERVICE_BACKEND_ICBMSG_NUM_EP=1\n") + endforeach() + set_config_bool(flpr_egpio CONFIG_IPC_SERVICE y) + set_config_bool(flpr_egpio CONFIG_IPC_SERVICE_BACKEND_ICBMSG y) + if(DEFINED SB_CONFIG_SOC_NRF54L15) + sysbuild_cache_set(VAR flpr_egpio_EXTRA_DTC_OVERLAY_FILE APPEND REMOVE_DUPLICATES "./boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay") + endif() + sysbuild_cache_set(VAR ${DEFAULT_IMAGE}_SNIPPET APPEND REMOVE_DUPLICATES "emulated-gpio-icbmsg") + message(STATUS "eGPIO: Using ICBMSG backend") endif() endfunction() From 848ae53eaf67f85fe067697860e81d4b22de7646 Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 13 Sep 2024 17:51:15 +0200 Subject: [PATCH 05/10] snippets: emulated-gpio: add icbmsg backend for eGPIO Add icbmsg as possible backend for eGPIO. Signed-off-by: Magdalena Pastula --- .../boards/nrf54l15dk_nrf54l15_cpuapp.overlay | 75 +++++++++++++++++++ .../icbmsg/emulated-gpio.overlay | 17 +++++ snippets/emulated-gpio/icbmsg/snippet.yml | 14 ++++ 3 files changed, 106 insertions(+) create mode 100644 snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay create mode 100644 snippets/emulated-gpio/icbmsg/emulated-gpio.overlay create mode 100644 snippets/emulated-gpio/icbmsg/snippet.yml diff --git a/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..09b3822f85e --- /dev/null +++ b/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + cpuflpr_code_partition: image@165000 { + /* FLPR core code partition */ + reg = <0x165000 DT_SIZE_K(96)>; + }; + + sram_rx: memory@2003b800 { + reg = <0x2003b800 0x0800>; + }; + + sram_tx: memory@2003c000 { + reg = <0x2003c000 0x0800>; + }; + }; + + + cpuflpr_sram_code_data: memory@2003c800 { + compatible = "mmio-sram"; + reg = <0x2003c800 DT_SIZE_K(14)>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x2003c800 0x3800>; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icbmsg"; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + tx-blocks = <16>; + rx-blocks = <18>; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 16>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(242)>; + ranges = <0x0 0x20000000 0x3d000>; +}; + +&cpuflpr_vpr { + execution-memory = <&cpuflpr_sram_code_data>; + source-memory = <&cpuflpr_code_partition>; +}; + +&gpio2 { + status = "disabled"; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; + +&egpio { + status = "okay"; +}; diff --git a/snippets/emulated-gpio/icbmsg/emulated-gpio.overlay b/snippets/emulated-gpio/icbmsg/emulated-gpio.overlay new file mode 100644 index 00000000000..1c83a452fe2 --- /dev/null +++ b/snippets/emulated-gpio/icbmsg/emulated-gpio.overlay @@ -0,0 +1,17 @@ +/* Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +&cpuflpr_vpr { + status = "okay"; + + egpio: gpio { + compatible = "nordic,nrfe-gpio"; + gpio-controller; + #gpio-cells = <0x2>; + ngpios = <0x10>; + status = "disabled"; + port = <0x2>; + }; +}; diff --git a/snippets/emulated-gpio/icbmsg/snippet.yml b/snippets/emulated-gpio/icbmsg/snippet.yml new file mode 100644 index 00000000000..34b886f1d8c --- /dev/null +++ b/snippets/emulated-gpio/icbmsg/snippet.yml @@ -0,0 +1,14 @@ +# +# Copyright (c) 2024 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +name: emulated-gpio-icbmsg +append: + EXTRA_DTC_OVERLAY_FILE: emulated-gpio.overlay + +boards: + nrf54l15dk/nrf54l15/cpuapp: + append: + EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15dk_nrf54l15_cpuapp.overlay From 804a6c98617d0f1f6ce46eaf191e7beecfc575a6 Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 4 Oct 2024 17:54:52 +0200 Subject: [PATCH 06/10] sysbuild: add icbmsg as possible eGPIO backend Add option of ICBMSG as a backend for eGPIO. Signed-off-by: Magdalena Pastula --- sysbuild/Kconfig.sdp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sysbuild/Kconfig.sdp b/sysbuild/Kconfig.sdp index d963e18d2a0..3a42a4ae991 100644 --- a/sysbuild/Kconfig.sdp +++ b/sysbuild/Kconfig.sdp @@ -35,6 +35,11 @@ config EGPIO_BACKEND_ICMSG help Use ICMSG backend driver for eGPIO. +config EGPIO_BACKEND_ICBMSG + bool "ICBMSG backend for eGPIO" + help + Use ICBMSG backend driver for eGPIO. + endchoice endif # SDP From 0f07f93c929f4756674358a767d753098b7301ab Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Thu, 3 Oct 2024 20:22:38 +0200 Subject: [PATCH 07/10] samples: basic: blinky: add eGPIO testcase Add eGPIO testcase with icbmsg backend. Signed-off-by: Magdalena Pastula --- .../zephyr/samples/basic/blinky/sample.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/scripts/twister/alt/zephyr/samples/basic/blinky/sample.yaml b/scripts/twister/alt/zephyr/samples/basic/blinky/sample.yaml index 69273d82887..78499803e0d 100644 --- a/scripts/twister/alt/zephyr/samples/basic/blinky/sample.yaml +++ b/scripts/twister/alt/zephyr/samples/basic/blinky/sample.yaml @@ -49,3 +49,22 @@ tests: regex: - "LED state: ON" - "LED state: OFF" + + sample.basic.blinky.egpio_icbmsg: + sysbuild: true + platform_allow: + - nrf54l15dk/nrf54l15/cpuapp + integration_platforms: + - nrf54l15dk/nrf54l15/cpuapp + extra_args: SB_CONFIG_SDP=y + SB_CONFIG_EGPIO_FLPR_APPLICATION=y + SB_CONFIG_EGPIO_BACKEND_ICBMSG=y + SB_CONFIG_PARTITION_MANAGER=n + EXTRA_DTC_OVERLAY_FILE="./boards/nrf54l15dk_nrf54l15_cpuapp_egpio.overlay" + harness: console + harness_config: + type: multi_line + ordered: true + regex: + - "LED state: ON" + - "LED state: OFF" From 4d2b800ab614e3f22e87f7034801a1d38112abb8 Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Fri, 18 Oct 2024 16:52:48 +0200 Subject: [PATCH 08/10] tests: drivers: gpio: add test case for icbmsg backend Add test case for eGPIO using icbmsg backend. Signed-off-by: Magdalena Pastula --- tests/drivers/gpio/egpio_basic_api/testcase.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tests/drivers/gpio/egpio_basic_api/testcase.yaml b/tests/drivers/gpio/egpio_basic_api/testcase.yaml index 5fd4c7ae7ec..c6df246b64e 100644 --- a/tests/drivers/gpio/egpio_basic_api/testcase.yaml +++ b/tests/drivers/gpio/egpio_basic_api/testcase.yaml @@ -18,6 +18,15 @@ tests: sysbuild: true extra_args: SB_CONFIG_EGPIO_BACKEND_ICMSG=y + drivers.egpio.loopback_icbmsg: + min_flash: 64 + platform_allow: + - nrf54l15dk/nrf54l15/cpuapp + integration_platforms: + - nrf54l15dk/nrf54l15/cpuapp + sysbuild: true + extra_args: SB_CONFIG_EGPIO_BACKEND_ICBMSG=y + drivers.egpio.loopback_mbox: min_flash: 64 platform_allow: From 00bf91068ff64635cf6d682a1c0c042fb4208482 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Fri, 18 Oct 2024 14:32:57 +0200 Subject: [PATCH 09/10] snippets: emulated-gpio: align RRAM Since FLPR's SRAM was shrunk, so can be the RRAM. In consequence, APP's RRAM can be extended. Signed-off-by: Marcin Szymczyk --- .../icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay | 9 ++++++--- .../icmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay | 9 ++++++--- .../mbox/boards/nrf54l15dk_nrf54l15_cpuapp.overlay | 9 ++++++--- 3 files changed, 18 insertions(+), 9 deletions(-) diff --git a/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay index 09b3822f85e..1f6b2cb26a5 100644 --- a/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay +++ b/snippets/emulated-gpio/icbmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -10,9 +10,8 @@ #address-cells = <1>; #size-cells = <1>; - cpuflpr_code_partition: image@165000 { - /* FLPR core code partition */ - reg = <0x165000 DT_SIZE_K(96)>; + cpuflpr_code_partition: image@179800 { + reg = <0x179800 DT_SIZE_K(14)>; }; sram_rx: memory@2003b800 { @@ -48,6 +47,10 @@ }; }; +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1510)>; +}; + &cpuapp_sram { reg = <0x20000000 DT_SIZE_K(242)>; ranges = <0x0 0x20000000 0x3d000>; diff --git a/snippets/emulated-gpio/icmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/snippets/emulated-gpio/icmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay index 9fb9821dc1d..388251c8ca9 100644 --- a/snippets/emulated-gpio/icmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay +++ b/snippets/emulated-gpio/icmsg/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -10,9 +10,8 @@ #address-cells = <1>; #size-cells = <1>; - cpuflpr_code_partition: image@165000 { - /* FLPR core code partition */ - reg = <0x165000 DT_SIZE_K(96)>; + cpuflpr_code_partition: image@17a000 { + reg = <0x17a000 DT_SIZE_K(12)>; }; sram_rx: memory@2003c000 { @@ -46,6 +45,10 @@ }; }; +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1512)>; +}; + &cpuapp_sram { reg = <0x20000000 DT_SIZE_K(244)>; ranges = <0x0 0x20000000 0x3d000>; diff --git a/snippets/emulated-gpio/mbox/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/snippets/emulated-gpio/mbox/boards/nrf54l15dk_nrf54l15_cpuapp.overlay index 66506cae118..904e3b116fa 100644 --- a/snippets/emulated-gpio/mbox/boards/nrf54l15dk_nrf54l15_cpuapp.overlay +++ b/snippets/emulated-gpio/mbox/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -10,9 +10,8 @@ #address-cells = <1>; #size-cells = <1>; - cpuflpr_code_partition: image@165000 { - /* FLPR core code partition */ - reg = <0x165000 DT_SIZE_K(96)>; + cpuflpr_code_partition: image@17a000 { + reg = <0x17a000 DT_SIZE_K(12)>; }; sram_rx: memory@2003c000 { @@ -41,6 +40,10 @@ }; }; +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1512)>; +}; + &cpuapp_sram { reg = <0x20000000 DT_SIZE_K(244)>; ranges = <0x0 0x20000000 0x3d000>; From ee4bf7e1593ae6e352d3e3b76c5b10585767dae1 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Fri, 18 Oct 2024 17:29:41 +0200 Subject: [PATCH 10/10] applications: sdp: gpio: align RRAM Since FLPR's SRAM was shrunk, so can be the RRAM. Signed-off-by: Marcin Szymczyk --- .../boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay | 8 ++++++++ .../gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay | 8 ++++++++ .../gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay | 8 ++++++++ 3 files changed, 24 insertions(+) diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay index 3b45642d36c..8621993af6e 100644 --- a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icbmsg.overlay @@ -34,6 +34,14 @@ }; }; +&cpuflpr_rram { + reg = <0x179800 DT_SIZE_K(14)>; +}; + +&cpuflpr_code_partition { + reg = <0x0 DT_SIZE_K(14)>; +}; + &cpuflpr_sram { reg = <0x2003c800 DT_SIZE_K(14)>; ranges = <0x0 0x2003c800 0x3800>; diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay index 4df6ef5eb5a..9c10b2fb3aa 100644 --- a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay @@ -32,6 +32,14 @@ }; }; +&cpuflpr_rram { + reg = <0x17a000 DT_SIZE_K(12)>; +}; + +&cpuflpr_code_partition { + reg = <0x0 DT_SIZE_K(12)>; +}; + &cpuflpr_sram { reg = <0x2003d000 DT_SIZE_K(12)>; ranges = <0x0 0x2003d000 0x3000>; diff --git a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay index 2192394fc45..2eb0cf2b828 100644 --- a/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay +++ b/applications/sdp/gpio/boards/nrf54l15dk_nrf54l15_cpuflpr_mbox.overlay @@ -27,6 +27,14 @@ }; }; +&cpuflpr_rram { + reg = <0x17a000 DT_SIZE_K(12)>; +}; + +&cpuflpr_code_partition { + reg = <0x0 DT_SIZE_K(12)>; +}; + &cpuflpr_sram { reg = <0x2003d000 DT_SIZE_K(12)>; ranges = <0x0 0x2003d000 0x3000>;