Integrate SPIR-T (replacing structurizer and shuffling passes around).

crates/rustc_codegen_spirv/Cargo.toml

@@ -60,6 +60,7 @@ serde_json = "1.0"
 smallvec = { version = "1.6.1", features = ["union"] }
 spirv-tools = { version = "0.9", default-features = false }
 rustc_codegen_spirv-types = { path = "../rustc_codegen_spirv-types", version = "=0.4.0-alpha.17" }
+spirt = { git = "https:/EmbarkStudios/spirt.git" }
 
 [dev-dependencies]
 pipe = "0.4"

crates/rustc_codegen_spirv/src/linker/mod.rs

@@ -216,13 +216,13 @@ pub fn link(sess: &Session, mut inputs: Vec<Module>, opts: &Options) -> Result<L
  );
  }
 
- {
+ if false {
  let _timer = sess.timer("link_inline");
  inline::inline(sess, &mut output)?;
  }
 
  if opts.dce {
- let _timer = sess.timer("link_dce");
+ let _timer = sess.timer("link_dce-early");
  dce::dce(&mut output);
  }
 
@@ -231,15 +231,17 @@ pub fn link(sess: &Session, mut inputs: Vec<Module>, opts: &Options) -> Result<L
  .collect::<FxHashSet<_>>();
  UnrollLoopsDecoration::remove_all(&mut output);
 
- let mut output = if opts.structurize {
+ // FIXME(eddyb) remove this in favor of SPIR-T's?
+ let use_legacy_structurizer = false;
+ let mut output = if opts.structurize && use_legacy_structurizer {
  let _timer = sess.timer("link_structurize");
  structurizer::structurize(output, unroll_loops_decorations)
  } else {
  output
  };
 
  {
- let _timer = sess.timer("link_block_ordering_pass_and_mem2reg");
+ let _timer = sess.timer("link_block_ordering_pass_and_mem2reg-early");
  let mut pointer_to_pointee = FxHashMap::default();
  let mut constants = FxHashMap::default();
  let mut u32 = None;
@@ -277,6 +279,93 @@ pub fn link(sess: &Session, mut inputs: Vec<Module>, opts: &Options) -> Result<L
  }
  }
 
+ if true {
+ let _timer = sess.timer("link_inline");
+ inline::inline(sess, &mut output)?;
+ }
+
+ if opts.dce {
+ let _timer = sess.timer("link_dce-late");
+ dce::dce(&mut output);
+ }
+
+ {
+ let _timer = sess.timer("link_block_ordering_pass_and_mem2reg-late");
+ let mut pointer_to_pointee = FxHashMap::default();
+ let mut constants = FxHashMap::default();
+ let mut u32 = None;
+ for inst in &output.types_global_values {
+ match inst.class.opcode {
+ Op::TypePointer => {
+ pointer_to_pointee
+ .insert(inst.result_id.unwrap(), inst.operands[1].unwrap_id_ref());
+ }
+ Op::TypeInt
+ if inst.operands[0].unwrap_literal_int32() == 32
+ && inst.operands[1].unwrap_literal_int32() == 0 =>
+ {
+ assert!(u32.is_none());
+ u32 = Some(inst.result_id.unwrap());
+ }
+ Op::Constant if u32.is_some() && inst.result_type == u32 => {
+ let value = inst.operands[0].unwrap_literal_int32();
+ constants.insert(inst.result_id.unwrap(), value);
+ }
+ _ => {}
+ }
+ }
+ for func in &mut output.functions {
+ simple_passes::block_ordering_pass(func);
+ // Note: mem2reg requires functions to be in RPO order (i.e. block_ordering_pass)
+ mem2reg::mem2reg(
+ output.header.as_mut().unwrap(),
+ &mut output.types_global_values,
+ &pointer_to_pointee,
+ &constants,
+ func,
+ );
+ destructure_composites::destructure_composites(func);
+ }
+ }
+
+ {
+ let spv_bytes = {
+ let _timer = sess.timer("assemble-to-spv_bytes-for-spirt");
+ spirv_tools::binary::from_binary(&output.assemble()).to_vec()
+ };
+ let cx = std::rc::Rc::new(spirt::Context::new());
+ let mut module = {
+ let _timer = sess.timer("spirt::Module::lower_from_spv_file");
+ match spirt::Module::lower_from_spv_bytes(cx, spv_bytes) {
+ Ok(module) => module,
+ Err(e) => {
+ use rspirv::binary::Disassemble;
+
+ sess.fatal(&format!(
+ "SPIR-V -> SPIR-T lowering failed: {}\n\n\
+ SPIR-V disassembly:\n\n{}",
+ e,
+ output.disassemble(),
+ ));
+ }
+ }
+ };
+ if opts.structurize {
+ let _timer = sess.timer("spirt::legalize::structurize_func_cfgs");
+ spirt::passes::legalize::structurize_func_cfgs(&mut module);
+ }
+ let spv_words = {
+ let _timer = sess.timer("spirt::Module::lift_to_spv_module_emitter");
+ module.lift_to_spv_module_emitter().unwrap().words
+ };
+ output = {
+ let _timer = sess.timer("parse-spv_words-from-spirt");
+ let mut loader = Loader::new();
+ rspirv::binary::parse_words(&spv_words, &mut loader).unwrap();
+ loader.module()
+ };
+ }
+
  {
  let _timer = sess.timer("peephole_opts");
  let types = peephole_opts::collect_types(&output);

deny.toml

@@ -3,13 +3,10 @@
 # https://embarkstudios.github.io/cargo-deny/checks/advisories/cfg.html
 [advisories]
 vulnerability = "deny"
+# FIXME(eddyb) `ansi_term` and `xml-rs` prevent this from being `deny`.
 unmaintained = "warn"
-yanked = "warn"
-notice = "warn"
-ignore = [
- # Regex advisory, from some dependency
- "RUSTSEC-2022-0013"
-]
+yanked = "deny"
+notice = "deny"
 
 # This section is considered when running `cargo deny check bans`.
 # More documentation about the 'bans' section can be found here:
@@ -60,6 +57,8 @@ allow = [
  "ISC",
 
  "Zlib",
+
+ "Unicode-DFS-2016",
 ]
 # Allow 1 or more licenses on a per-crate basis, so that particular licenses
 # aren't accepted for every possible crate as with the normal allow list

tests/ui/arch/all_memory_barrier.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 75 4
 OpMemoryBarrier %6 %7
-OpLine %8 9 1
+OpNoLine
 OpReturn
 OpFunctionEnd

tests/ui/arch/all_memory_barrier_with_group_sync.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 41 4
 OpControlBarrier %6 %7 %8
-OpLine %9 9 1
+OpNoLine
 OpReturn
 OpFunctionEnd

tests/ui/arch/device_memory_barrier.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 75 4
 OpMemoryBarrier %6 %7
-OpLine %8 9 1
+OpNoLine
 OpReturn
 OpFunctionEnd

tests/ui/arch/device_memory_barrier_with_group_sync.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 41 4
 OpControlBarrier %6 %7 %8
-OpLine %9 9 1
+OpNoLine
 OpReturn
 OpFunctionEnd

tests/ui/arch/workgroup_memory_barrier.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 75 4
 OpMemoryBarrier %6 %7
-OpLine %8 8 1
+OpNoLine
 OpReturn
 OpFunctionEnd

tests/ui/arch/workgroup_memory_barrier_with_group_sync.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 41 4
 OpControlBarrier %6 %6 %7
-OpLine %8 8 1
+OpNoLine
 OpReturn
 OpFunctionEnd

tests/ui/dis/add_two_ints.stderr

@@ -4,6 +4,6 @@
 %6 = OpLabel
 OpLine %7 7 4
 %8 = OpIAdd %2 %4 %5
-OpLine %7 8 1
+OpNoLine
 OpReturnValue %8
 OpFunctionEnd

tests/ui/dis/asm.stderr

@@ -2,6 +2,6 @@
 %4 = OpLabel
 OpLine %5 9 8
 OpMemoryBarrier %6 %7
-OpLine %5 16 1
+OpNoLine
 OpReturn
 OpFunctionEnd