[tracking] Bugs found by the peripheral selftest

[maribu]

This is intended to track bugs found by the peripheral selftest, so that the bugs are not only found but eventually also fixed :)

• Incorrect Arduino Mapping on Nucleo64 boards (see boards/nucleo64: fix SPI Arduino mapping for most boards #19935)
• Incomplete Arduino Mapping on Nucleo64 boards
  • nucleo-f070rb: Missing peripheral configuration for SPI (see boards/nucleo-f070rb: add SPI configuration #20075)
  • nucleo-f302r8: Missing peripheral configuration for the Arduino SPI bus (the provided bus(es) is not compatible with any Arduino shields, as it is connected to the wrong pins)
  • boards/nucleo-l433rc: Missing peripheral configuration for the Arduino SPI bus (the provided bus(es) is not compatible with any Arduino shields, as it is connected to the wrong pins)
  • boards/nucleo-wl55jc: Incorrect SPI bus declared as ARDUINO_SPI_D11D12D13 (see boards/nucleo-wl55jc: Fix Arduino SPI bus #20085)
• nRF5x: uart_poweroff() is not powering off UART (see cpu/nrf5x_common: fix uart_poweroff() #19926)
• nucleo-f103rb: I2C test failing (see cpu/stm32: fix periph_i2c for F1, F2, L1 and F4 families #20100)
  • Beware: The STM32F1 cannot enable the internal pull on the pins unless in GPIO mode and the selftesting shield has no external pull ups. Connecting an I2C breakout board with external pull ups (e.g. SHT1x / BMx280 / ATC24xxx / ... boards) to the female 4 pin socket J2 (or a resistor) can work around this.
  • Even with the work around in place, the I2C test still fails
• nucleo-f303re (or rather STM32F3): SPI clock polarity on idle level not correct (see cpu/stm32/periph_spi: Fix /CS handling #20084)
• nucleo-f446re (or rather STM32F4): SPI transfer is faster than possible with the requested SPI clock
  • The MCU cannot divide the 90 MHz APB clock down to the requested 100 kHz, ~ 350 kHz is the slowed frequency possible (see tests/periph/selftest_shield: improve SPI test #20089 for a change in the test)
  • the driver should rather blow an assert() when the used SPI clock is faster than expected, as this violates the API contract (see cpu/stm32/periph_spi: Fix /CS handling #20084 for the missing assert())
• nucleo-f446re (or rather STM32F4): The GPIO IRQ test occasionally fails
• p-nucleo-wb55: SPI clock frequency not correct (fixed by tests/periph/selftest_shield: improve SPI test #20089 and cpu/stm32/periph_spi: Fix /CS handling #20084), clock polarity not honored (fixed by cpu/stm32/periph_spi: Fix /CS handling #20084)
• nucleo-f303re (or rather STM32F3): GPIO test fails while debugging
  • D3 (PB3) and D4 (PB5) seem to behave differently. I believe the issue is that SWO (PB3) is connected to the integrated ST-Link, which then drives the line while debugging. I think cutting solder bridge SB15 may solve the issue. So the fix for the issue might be just documenting this as a hardware feature.
• nucleo-f303re (or rather STM32F3): Hard fault during adc_init() in the ADC test.
  • Same timer used by the test and ztimer (via periph_adc). Fixed by tests/periph/selftest_shield: timer allocation conflict #20096
• gd32vf103c-start (or rather GD32VF103): PWM not working correctly
  • See boards/gd32vf103c-start: new board  #20270 (comment)

[krzysztof-cabaj]

@maribu I could provide configuration for SPI in nucleo-f070rb using ONLY datasheet - I do not have access to this board.

[krzysztof-cabaj]

Hmmm ... I'm looking at pinout of nucleo-l152 - and Arduino D11, D12, D13 are connected to PA7, 6 and 5. This is configured in periph_conf.h and is compatible with datasheet (page 40). What I'm missing?

[maribu]

Hmmm ... I'm looking at pinout of nucleo-l152 - and Arduino D11, D12, D13 are connected to PA7, 6 and 5. This is configured in periph_conf.h and is compatible with datasheet (page 40). What I'm missing?

Indeed, that looks all fine.

I guess I confused it with nucleo-l433rc which indeed has configured the incorrect bus. I'll update the tracking accordingly.

[maribu]

So that I have this handy later on, I paste the crucial part of the test output on the nucleo-f446re here:

Starting test for GPIO-IRQ (both-edges) at tests/periph/selftest_shield/main.c:588
FAILURE in tests/periph/selftest_shield/main.c:596
FAILURE in tests/periph/selftest_shield/main.c:601
FAILURE in tests/periph/selftest_shield/main.c:606
FAILURE in tests/periph/selftest_shield/main.c:611
FAILURE in tests/periph/selftest_shield/main.c:616
FAILURE in tests/periph/selftest_shield/main.c:628
FAILURE in tests/periph/selftest_shield/main.c:632
FAILURE in tests/periph/selftest_shield/main.c:637
FAILURE in tests/periph/selftest_shield/main.c:642
[FAILED]

Note: This failure is sporadic.