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treewide: clean up architecture specific toolchain setup #15996

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treewide: clean up architecture specific toolchain setup #15996

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8f30d17
cpu/arm7_common: move arch specific compiler setup to makefiles/arch
maribu Feb 12, 2021
d07950b
cpu/esp*: move arch specific compiler setup to makefiles/arch
maribu Feb 12, 2021
6e49a0c
cpu/esp*: use more explicit CPU arch
maribu Feb 16, 2021
5b35127
cpu/riscv_common: Add missing CPU_ARCH declaration
maribu Feb 16, 2021
1723eab
cpu/avr8_common: Add missing CPU_ARCH declaration
maribu Feb 16, 2021
dcc2dec
treewide: clean up includes of makefiles/arch/...
maribu Feb 16, 2021
b468610
cpu/*/Makefile.feature: simple expansion for CPU_ARCH
maribu Feb 16, 2021
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3 changes: 3 additions & 0 deletions Makefile.include
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Expand Up @@ -394,6 +394,9 @@ include $(BOARDDIR)/Makefile.include
INCLUDES += -I$(RIOTCPU)/$(CPU)/include
include $(RIOTCPU)/$(CPU)/Makefile.include

# include architecture specific settings, if any
-include $(RIOTMAKE)/arch/$(CPU_ARCH).inc.mk

# Include common serial logic to define TERMPROG, TERMFLAGS variables based on
# the content of RIOT_TERMINAL
include $(RIOTMAKE)/tools/serial.inc.mk
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4 changes: 2 additions & 2 deletions cpu/arm7_common/Makefile.features
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@@ -1,5 +1,5 @@
CPU_ARCH = armv4t
CPU_CORE = arm7tdmi_s
CPU_ARCH := armv4t
CPU_CORE := arm7tdmi_s
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Do you mind putting these changes in its own commit, they are not really related to the whole PR. And you can add the argument for doing this to the commit message.


FEATURES_PROVIDED += arch_32bit
FEATURES_PROVIDED += arch_arm
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19 changes: 0 additions & 19 deletions cpu/arm7_common/Makefile.include
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@@ -1,20 +1 @@
# Target architecture for the build. Use arm-none-eabi if you are unsure.
TARGET_ARCH_ARM7 ?= arm-none-eabi
TARGET_ARCH ?= $(TARGET_ARCH_ARM7)

INCLUDES += -I$(RIOTBASE)/cpu/arm7_common/include/

# currently only arm7tdmi-s is supported by RIOT, but allow overriding MCPU
# if someone wants to add support for other ARM7 CPUs
MCPU ?= arm7tdmi-s

CFLAGS_CPU = -mcpu=$(MCPU)
CFLAGS_LINK = -ffunction-sections -fdata-sections -fno-builtin -fshort-enums
CFLAGS_DBG ?= -ggdb -g3
CFLAGS_OPT ?= -Os

CFLAGS += $(CFLAGS_CPU) $(CFLAGS_LINK) $(CFLAGS_DBG) $(CFLAGS_OPT)
ASFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG)
LINKFLAGS += -T$(RIOTCPU)/$(CPU)/ldscripts/$(CPU).ld
LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT) -static -lgcc -nostartfiles
LINKFLAGS += -Wl,--gc-sections
2 changes: 2 additions & 0 deletions cpu/avr8_common/Makefile.features
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@@ -1,3 +1,5 @@
CPU_ARCH = avr8

FEATURES_PROVIDED += arch_8bit
FEATURES_PROVIDED += arch_avr8
FEATURES_PROVIDED += cpp
2 changes: 0 additions & 2 deletions cpu/avr8_common/Makefile.include
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Expand Up @@ -2,5 +2,3 @@
INCLUDES += -I$(RIOTCPU)/avr8_common/include \
-isystem$(RIOTCPU)/avr8_common/avr_libc_extra/include \
-isystem$(RIOTCPU)/avr8_common/avr_libc_extra/include/vendor

include $(RIOTMAKE)/arch/atmega.inc.mk
2 changes: 0 additions & 2 deletions cpu/cc2538/Makefile.include
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Expand Up @@ -42,5 +42,3 @@ LINKER_SCRIPT ?= cc2538.ld
ifneq (,$(filter riotboot,$(FEATURES_USED)))
CFLAGS += -DUPDATE_CCA=0
endif

include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/cc26x0_cc13x0/Makefile.include
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Expand Up @@ -7,4 +7,3 @@ ROM_LEN ?= 128K
RAM_LEN ?= 20K

include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/cc26x2_cc13x2/Makefile.include
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Expand Up @@ -6,4 +6,3 @@ ROM_LEN ?= 352K
RAM_LEN ?= 80K

include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
2 changes: 0 additions & 2 deletions cpu/efm32/Makefile.include
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Expand Up @@ -26,5 +26,3 @@ ROM_START_ADDR = $(EFM32_FLASH_START)
ROM_LEN = $(EFM32_FLASH_SIZE)
RAM_START_ADDR = $(EFM32_SRAM_START)
RAM_LEN = $(EFM32_SRAM_SIZE)

include $(RIOTMAKE)/arch/cortexm.inc.mk
2 changes: 1 addition & 1 deletion cpu/esp32/Kconfig
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Expand Up @@ -6,7 +6,7 @@

config CPU_CORE_XTENSA_LX6
bool
select CPU_ARCH_XTENSA
select CPU_ARCH_XTENSA_LX6

config CPU_FAM_ESP32
bool
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3 changes: 2 additions & 1 deletion cpu/esp32/Makefile.features
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@@ -1,4 +1,5 @@
CPU_FAM = esp32
CPU_ARCH := xtensa-lx6
CPU_FAM := esp32

# MCU defined features that are provided independent on board definitions

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3 changes: 0 additions & 3 deletions cpu/esp32/Makefile.include
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Expand Up @@ -18,9 +18,6 @@ include $(RIOTCPU)/esp_common/Makefile.include

# regular Makefile

TARGET_ARCH_ESP32 ?= xtensa-esp32-elf
TARGET_ARCH ?= $(TARGET_ARCH_ESP32)

PSEUDOMODULES += esp_eth_hw
PSEUDOMODULES += esp_gdbstub
PSEUDOMODULES += esp_hw_counter
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2 changes: 1 addition & 1 deletion cpu/esp8266/Kconfig
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Expand Up @@ -6,7 +6,7 @@

config CPU_CORE_XTENSA_L106
bool
select CPU_ARCH_XTENSA
select CPU_ARCH_XTENSA_LX106

config CPU_FAM_ESP8266
bool
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4 changes: 3 additions & 1 deletion cpu/esp8266/Makefile.features
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@@ -1,4 +1,6 @@
CPU_FAM = esp8266
CPU_ARCH := xtensa-lx106
CPU_FAM := esp8266


# MCU defined features that are provided independent on board definitions

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4 changes: 0 additions & 4 deletions cpu/esp8266/Makefile.include
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Expand Up @@ -23,10 +23,6 @@ BOOTLOADER_POS = 0x0000
include $(RIOTCPU)/esp_common/Makefile.include

# regular Makefile

TARGET_ARCH_ESP8266 ?= xtensa-esp8266-elf
TARGET_ARCH ?= $(TARGET_ARCH_ESP8266)

PSEUDOMODULES += esp_sw_timer

INCLUDES += -I$(RIOTCPU)/$(CPU)
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11 changes: 10 additions & 1 deletion cpu/esp_common/Kconfig
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Expand Up @@ -9,6 +9,14 @@ config CPU_ARCH_XTENSA
select HAS_ARCH_32BIT
select HAS_ARCH_ESP

config CPU_ARCH_XTENSA_LX106
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I think these changes should be In another commit.

bool
select CPU_ARCH_XTENSA

config CPU_ARCH_XTENSA_LX6
bool
select CPU_ARCH_XTENSA

config CPU_COMMON_ESP
bool
select HAS_CPP
Expand Down Expand Up @@ -58,4 +66,5 @@ config HAS_ARCH_ESP

## Common CPU symbols
config CPU_ARCH
default "xtensa" if CPU_ARCH_XTENSA
default "xtensa-lx106" if CPU_ARCH_XTENSA_LX106
default "xtensa-lx6" if CPU_ARCH_XTENSA_LX6
2 changes: 0 additions & 2 deletions cpu/esp_common/Makefile.features
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@@ -1,5 +1,3 @@
CPU_ARCH = xtensa

# MCU defined features that are provided independent on board definitions

FEATURES_PROVIDED += arch_32bit
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2 changes: 0 additions & 2 deletions cpu/kinetis/Makefile.include
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Expand Up @@ -36,5 +36,3 @@ CFLAGS += \
-DKINETIS_SUBFAMILY=$(KINETIS_SUBFAMILY) \
-DKINETIS_ROMSIZE=$(KINETIS_ROMSIZE) \
#

include $(RIOTMAKE)/arch/cortexm.inc.mk
2 changes: 0 additions & 2 deletions cpu/lm4f120/Makefile.include
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@@ -1,3 +1 @@
include $(RIOTMAKE)/arch/cortexm.inc.mk

include $(RIOTCPU)/stellaris_common/Makefile.include
2 changes: 1 addition & 1 deletion cpu/lpc1768/Makefile.include
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@@ -1 +1 @@
include $(RIOTMAKE)/arch/cortexm.inc.mk
# Existence of this file is expected by the build system, even if there is nothing to configure
2 changes: 1 addition & 1 deletion cpu/mips32r2_common/Makefile.features
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@@ -1,4 +1,4 @@
CPU_ARCH = mips32r2
CPU_ARCH := mips32r2

FEATURES_PROVIDED += arch_32bit
FEATURES_PROVIDED += arch_mips32r2
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1 change: 0 additions & 1 deletion cpu/mips_pic32mx/Makefile.include
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@@ -1,7 +1,6 @@
export ROMABLE = 1

include $(RIOTCPU)/mips_pic32_common/Makefile.include
include $(RIOTMAKE)/arch/mips.inc.mk

# define build specific options
CFLAGS += -march=m4k -DSKIP_COPY_TO_RAM
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1 change: 0 additions & 1 deletion cpu/mips_pic32mz/Makefile.include
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export ROMABLE = 1

include $(RIOTCPU)/mips_pic32_common/Makefile.include
include $(RIOTMAKE)/arch/mips.inc.mk

# define build specific options
CFLAGS += -march=m5101 -mmicromips -DSKIP_COPY_TO_RAM
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4 changes: 2 additions & 2 deletions cpu/msp430_common/Makefile.features
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@@ -1,5 +1,5 @@
CPU_ARCH = msp430
CPU_CORE = msp430
CPU_ARCH := msp430
CPU_CORE := msp430

FEATURES_PROVIDED += arch_16bit
FEATURES_PROVIDED += arch_msp430
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3 changes: 0 additions & 3 deletions cpu/msp430_common/Makefile.include
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@@ -1,6 +1,3 @@
INCLUDES += -I$(RIOTCPU)/msp430_common/include/

CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL))

# include the msp430 common Makefile
include $(RIOTMAKE)/arch/msp430.inc.mk
2 changes: 2 additions & 0 deletions cpu/native/Makefile.features
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@@ -1,3 +1,5 @@
CPU_ARCH := native

ifeq (FreeBSD,$(OS))
DISABLE_LIBSTDCPP ?= 1
endif
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1 change: 0 additions & 1 deletion cpu/nrf51/Makefile.include
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@@ -1,2 +1 @@
include $(RIOTCPU)/nrf5x_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/nrf52/Makefile.include
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Expand Up @@ -43,4 +43,3 @@ LINKER_SCRIPT ?= cortexm.ld
VECTORS_O ?= $(BINDIR)/nrf52_vectors/vectors_$(CPU_MODEL).o

include $(RIOTCPU)/nrf5x_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
2 changes: 0 additions & 2 deletions cpu/qn908x/Makefile.include
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Expand Up @@ -35,5 +35,3 @@ CFLAGS += \
# include path here.
PSEUDOMODULES += vendor_%
INCLUDES += -I$(RIOTCPU)/$(CPU)/include/vendor

include $(RIOTMAKE)/arch/cortexm.inc.mk
2 changes: 2 additions & 0 deletions cpu/riscv_common/Makefile.features
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@@ -1,3 +1,5 @@
CPU_ARCH := risc-v
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Same for this one, can you add to a commit where you say "adding missing arch or something like that", or fix missing arch and you can ad comment on the := change in that commit as well.


FEATURES_PROVIDED += arch_32bit
FEATURES_PROVIDED += arch_riscv
FEATURES_PROVIDED += cpp
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2 changes: 0 additions & 2 deletions cpu/riscv_common/Makefile.include
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Expand Up @@ -22,5 +22,3 @@ ifneq (,$(ITIM_START_ADDR))
endif

LINKER_SCRIPT ?= riscv.ld

include $(RIOTMAKE)/arch/riscv.inc.mk
1 change: 0 additions & 1 deletion cpu/sam3/Makefile.include
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@@ -1,2 +1 @@
include $(RIOTCPU)/sam_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/samd21/Makefile.include
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Expand Up @@ -25,4 +25,3 @@ endif
CFLAGS += -DCPU_COMMON_SAMD21

include $(RIOTCPU)/sam0_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/samd5x/Makefile.include
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Expand Up @@ -16,4 +16,3 @@ BACKUP_RAM_ADDR = 0x47000000
BACKUP_RAM_LEN = 0x2000

include $(RIOTCPU)/sam0_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/saml1x/Makefile.include
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Expand Up @@ -8,4 +8,3 @@ endif
CFLAGS += -DCPU_COMMON_SAML1X

include $(RIOTCPU)/sam0_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 0 additions & 1 deletion cpu/saml21/Makefile.include
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Expand Up @@ -19,4 +19,3 @@ ifneq (,$(filter saml21j18b saml21j18a samr30g18a samr34j18b,$(CPU_MODEL)))
endif

include $(RIOTCPU)/sam0_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
2 changes: 0 additions & 2 deletions cpu/stm32/Makefile.include
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Expand Up @@ -90,5 +90,3 @@ $(STM32IRQS_INCLUDE_FILE): $(STM32FAM_INCLUDE_FILE)

# Include clock configuration directory
INCLUDES += -I$(RIOTCPU)/stm32/include/clk

include $(RIOTMAKE)/arch/cortexm.inc.mk
18 changes: 18 additions & 0 deletions makefiles/arch/armv4t.inc.mk
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@@ -0,0 +1,18 @@
# Target architecture for the build. Use arm-none-eabi if you are unsure.
TARGET_ARCH_ARM7 ?= arm-none-eabi
TARGET_ARCH ?= $(TARGET_ARCH_ARM7)

# currently only arm7tdmi-s is supported by RIOT, but allow overriding MCPU
# if someone wants to add support for other ARM7 CPUs
MCPU ?= arm7tdmi-s

CFLAGS_CPU = -mcpu=$(MCPU)
CFLAGS_LINK = -ffunction-sections -fdata-sections -fno-builtin -fshort-enums
CFLAGS_DBG ?= -ggdb -g3
CFLAGS_OPT ?= -Os

CFLAGS += $(CFLAGS_CPU) $(CFLAGS_LINK) $(CFLAGS_DBG) $(CFLAGS_OPT)
ASFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG)
LINKFLAGS += -T$(RIOTCPU)/$(CPU)/ldscripts/$(CPU).ld
LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT) -static -lgcc -nostartfiles
LINKFLAGS += -Wl,--gc-sections
1 change: 1 addition & 0 deletions makefiles/arch/armv6m.inc.mk
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include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 1 addition & 0 deletions makefiles/arch/armv7m.inc.mk
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include $(RIOTMAKE)/arch/cortexm.inc.mk
1 change: 1 addition & 0 deletions makefiles/arch/armv8m.inc.mk
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include $(RIOTMAKE)/arch/cortexm.inc.mk
0 makefiles/arch/atmega.inc.mk → makefiles/arch/avr8.inc.mk
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0 makefiles/arch/mips.inc.mk → makefiles/arch/mips32r2.inc.mk
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0 makefiles/arch/riscv.inc.mk → makefiles/arch/risc-v.inc.mk
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2 changes: 2 additions & 0 deletions makefiles/arch/xtensa-lx106.inc.mk
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TARGET_ARCH_ESP8266 ?= xtensa-esp8266-elf
TARGET_ARCH ?= $(TARGET_ARCH_ESP8266)
2 changes: 2 additions & 0 deletions makefiles/arch/xtensa-lx6.inc.mk
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TARGET_ARCH_ESP32 ?= xtensa-esp32-elf
TARGET_ARCH ?= $(TARGET_ARCH_ESP32)