Cortex-M: initial stack alignment #2976
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added 2 commits
May 13, 2015 09:15
AAPCS requires stack pointers to be aligned on a double word boundary. In addition, Clang-3.6 assumes the stack pointer is always aligned to a 8 byte boundary upon function entry, at least in armv7-m, causing hard-to-find errors in the compiled code.
AAPCS requires stack pointers to be aligned on a double word boundary. In addition, Clang-3.6 assumes the stack pointer is always aligned to a 8 byte boundary upon function entry, at least in armv7-m, causing hard-to-find errors in the compiled code. This is the same implementation as for the Cortex-M4
jnohlgard
added
Type: bug
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I have tested on CM4, but not CM3. Could someone test this on a CM3 board? To verify:
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Verified on Cortex-M3 for STM32F103. |
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ACK, but I would like to have some of the hardware guys to take another look. |
LudwigKnuepfer
assigned PeterKietzmann and kaspar030 and unassigned OlegHahm and PeterKietzmann
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@kaspar030, ping! |
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Well, looks OK, doesn't break anything as far as I can see. ACK. |
kaspar030
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May 18, 2015
cortex-m: initial stack alignment to 64bit
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The initial stack passed to the thread entry point was always anti-aligned to a 64 bit boundary (meaning the address is aligned to 32 bit, and never to 64 bits)
The cause is bit 9 in xPSR being set in the stacked xPSR when initializing the thread stack in
thread_arch_stack_init.I have changed the initialization for Cortex-M3 and Cortex-M4 to clear the faulty bit and also cleaned up the comments a bit and added extra handling for aligning the stack on a 64-bit boundary.
Procedure Call Standard for the ARM® Architecture requires that the stack pointer is aligned on a 8 byte boundary upon function entry. Clang relies on this behaviour which caused problems in
auto_init_net_ifon mulle, but I am guessing this is not the only location where this caused problems. GCC does not seem to assume 64 bit alignment, at least not with-Osand lower.