[DRIVER/PIC] Add ARM GICv2/v3 V2M, ITS support.

Fix some code style and init for V2M, ITS. V2M is the PCI MSI/MSI-X for GICv2. ITS is the PCI MSI/MSI-X for GICv3/v4. Signed-off-by: GuEe-GUI <[email protected]>
RT-Thread · Sep 19, 2024 · 3d503e9 · 3d503e9
1 parent 94e4975
commit 3d503e9
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Showing 8 changed files with 2,159 additions and 56 deletions.
diff --git a/components/drivers/pic/Kconfig b/components/drivers/pic/Kconfig
@@ -1,6 +1,7 @@
 menuconfig RT_USING_PIC
  bool "Using Programmable Interrupt Controller (PIC)"
- select RT_USING_BITMAP
+ select RT_USING_ADT
+ select RT_USING_ADT_BITMAP
  depends on RT_USING_DM
  default n
 
@@ -22,12 +23,31 @@ config RT_PIC_ARM_GIC
  select RT_USING_OFW
  default n
 
+config RT_PIC_ARM_GIC_V2M
+ bool "ARM GIC V2M" if RT_PIC_ARM_GIC && RT_PCI_MSI
+ depends on RT_USING_OFW
+ default n
+
 config RT_PIC_ARM_GIC_V3
  bool "ARM GICv3"
  depends on RT_USING_PIC
  select RT_USING_OFW
  default n
 
+config RT_PIC_ARM_GIC_V3_ITS
+ bool "ARM GICv3 ITS (Interrupt Translation Service)" if RT_PIC_ARM_GIC_V3 && RT_PCI_MSI
+ depends on RT_USING_OFW
+ select RT_USING_ADT_REF
+ default n
+
+config RT_PIC_ARM_GIC_V3_ITS_IRQ_MAX
+ int "IRQ maximum used"
+ depends on RT_PIC_ARM_GIC_V3_ITS
+ default 127 if ARCH_CPU_64BIT
+ default 63
+ help
+ Recommended to be based on the bit length (full bits) of maximum usage.
+
 config RT_PIC_ARM_GIC_MAX_NR
  int
  depends on RT_USING_PIC

diff --git a/components/drivers/pic/SConscript b/components/drivers/pic/SConscript
@@ -16,9 +16,15 @@ if GetDepend(['RT_PIC_ARM_GIC']) or GetDepend(['RT_PIC_ARM_GIC_V3']):
 if GetDepend(['RT_PIC_ARM_GIC']):
  src += ['pic-gicv2.c']
 
+if GetDepend(['RT_PIC_ARM_GIC_V2M']):
+ src += ['pic-gicv2m.c']
+
 if GetDepend(['RT_PIC_ARM_GIC_V3']):
  src += ['pic-gicv3.c']
 
+if GetDepend(['RT_PIC_ARM_GIC_V3_ITS']):
+ src += ['pic-gicv3-its.c']
+
 group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')
diff --git a/components/drivers/pic/pic-gic-common.h b/components/drivers/pic/pic-gic-common.h
@@ -8,10 +8,14 @@
  * 2023-01-30 GuEe-GUI first version
  */
 
-#ifndef __IRQ_GIC_COMMON_H__
-#define __IRQ_GIC_COMMON_H__
+#ifndef __PIC_GIC_COMMON_H__
+#define __PIC_GIC_COMMON_H__
 
 #include <rtdef.h>
+
+#ifdef RT_PCI_MSI
+#include <drivers/pci_msi.h>
+#endif
 #include <drivers/ofw.h>
 
 #define GIC_SGI_NR 16
@@ -52,4 +56,4 @@ rt_err_t gicv2m_ofw_probe(struct rt_ofw_node *ic_np, const struct rt_ofw_node_id
 rt_err_t gicv3_its_ofw_probe(struct rt_ofw_node *ic_np, const struct rt_ofw_node_id *id);
 #endif
 
-#endif /* __IRQ_GIC_COMMON_H__ */
+#endif /* __PIC_GIC_COMMON_H__ */
diff --git a/components/drivers/pic/pic-gicv2.c b/components/drivers/pic/pic-gicv2.c
@@ -128,6 +128,8 @@ static void gicv2_cpu_init(struct gicv2 *gic)
 
 #ifdef ARCH_SUPPORT_HYP
  _gicv2_eoi_mode_ns = RT_TRUE;
+#else
+ _gicv2_eoi_mode_ns = !!rt_ofw_bootargs_select("pic.gicv2_eoimode", 0);
 #endif
 
  if (_gicv2_eoi_mode_ns)