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@chipsalliance

CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems

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🔗 chipsalliance.org | 📫 [email protected]

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.


The CHIPS Alliance hosts multiple open source Projects, which are Workgroups.

Popular repositories Loading

  1. chisel chisel Public

    Chisel: A Modern Hardware Design Language

    Scala 3.9k 594

  2. rocket-chip rocket-chip Public

    Rocket Chip Generator

    Scala 3.2k 1.1k

  3. verible verible Public

    Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

    C++ 1.3k 205

  4. riscv-dv riscv-dv Public

    Random instruction generator for RISC-V processor verification

    Python 1k 324

  5. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

    VeeR EH1 core

    SystemVerilog 814 220

  6. firrtl firrtl Public archive

    Flexible Intermediate Representation for RTL

    Scala 722 176

Repositories

Showing 10 of 108 repositories
  • caliptra-sw Public

    Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

    chipsalliance/caliptra-sw’s past year of commit activity
    Rust 56 Apache-2.0 40 90 57 Updated Oct 10, 2024
  • Cores-VeeR-EL2 Public

    VeeR EL2 Core

    chipsalliance/Cores-VeeR-EL2’s past year of commit activity
    SystemVerilog 248 Apache-2.0 74 20 11 Updated Oct 10, 2024
  • i3c-core Public
    chipsalliance/i3c-core’s past year of commit activity
    SystemVerilog 3 Apache-2.0 1 0 0 Updated Oct 10, 2024
  • t1 Public
    chipsalliance/t1’s past year of commit activity
    Scala 113 Apache-2.0 21 17 23 Updated Oct 10, 2024
  • chisel Public

    Chisel: A Modern Hardware Design Language

    chipsalliance/chisel’s past year of commit activity
    Scala 3,943 Apache-2.0 594 308 (1 issue needs help) 159 Updated Oct 10, 2024
  • synlig Public

    SystemVerilog support for Yosys

    chipsalliance/synlig’s past year of commit activity
    Verilog 160 Apache-2.0 21 64 8 Updated Oct 10, 2024
  • Caliptra Public

    Caliptra IP and firmware for integrated Root of Trust block

    chipsalliance/Caliptra’s past year of commit activity
    119 Apache-2.0 29 15 3 Updated Oct 10, 2024
  • sv-tests-results Public

    Output of the sv-tests runs.

    chipsalliance/sv-tests-results’s past year of commit activity
    HTML 5 1 0 0 Updated Oct 10, 2024
  • chisel-nix Public

    Nix template for the chisel-based industrial designing flows.

    chipsalliance/chisel-nix’s past year of commit activity
    Nix 26 1 0 0 Updated Oct 10, 2024
  • rvdecoderdb Public

    The Scala parser to parse riscv/riscv-opcodes generate

    chipsalliance/rvdecoderdb’s past year of commit activity
    Scala 7 0 0 1 Updated Oct 10, 2024