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rockchip: add support for Radxa ROCK Pi S
Radxa ROCK Pi S is a small in size, full in features SBC[1] using the Rockchip RK3308B SoC. Hardware -------- - Rockchip RK3308B SoC - Quad A35 CPU - 256/512MB DDR3 RAM - Optional 4/8GB eMMC - Micro SD Card slot - Optional WiFi 4 and BT 4 (not supported yet) - 1x 100M Ethernet with PoE support (additional PoE HAT required) - 1x USB 2.0 Type-A port (Host) - 1x USB 2.0 Type-C port (OTG) - 2x 26 Pin GPIO header [1] https://radxa.com/products/rockpi/pis Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <[email protected]> Link: openwrt#15933 Signed-off-by: Hauke Mehrtens <[email protected]>
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@@ -0,0 +1,7 @@ | ||
part uuid ${devtype} ${devnum}:2 uuid | ||
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setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32,0xff0a0000 root=PARTUUID=${uuid} rw rootwait"; | ||
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load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img | ||
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bootm ${kernel_addr_r} |
84 changes: 84 additions & 0 deletions
84
.../rockchip/patches-6.6/040-v6.8-arm64-dts-rockchip-add-gpio-line-names-to-rk3308-roc.patch
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From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001 | ||
From: Trevor Woerner <[email protected]> | ||
Date: Mon, 20 Nov 2023 11:22:32 -0500 | ||
Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s | ||
|
||
Add names to the pins of the general-purpose expansion header as given in the | ||
Radxa GPIO page[1] following the conventions in the kernel documentation[2] to | ||
make it easier for users to correlate the pins with functions when using | ||
utilities such as gpioinfo. | ||
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||
[1] https://wiki.radxa.com/RockpiS/hardware/gpio | ||
[2] Documentation/devicetree/bindings/gpio/gpio.txt | ||
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||
Signed-off-by: Trevor Woerner <[email protected]> | ||
Link: https://lore.kernel.org/r/[email protected] | ||
Signed-off-by: Heiko Stuebner <[email protected]> | ||
--- | ||
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 58 +++++++++++++++++++ | ||
1 file changed, 58 insertions(+) | ||
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--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | ||
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | ||
@@ -258,3 +258,61 @@ | ||
&wdt { | ||
status = "okay"; | ||
}; | ||
+ | ||
+&gpio0 { | ||
+ gpio-line-names = | ||
+ /* GPIO0_A0 - A7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO0_B0 - B7 */ | ||
+ "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]", | ||
+ "", "", "header1-pin11 [GPIO0_B7]", | ||
+ /* GPIO0_C0 - C7 */ | ||
+ "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "", | ||
+ "", "", "", | ||
+ /* GPIO0_D0 - D8 */ | ||
+ "", "", "", "", "", "", "", ""; | ||
+}; | ||
+ | ||
+&gpio1 { | ||
+ gpio-line-names = | ||
+ /* GPIO1_A0 - A7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO1_B0 - B7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO1_C0 - C7 */ | ||
+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]", | ||
+ "header1-pin19 [GPIO1_C7]", | ||
+ /* GPIO1_D0 - D8 */ | ||
+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "", | ||
+ "", "", ""; | ||
+}; | ||
+ | ||
+&gpio2 { | ||
+ gpio-line-names = | ||
+ /* GPIO2_A0 - A7 */ | ||
+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "", | ||
+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]", | ||
+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]", | ||
+ /* GPIO2_B0 - B7 */ | ||
+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]", | ||
+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]", | ||
+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]", | ||
+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]", | ||
+ /* GPIO2_C0 - C7 */ | ||
+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "", | ||
+ /* GPIO2_D0 - D8 */ | ||
+ "", "", "", "", "", "", "", ""; | ||
+}; | ||
+ | ||
+&gpio3 { | ||
+ gpio-line-names = | ||
+ /* GPIO3_A0 - A7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO3_B0 - B7 */ | ||
+ "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]", | ||
+ "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "", | ||
+ /* GPIO3_C0 - C7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO3_D0 - D8 */ | ||
+ "", "", "", "", "", "", "", ""; | ||
+}; |
152 changes: 152 additions & 0 deletions
152
.../rockchip/patches-6.6/041-v6.8-arm64-dts-rockchip-rk3308-rock-pi-s-gpio-line-names-.patch
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From 085021cc825ed90a6ddc4406f608fb8a85745f81 Mon Sep 17 00:00:00 2001 | ||
From: Trevor Woerner <[email protected]> | ||
Date: Tue, 19 Dec 2023 12:38:13 -0500 | ||
Subject: [PATCH] arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names | ||
cleanup | ||
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||
Perform the following cleanups on a previous patch: | ||
- indent lines after "gpio-line-names" | ||
- fix D0-D8 -> D0-D7 | ||
- sort phandle references | ||
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||
Fixes: c45de75d7a9a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s") | ||
Signed-off-by: Trevor Woerner <[email protected]> | ||
Link: https://lore.kernel.org/r/[email protected] | ||
Signed-off-by: Heiko Stuebner <[email protected]> | ||
--- | ||
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 120 +++++++++--------- | ||
1 file changed, 62 insertions(+), 58 deletions(-) | ||
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--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | ||
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | ||
@@ -151,6 +151,68 @@ | ||
status = "okay"; | ||
}; | ||
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+&gpio0 { | ||
+ gpio-line-names = | ||
+ /* GPIO0_A0 - A7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO0_B0 - B7 */ | ||
+ "", "", "", "header1-pin3 [GPIO0_B3]", | ||
+ "header1-pin5 [GPIO0_B4]", "", "", | ||
+ "header1-pin11 [GPIO0_B7]", | ||
+ /* GPIO0_C0 - C7 */ | ||
+ "header1-pin13 [GPIO0_C0]", | ||
+ "header1-pin15 [GPIO0_C1]", "", "", "", | ||
+ "", "", "", | ||
+ /* GPIO0_D0 - D7 */ | ||
+ "", "", "", "", "", "", "", ""; | ||
+}; | ||
+ | ||
+&gpio1 { | ||
+ gpio-line-names = | ||
+ /* GPIO1_A0 - A7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO1_B0 - B7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO1_C0 - C7 */ | ||
+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]", | ||
+ "header1-pin19 [GPIO1_C7]", | ||
+ /* GPIO1_D0 - D7 */ | ||
+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", | ||
+ "", "", "", "", "", ""; | ||
+}; | ||
+ | ||
+&gpio2 { | ||
+ gpio-line-names = | ||
+ /* GPIO2_A0 - A7 */ | ||
+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", | ||
+ "", "", | ||
+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]", | ||
+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]", | ||
+ /* GPIO2_B0 - B7 */ | ||
+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]", | ||
+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]", | ||
+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]", | ||
+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]", | ||
+ /* GPIO2_C0 - C7 */ | ||
+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "", | ||
+ /* GPIO2_D0 - D7 */ | ||
+ "", "", "", "", "", "", "", ""; | ||
+}; | ||
+ | ||
+&gpio3 { | ||
+ gpio-line-names = | ||
+ /* GPIO3_A0 - A7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO3_B0 - B7 */ | ||
+ "", "", "header2-pin42 [GPIO3_B2]", | ||
+ "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]", | ||
+ "header2-pin39 [GPIO3_B5]", "", "", | ||
+ /* GPIO3_C0 - C7 */ | ||
+ "", "", "", "", "", "", "", "", | ||
+ /* GPIO3_D0 - D7 */ | ||
+ "", "", "", "", "", "", "", ""; | ||
+}; | ||
+ | ||
&i2c1 { | ||
status = "okay"; | ||
}; | ||
@@ -258,61 +320,3 @@ | ||
&wdt { | ||
status = "okay"; | ||
}; | ||
- | ||
-&gpio0 { | ||
- gpio-line-names = | ||
- /* GPIO0_A0 - A7 */ | ||
- "", "", "", "", "", "", "", "", | ||
- /* GPIO0_B0 - B7 */ | ||
- "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]", | ||
- "", "", "header1-pin11 [GPIO0_B7]", | ||
- /* GPIO0_C0 - C7 */ | ||
- "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "", | ||
- "", "", "", | ||
- /* GPIO0_D0 - D8 */ | ||
- "", "", "", "", "", "", "", ""; | ||
-}; | ||
- | ||
-&gpio1 { | ||
- gpio-line-names = | ||
- /* GPIO1_A0 - A7 */ | ||
- "", "", "", "", "", "", "", "", | ||
- /* GPIO1_B0 - B7 */ | ||
- "", "", "", "", "", "", "", "", | ||
- /* GPIO1_C0 - C7 */ | ||
- "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]", | ||
- "header1-pin19 [GPIO1_C7]", | ||
- /* GPIO1_D0 - D8 */ | ||
- "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "", | ||
- "", "", ""; | ||
-}; | ||
- | ||
-&gpio2 { | ||
- gpio-line-names = | ||
- /* GPIO2_A0 - A7 */ | ||
- "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "", | ||
- "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]", | ||
- "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]", | ||
- /* GPIO2_B0 - B7 */ | ||
- "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]", | ||
- "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]", | ||
- "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]", | ||
- "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]", | ||
- /* GPIO2_C0 - C7 */ | ||
- "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "", | ||
- /* GPIO2_D0 - D8 */ | ||
- "", "", "", "", "", "", "", ""; | ||
-}; | ||
- | ||
-&gpio3 { | ||
- gpio-line-names = | ||
- /* GPIO3_A0 - A7 */ | ||
- "", "", "", "", "", "", "", "", | ||
- /* GPIO3_B0 - B7 */ | ||
- "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]", | ||
- "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "", | ||
- /* GPIO3_C0 - C7 */ | ||
- "", "", "", "", "", "", "", "", | ||
- /* GPIO3_D0 - D8 */ | ||
- "", "", "", "", "", "", "", ""; | ||
-}; |
32 changes: 32 additions & 0 deletions
32
...rockchip/patches-6.6/044-v6.11-arm64-dts-rockchip-Add-sdmmc-related-properties-on-r.patch
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@@ -0,0 +1,32 @@ | ||
From fc0daeccc384233eadfa9d5ddbd00159653c6bdc Mon Sep 17 00:00:00 2001 | ||
From: Jonas Karlman <[email protected]> | ||
Date: Tue, 21 May 2024 21:10:07 +0000 | ||
Subject: [PATCH] arm64: dts: rockchip: Add sdmmc related properties on | ||
rk3308-rock-pi-s | ||
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Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC | ||
to uSD board. Use disable-wp to signal that no physical write-protect | ||
line is present. Also add vcc_io used for card and IO line power as | ||
vmmc-supply. | ||
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Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support") | ||
Signed-off-by: Jonas Karlman <[email protected]> | ||
Link: https://lore.kernel.org/r/[email protected] | ||
Signed-off-by: Heiko Stuebner <[email protected]> | ||
--- | ||
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 3 +++ | ||
1 file changed, 3 insertions(+) | ||
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--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | ||
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | ||
@@ -272,7 +272,10 @@ | ||
}; | ||
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&sdmmc { | ||
+ cap-mmc-highspeed; | ||
cap-sd-highspeed; | ||
+ disable-wp; | ||
+ vmmc-supply = <&vcc_io>; | ||
status = "okay"; | ||
}; | ||
|
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