pinctrl: starfive: switch to regmap for gpio registers

Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml

@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/starfive,jh7100-clkgen.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 Clock Generator
+
+maintainers:
+ - FIXME <[email protected]>
+ - Geert Uytterhoeven <[email protected]>
+
+properties:
+ compatible:
+ const: starfive,jh7100-clkgen
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Main clock source (default 25 MHz)
+ - description: Application-specific clock source (12-27 MHz)
+
+ clock-names:
+ items:
+ - const: osc_sys
+ - const: osc_aud
+
+ '#clock-cells':
+ const: 1
+ description:
+ See <dt-bindings/clock/starfive-jh7100.h> for valid indices.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ clkgen: clock-controller@11800000 {
+ compatible = "starfive,jh7100-clkgen";
+ reg = <0x11800000 0x10000>;
+ clocks = <&osc_sys>, <&osc_aud>;
+ clock-names = "osc_sys", "osc_aud";
+ #clock-cells = <1>;
+ };

Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml

@@ -51,7 +51,7 @@ properties:
 
  dma-channels:
  minimum: 1
- maximum: 8
+ maximum: 16
 
  snps,dma-masters:
  description: |
@@ -71,14 +71,14 @@ properties:
  Channel priority specifier associated with the DMA channels.
  $ref: /schemas/types.yaml#/definitions/uint32-array
  minItems: 1
- maxItems: 8
+ maxItems: 16
 
  snps,block-size:
  description: |
  Channel block size specifier associated with the DMA channels.
  $ref: /schemas/types.yaml#/definitions/uint32-array
  minItems: 1
- maxItems: 8
+ maxItems: 16
 
  snps,axi-max-burst-len:
  description: |

Documentation/devicetree/bindings/hwmon/starfive,jh7100-temp.yaml

@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/starfive,jh7100-temp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 Temperature Sensor
+
+maintainers:
+ - Emil Renner Berthing <[email protected]>
+
+description: |
+ StarFive Technology Co. JH7100 embedded temperature sensor
+
+properties:
+ compatible:
+ enum:
+ - starfive,jh7100-temp
+
+ reg:
+ maxItems: 1
+
+ '#thermal-sensor-cells':
+ const: 0
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ tmon: tmon@124a0000 {
+ compatible = "starfive,jh7100-temp";
+ reg = <0x124a0000 0x10000>;
+ #thermal-sensor-cells = <0>;
+ interrupts = <122>;
+ };

Documentation/devicetree/bindings/mfd/ti,tps65086.yaml

@@ -0,0 +1,124 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/ti,tps65086.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TPS65086 Power Management Integrated Circuit (PMIC)
+
+maintainers:
+ - Emil Renner Berthing <[email protected]>
+
+properties:
+ compatible:
+ const: ti,tps65086
+
+ reg:
+ const: 0x5e
+ description: I2C slave address
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+ description: |
+ The first cell is the IRQ number. The second cell is the flags,
+ encoded as trigger masks from ../interrupt-controller/interrupts.txt.
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+ description: |
+ The first cell is the pin number and the second cell is used to specify
+ flags. See ../gpio/gpio.txt for more information.
+
+ regulators:
+ type: object
+ description: |
+ List of child nodes that specify the regulator initialization data.
+ Child nodes must be named after their hardware counterparts:
+ buck[1-6], ldoa[1-3], swa1, swb[1-2], and vtt.
+ Each child node is defined using the standard binding for regulators and
+ the optional regulator properties defined below.
+
+ patternProperties:
+ "^buck[1-6]$":
+ type: object
+ $ref: ../regulator/regulator.yaml
+
+ properties:
+ regulator-name: true
+ regulator-boot-on: true
+ regulator-always-on: true
+ regulator-min-microvolt: true
+ regulator-max-microvolt: true
+ ti,regulator-step-size-25mv:
+ type: boolean
+ description: |
+ Set this if the regulator is factory set with a 25mv step voltage
+ mapping.
+ ti,regulator-decay:
+ type: boolean
+ description: |
+ Set this if the output needs to decay, default is for the output
+ to slew down.
+
+ additionalProperties: false
+
+ "^(ldoa[1-3]|swa1|swb[1-2]|vtt)$":
+ type: object
+ $ref: ../regulator/regulator.yaml
+
+ properties:
+ regulator-name: true
+ regulator-boot-on: true
+ regulator-always-on: true
+ regulator-min-microvolt: true
+ regulator-max-microvolt: true
+
+ additionalProperties: false
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - '#gpio-cells'
+ - regulators
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic: pmic@5e {
+ compatible = "ti,tps65086";
+ reg = <0x5e>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ regulators {
+ buck1 {
+ regulator-name = "vcc1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1600000>;
+ regulator-boot-on;
+ ti,regulator-decay;
+ ti,regulator-step-size-25mv;
+ };
+ };
+ };
+ };
+
+...

Documentation/devicetree/bindings/riscv/starfive.yaml

@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/riscv/starfive.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive SoC-based boards
+
+maintainers:
+ - Michael Zhu <[email protected]>
+ - Drew Fustini <[email protected]>
+
+description:
+ StarFive SoC-based boards
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - const: beagle,beaglev-starlight-jh7100-r0
+ - const: starfive,jh7100
+
+additionalProperties: true
+
+...

Documentation/hwmon/index.rst

@@ -164,6 +164,7 @@ Hardware Monitoring Kernel Drivers
  sch5627
  sch5636
  scpi-hwmon
+ sfctemp
  sht15
  sht21
  sht3x

Documentation/hwmon/sfctemp.rst

@@ -0,0 +1,32 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Kernel driver sfctemp
+=====================
+
+Supported chips:
+ - StarFive JH7100
+
+Authors:
+ - Emil Renner Berthing <[email protected]>
+
+Description
+-----------
+
+This driver adds support for reading the built-in temperature sensor on the
+JH7100 RISC-V SoC by StarFive Technology Co. Ltd.
+
+``sysfs`` interface
+-------------------
+
+The temperature sensor can be enabled, disabled and queried via the standard
+hwmon interface in sysfs under ``/sys/class/hwmon/hwmonX`` for some value of
+``X``:
+
+================ ==== =============================================
+Name Perm Description
+================ ==== =============================================
+temp1_enable RW Enable or disable temperature sensor.
+ Automatically enabled by the driver,
+ but may be disabled to save power.
+temp1_input RO Temperature reading in milli-degrees Celsius.
+================ ==== =============================================

MAINTAINERS

@@ -16751,6 +16751,14 @@ L: [email protected]
 S: Supported
 F: drivers/net/ethernet/sfc/
 
+SFCTEMP HWMON DRIVER
+M: Emil Renner Berthing <[email protected]>
+L: [email protected]
+S: Maintained
+F: Documentation/devicetree/bindings/hwmon/starfive,jh7100-temp.yaml
+F: Documentation/hwmon/sfctemp.rst
+F: drivers/hwmon/sfctemp.c
+
 SFF/SFP/SFP+ MODULE SUPPORT
 M: Russell King <[email protected]>
 L: [email protected]