Address comments

iree-org · Oct 14, 2024 · bb1cb7a · bb1cb7a
1 parent 6d37322
commit bb1cb7a
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Showing 3 changed files with 9 additions and 9 deletions.
diff --git a/compiler/src/iree/compiler/Codegen/Common/GPU/GPUApplyTilingLevel.cpp b/compiler/src/iree/compiler/Codegen/Common/GPU/GPUApplyTilingLevel.cpp
@@ -68,7 +68,7 @@ collectTiledAndFusedOps(Operation *op,
 /// tiled operation as well as the created tile loops.
 static LogicalResult applyTileAndFuseToEachRoot(
  RewriterBase &rewriter, llvm::SmallDenseSet<TilingInterface> &payloadOps,
- IREE::GPU::TilingLevel tilingLevel, bool noZeroSlices) {
+ IREE::GPU::TilingLevel tilingLevel, bool allowZeroSlices) {
  MLIRContext *context = rewriter.getContext();
  for (TilingInterface tilingInterfaceOp : payloadOps) {
  mlir::DominanceInfo dominanceInfo(tilingInterfaceOp);
@@ -138,7 +138,7 @@ static LogicalResult applyTileAndFuseToEachRoot(
  if (tilingLevel == IREE::GPU::TilingLevel::Reduction ||
  tilingLevel == IREE::GPU::TilingLevel::Subgroup) {
  // Do not fuse pad in reduction and subgroup tiling. We instead fuse
- // pad without zero slice gaurd as a cleanup pattern.
+ // pad without zero slice guard as a cleanup pattern.
  if (isa<tensor::PadOp>(owner)) {
  return std::nullopt;
  }
@@ -164,15 +164,15 @@ static LogicalResult applyTileAndFuseToEachRoot(
 
  RewritePatternSet cleanupPatterns(context);
 
- if (noZeroSlices) {
+ if (allowZeroSlices) {
  // Add pattern to fuse pad operations without zero slice gaurd, if we
  // know we have no zero slices.
- auto zeroSliceGaurd = [](tensor::ExtractSliceOp) -> std::optional<bool> {
+ auto zeroSliceGuard = [](tensor::ExtractSliceOp) -> std::optional<bool> {
  // Do not use zero slice gaurd.
  return false;
  };
  cleanupPatterns.add<linalg::ExtractSliceOfPadTensorSwapPattern>(
- context, zeroSliceGaurd);
+ context, zeroSliceGuard);
  }
 
  tileAndFuseOptions.cleanupPatterns =
@@ -239,7 +239,7 @@ void GPUApplyTilingLevelPass::runOnOperation() {
 
  IRRewriter rewriter(funcOp);
  if (failed(applyTileAndFuseToEachRoot(rewriter, targetOps, tilingLevel,
- noZeroSlices))) {
+ allowZeroSlices))) {
  funcOp.emitError() << "tiling of level "
  << IREE::GPU::stringifyEnum(tilingLevel) << " failed\n";
  return signalPassFailure();

diff --git a/compiler/src/iree/compiler/Codegen/Common/GPU/Passes.td b/compiler/src/iree/compiler/Codegen/Common/GPU/Passes.td
@@ -205,9 +205,9 @@ def GPUApplyTilingLevelPass :
  clEnumValN(IREE::GPU::TilingLevel::Subgroup, "subgroup",
  "Tile and fuse all annotated ops to threads")
  )}]>,
- Option<"noZeroSlices", "no-zero-slices", "bool",
+ Option<"allowZeroSlices", "allow-zero-slices", "bool",
  /*default=*/"false",
- "Assume that tiling does not produce zero size slices">
+ "Allow pad fusion to generate zero size slices">
  ];
 }
 

diff --git a/compiler/src/iree/compiler/Codegen/Common/GPU/test/gpu_apply_tiling_level.mlir b/compiler/src/iree/compiler/Codegen/Common/GPU/test/gpu_apply_tiling_level.mlir
@@ -1,5 +1,5 @@
 // RUN: iree-opt --split-input-file --mlir-print-local-scope --pass-pipeline="builtin.module(func.func(iree-codegen-gpu-apply-tiling-level, canonicalize, cse))" %s | FileCheck %s
-// RUN: iree-opt --split-input-file --mlir-print-local-scope --pass-pipeline="builtin.module(func.func(iree-codegen-gpu-apply-tiling-level{no-zero-slices=true}, canonicalize, cse))" %s | FileCheck %s --check-prefix=NOZERO
+// RUN: iree-opt --split-input-file --mlir-print-local-scope --pass-pipeline="builtin.module(func.func(iree-codegen-gpu-apply-tiling-level{allow-zero-slices=true}, canonicalize, cse))" %s | FileCheck %s --check-prefix=NOZERO
 // RUN: iree-opt --split-input-file --mlir-print-local-scope --pass-pipeline="builtin.module(func.func(iree-codegen-gpu-apply-tiling-level{tiling-level=thread}, canonicalize, cse))" %s | FileCheck %s --check-prefix=THREAD
 // RUN: iree-opt --split-input-file --mlir-print-local-scope --pass-pipeline="builtin.module(func.func(iree-codegen-gpu-apply-tiling-level{tiling-level=subgroup}, canonicalize, cse))" %s | FileCheck %s --check-prefix=SUBGROUP