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kmac_scoreboard.sv
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kmac_scoreboard.sv
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// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
`define KMAC_APP_VALID_TRANS(mode) \
(cfg.m_kmac_app_agent_cfg[``mode``].vif.req_data_if.valid && \
cfg.m_kmac_app_agent_cfg[``mode``].vif.req_data_if.ready)
`define CALC_PARTIAL_MSG \
(!in_kmac_app && msg.size() % 8 > 0) || \
(in_kmac_app && \
(app_mode == AppKeymgr && (kmac_app_msg.size() + 3) % 8 > 0) || \
(app_mode != AppKeymgr && kmac_app_msg.size() % 8 > 0))
class kmac_scoreboard extends cip_base_scoreboard #(
.CFG_T(kmac_env_cfg),
.RAL_T(kmac_reg_block),
.COV_T(kmac_env_cov)
);
`uvm_component_utils(kmac_scoreboard)
// local variables
bit do_check_digest = 1;
// used solely for coverage sampling, indicates that keccak rounds are currently running
bit in_keccak_rounds = 0;
// Whenever the keccak rounds are running, the `complete` signal is raised at the end
// for a single cycle to signal to sha3 control logic that the keccak engine is completed.
//
// There are some edge cases that may occur if a CmdProcess or a `kmac_app_last`is seen on this
// "complete" cycle that need to be handled - this bit will be raised and lowered in conjunction
// with the internal `complete` signal to allow the scb easier handling of these scenarios.
bit keccak_complete_cycle = 0;
// this bit tracks the beginning and end of a KMAC_APP operation
bit in_kmac_app;
// Indicates what application is using the app interface
kmac_app_e app_mode;
// this bit goes high for a cycle when a manual squeezing is requested
bit req_manual_squeeze = 0;
// The CFG.entropy_ready field is only used to transition the entropy FSM into fetching entropy
// from the reset state, so we can only rely on writes to CFG.entropy_ready to update internal
// scoreboard state after a reset is seen.
//
// To that effect, we set this bit to 1 any time the scoreboard is reset, and will unset it
// the first time that CFG.entropy_ready is updated.
bit first_op_after_rst = 0;
// CFG fields
bit kmac_en;
bit sideload_en;
sha3_pkg::sha3_mode_e hash_mode;
sha3_pkg::keccak_strength_e strength;
entropy_mode_e entropy_mode = EntropyModeNone;
bit entropy_fast_process;
bit entropy_ready;
// Set this bit when entropy_ready is 1 and entropy_mode is EntropyModeEdn,
// to indicate that we are now waiting on the EDN to return valid entropy
bit in_edn_fetch = 0;
// CMD fields
kmac_cmd_e unchecked_kmac_cmd = CmdNone;
kmac_cmd_e checked_kmac_cmd = CmdNone;
bit msg_digest_done;
// SHA3 status bits
bit sha3_idle;
bit sha3_absorb;
bit sha3_squeeze;
bit intr_kmac_done;
bit intr_fifo_empty;
bit intr_kmac_err;
// Error tracking
kmac_pkg::err_t kmac_err = '{valid: 1'b0,
code: kmac_pkg::ErrNone,
info: '0};
sha3_pkg::err_t sha3_err = '{valid: 1'b0,
code: sha3_pkg::ErrNone,
info: '0};
// Need to track the FSM in `kmac_app` and the mux select value,
// these are used in App-related error reporting
kmac_app_st_e app_st = StIdle;
bit app_fsm_active = 0;
app_mux_sel_e app_mux_sel = SelNone;
// key length enum
key_len_e key_len;
bit [keymgr_pkg::KmacDataIfWidth-1:0] kmac_app_block_data;
bit [keymgr_pkg::KmacDataIfWidth/8-1:0] kmac_app_block_strb;
int kmac_app_block_strb_size = 0;
bit kmac_app_last;
// secret keys
//
// max key size is 512-bits
bit [KMAC_NUM_SHARES-1:0][KMAC_NUM_KEYS_PER_SHARE-1:0][31:0] keys;
// prefix words
bit [31:0] prefix[KMAC_NUM_PREFIX_WORDS];
// input message
bit [7:0] msg[$];
// input message from keymgr
byte kmac_app_msg[$];
// output digest from KMAC_APP intf (256 bits each)
bit [kmac_pkg::AppDigestW-1:0] kmac_app_digest_share0;
bit [kmac_pkg::AppDigestW-1:0] kmac_app_digest_share1;
// output digests
bit [7:0] digest_share0[];
bit [7:0] digest_share1[];
// This mask is used to mask reads from the state windows.
// We need to make this a class variable as we set the mask value
// during the address read phase, but then need its value to persist
// through the data read phase.
bit [TL_DBW-1:0] state_mask;
// This mask is used to avoid building a cycle accurate scoreboard to check kmac message fifo.
// This SCB will only check that when KmacStatusFifoFull is set, the FIFO depth should be full
// depth; when KmacStatusFifoEmpty is set, the FIFO depth should be 0. If none of them are set,
// the Fifo depth should be between 0 and the max value.
// The actually FIFO depth is covered in direct sequence.
bit [TL_DW-1:0] status_mask = (1'b1 << KmacStatusFifoFull) |
(1'b1 << KmacStatusFifoEmpty) |
({KMAC_FIFO_DEPTH{1'b1}} << KmacStatusFifoDepthLSB);
// TLM fifos
uvm_tlm_analysis_fifo #(kmac_app_item) kmac_app_rsp_fifo[kmac_pkg::NumAppIntf];
uvm_tlm_analysis_fifo #(push_pull_agent_pkg::push_pull_item #(
.HostDataWidth(kmac_app_agent_pkg::KMAC_REQ_DATA_WIDTH)))
kmac_app_req_fifo[kmac_pkg::NumAppIntf];
`uvm_component_new
function void build_phase(uvm_phase phase);
super.build_phase(phase);
for (int i = 0; i < kmac_pkg::NumAppIntf; i++) begin
kmac_app_req_fifo[i] = new($sformatf("kmac_app_req_fifo[%0d]", i), this);
kmac_app_rsp_fifo[i] = new($sformatf("kmac_app_rsp_fifo[%0d]", i), this);
end
endfunction
function void connect_phase(uvm_phase phase);
super.connect_phase(phase);
endfunction
task run_phase(uvm_phase phase);
super.run_phase(phase);
if (cfg.en_scb) begin
fork
process_checked_kmac_cmd();
detect_kmac_app_start();
process_kmac_app_fsm();
process_edn();
process_kmac_app_req_fifo();
process_kmac_app_rsp_fifo();
process_sideload_key();
join_none
end
endtask
// This task spins forever and assigns `checked_kmac_cmd` to `unchecked_kmac_cmd`
// with a 1 cycle delay.
virtual task process_checked_kmac_cmd();
@(negedge cfg.under_reset);
forever begin
wait(!cfg.under_reset);
`DV_SPINWAIT_EXIT(
@(unchecked_kmac_cmd);
`uvm_info(`gfn, "BEFORE LATCHING KMAC_CMD", UVM_HIGH)
`uvm_info(`gfn, $sformatf("unchecked_kmac_cmd: %0s", unchecked_kmac_cmd.name()), UVM_HIGH)
`uvm_info(`gfn, $sformatf("checked_kmac_cmd: %0s", checked_kmac_cmd.name()), UVM_HIGH)
cfg.clk_rst_vif.wait_clks(1);
checked_kmac_cmd = unchecked_kmac_cmd;
`uvm_info(`gfn, "AFTER LATCHING KMAC_CMD", UVM_HIGH)
`uvm_info(`gfn, $sformatf("unchecked_kmac_cmd: %0s", unchecked_kmac_cmd.name()), UVM_HIGH)
`uvm_info(`gfn, $sformatf("checked_kmac_cmd: %0s", checked_kmac_cmd.name()), UVM_HIGH)
if (checked_kmac_cmd == CmdStart) begin
sha3_idle = 0;
sha3_absorb = 1;
`uvm_info(`gfn, "raised sha3_absorb and dropped sha3_idle when issued start cmd",
UVM_HIGH)
end
if (checked_kmac_cmd == CmdDone) sha3_idle = 1;
// If CmdDone is written, we know that a hash has completed.
// So, we can set this to CmdNone one cycle later.
cfg.clk_rst_vif.wait_clks(1);
if (checked_kmac_cmd == CmdDone) begin
checked_kmac_cmd = CmdNone;
end
,
wait(cfg.under_reset);
)
end
endtask
// This task waits until an entropy request is sent,
// then waits for valid entropy to be returned from EDN
virtual task process_edn();
push_pull_agent_pkg::push_pull_item #(.DeviceDataWidth(cip_base_pkg::EDN_DATA_WIDTH)) edn_item;
@(negedge cfg.under_reset);
forever begin
wait(!cfg.under_reset);
`DV_SPINWAIT_EXIT(
forever begin
@(posedge in_edn_fetch);
// Entropy interface is native 32 bits - prim_edn_req component internally
// does as many EDN fetches as necessary to fill up the required data bus size
// of the "host".
repeat (kmac_reg_pkg::NumSeedsEntropyLfsr) begin
`DV_SPINWAIT(edn_fifos[0].get(edn_item);, "Wait EDN request")
end
`uvm_info(`gfn, "got all edn transactions", UVM_HIGH)
set_entropy_fetch(0);
end
,
wait(cfg.under_reset);
)
end
endtask
// This task will check for any sideload keys that have been provided
// ICEBOX: use this for error case instead
virtual task process_sideload_key();
/*
@(negedge cfg.under_reset);
forever begin
wait(!cfg.under_reset);
`DV_SPINWAIT_EXIT(
forever begin
// Wait for a valid sideloaded key
cfg.keymgr_sideload_agent_cfg.vif.wait_valid(logic'(1'b1));
// Once valid sideload keys have been seen, update scoreboard state.
//
// Note: max size of sideloaded key is keymgr_pkg::KeyWidth
sideload_key = cfg.keymgr_sideload_agent_cfg.vif.sideload_key;
`uvm_info(`gfn, $sformatf("detected valid sideload_key: %0p", sideload_key), UVM_HIGH)
for (int i = 0; i < keymgr_pkg::KeyWidth / 32; i++) begin
keymgr_keys[0][i] = sideload_key.key[0][i*32 +: 32];
keymgr_keys[1][i] = sideload_key.key[1][i*32 +: 32];
end
// Sequence will drop the sideloaded key after scb can process the digest
cfg.keymgr_sideload_agent_cfg.vif.wait_valid(logic'(1'b0));
end
,
wait(cfg.under_reset);
)
end
*/
endtask
// Get sideload keys, pack and return the keys.
virtual function bit [KMAC_NUM_SHARES-1:0][KMAC_NUM_KEYS_PER_SHARE-1:0][31:0] get_keymgr_keys();
bit [KMAC_NUM_SHARES-1:0][KMAC_NUM_KEYS_PER_SHARE-1:0][31:0] keymgr_keys;
keymgr_pkg::hw_key_req_t sideload_key;
if (cfg.keymgr_sideload_agent_cfg.vif.sideload_key.valid) begin
sideload_key = cfg.keymgr_sideload_agent_cfg.vif.sideload_key;
`uvm_info(`gfn, $sformatf("get valid sideload_key: %0p", sideload_key), UVM_HIGH)
for (int i = 0; i < keymgr_pkg::KeyWidth / 32; i++) begin
keymgr_keys[0][i] = sideload_key.key[0][i*32 +: 32];
keymgr_keys[1][i] = sideload_key.key[1][i*32 +: 32];
end
return keymgr_keys;
end else begin
`uvm_error(`gfn, "Invalid sideload key")
return 0;
end
endfunction
// This task checks for the start of a KMAC_APP operation and updates scoreboard state
// accordingly.
//
// `process_kmac_app_req_fifo()` cannot be used for this purpose because the scb will only
// receive a kmac_app_req item once the full request has been completed, which can consist of
// many different request transactions.
virtual task detect_kmac_app_start();
@(negedge cfg.under_reset);
forever begin
`DV_SPINWAIT_EXIT(
forever begin
// If we are not in KMAC_APP mode, the next time we see valid is the start
// of a KMAC_APP operation.
//
// Assume that application interface requests do not collide.
`uvm_info(`gfn, "waiting for new kmac_app request", UVM_HIGH)
wait(!in_kmac_app && app_fsm_active &&
(`KMAC_APP_VALID_TRANS(AppKeymgr) ||
`KMAC_APP_VALID_TRANS(AppLc) ||
`KMAC_APP_VALID_TRANS(AppRom)));
in_kmac_app = 1;
sha3_idle = 0;
sha3_absorb = 1;
`uvm_info(`gfn, "Raised in_kmac_app and sha3_absorb. Dropped sha3_idle.", UVM_HIGH)
// we need to choose the correct application interface
if (`KMAC_APP_VALID_TRANS(AppKeymgr)) begin
app_mode = AppKeymgr;
strength = sha3_pkg::L256;
if (entropy_ready) incr_and_predict_hash_cnt();
end else if (`KMAC_APP_VALID_TRANS(AppLc)) begin
app_mode = AppLc;
strength = sha3_pkg::L128;
end else if (`KMAC_APP_VALID_TRANS(AppRom)) begin
app_mode = AppRom;
strength = sha3_pkg::L256;
end
// sample sideload-related coverage
if (cfg.en_cov) begin
// Note that all arguments to the covergroup sample() function are the same,
// this is due to the nature of the arguments that this function takes:
//
// - `en_sideload`: this bit indicates whether sideloading mode is active
// - `in_kmac` : this bit indicates whether we are operating in KMAC mode
// - `app_keymgr` : this bit indicates whether we are using the Keymgr-specific App
// interface
//
// Checking whether the current application mode is the AppKeymgr mode gives us
// sufficient information for all three of these arguments due to the nature of this
// particular interface.
cov.sideload_cg.sample(app_mode == AppKeymgr,
app_mode == AppKeymgr,
app_mode == AppKeymgr);
end
@(posedge sha3_idle);
end
,
wait(cfg.under_reset || kmac_err.code == ErrKeyNotValid ||
cfg.kmac_vif.lc_escalate_en_i != lc_ctrl_pkg::Off)
)
if (cfg.under_reset || cfg.kmac_vif.lc_escalate_en_i != lc_ctrl_pkg::Off) begin
@(negedge cfg.under_reset);
end
if (kmac_err.code == ErrKeyNotValid) begin
`uvm_info(`gfn, "kmac_err.code is ErrKeyNotValid", UVM_HIGH)
`uvm_info(`gfn, "waiting for error to drop", UVM_HIGH)
wait(kmac_err.code == ErrNone);
`uvm_info(`gfn, "ErrKeyNotValid has been handled", UVM_HIGH)
end
wait(!cfg.under_reset);
end
endtask
// This task models the internal FSM of kmac_app module,
// required for error handling SW output.
virtual task process_kmac_app_fsm();
@(negedge cfg.under_reset);
forever begin
wait(!cfg.under_reset);
`DV_SPINWAIT_EXIT(
forever begin
app_mux_sel = SelNone;
case (app_st)
StIdle: begin
app_fsm_active = 0;
if (!in_kmac_app &&
(cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.req_data_if.valid ||
cfg.m_kmac_app_agent_cfg[AppLc].vif.req_data_if.valid ||
cfg.m_kmac_app_agent_cfg[AppRom].vif.req_data_if.valid)) begin
app_st = StAppCfg;
app_fsm_active = 1;
end else if (checked_kmac_cmd == CmdStart) begin
app_st = StSw;
end
end
StAppCfg: begin
if (app_mode == AppKeymgr &&
!cfg.keymgr_sideload_agent_cfg.vif.sideload_key.valid) begin
app_st = StKeyMgrErrKeyNotValid;
end else begin
app_st = StAppMsg;
end
end
StAppMsg: begin
app_mux_sel = SelApp;
if (kmac_app_last) begin
if (app_mode == AppKeymgr) begin
app_st = StAppOutLen;
end else begin
app_st = StAppProcess;
end
end
end
StAppOutLen: begin
app_mux_sel = SelOutLen;
app_st = StAppProcess;
end
StAppProcess: begin
app_st = StAppWait;
end
StAppWait: begin
if (keccak_complete_cycle) begin
app_st = StIdle;
app_fsm_active = 0;
end
end
StSw: begin
app_mux_sel = SelSw;
if (checked_kmac_cmd == CmdDone) begin
app_st = StIdle;
app_fsm_active = 0;
end
end
StKeyMgrErrKeyNotValid: begin
app_st = StError;
app_fsm_active = 0;
in_kmac_app = 0;
sha3_squeeze = 0;
sha3_idle = 1;
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrKeyNotValid;
kmac_err.info = '0;
predict_err(.is_kmac_err(1));
end
StError: begin
if (`gmv(ral.cfg_shadowed.err_processed)) begin
app_st = StIdle;
end else begin
app_st = StError;
end
// It's possible for SW to not clear the error until after the hash is done.
// In this case the hash will be garbage data, so do not check it.
if (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid &&
cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.last) begin
do_check_digest = 0;
end
end
default: begin
app_st = StIdle;
app_fsm_active = 0;
end
endcase
if (cfg.kmac_vif.lc_escalate_en_i != lc_ctrl_pkg::Off) app_st = StError;
cfg.clk_rst_vif.wait_clks(1);
#0;
end
,
wait(cfg.under_reset);
)
end
endtask
// This task continuously checks the analysis_port of the push_pull_agent
// in the kmac_app_agent, as we need to know every time a data block is sent
// over the KMAC_APP interface.
virtual task process_kmac_app_req_fifo();
push_pull_agent_pkg::push_pull_item#(
.HostDataWidth(kmac_app_agent_pkg::KMAC_REQ_DATA_WIDTH)) kmac_app_block_item;
forever begin
wait(!cfg.under_reset);
@(posedge in_kmac_app);
`uvm_info(`gfn, $sformatf("req app_mode: %0s", app_mode.name()), UVM_HIGH)
`DV_SPINWAIT_EXIT(
forever begin
kmac_app_req_fifo[app_mode].get(kmac_app_block_item);
`uvm_info(`gfn,
$sformatf("Detected KMAC_APP data transfer:\n%0s",
kmac_app_block_item.sprint()),
UVM_HIGH)
{kmac_app_block_data, kmac_app_block_strb, kmac_app_last} =
kmac_app_block_item.h_data;
kmac_app_block_strb_size = $countones(kmac_app_block_strb);
// sample coverage
if (cfg.en_cov) begin
cov.app_cg_wrappers[app_mode].app_sample(0,
kmac_app_block_strb,
0,
kmac_app_last,
in_keccak_rounds);
end
while (kmac_app_block_strb > 0) begin
if (kmac_app_block_strb[0]) begin
kmac_app_msg.push_back(kmac_app_block_data[7:0]);
end
kmac_app_block_data = kmac_app_block_data >> 8;
kmac_app_block_strb = kmac_app_block_strb >> 1;
end
`uvm_info(`gfn, $sformatf("kmac_app_msg: %0p", kmac_app_msg), UVM_HIGH)
end
,
wait(cfg.under_reset || !in_kmac_app);
)
end
endtask
// This task processes the `kmac_app_rsp_fifo`.
//
// This fifo is populated once the KMAC has sent the response digest to
// complete the KMAC_APP request.
// As such, `in_kmac_app` must always be 1 when a response item is seen, otherwise
// something has gone horribly wrong.
//
// It is important to note that when in KMAC_APP mode, any messages/keys/commands sent
// to the CSRs will not be considered as valid, so this task needs to take care of checking
// the KMAC_APP digest and clearing internal state for the next hash operation.
virtual task process_kmac_app_rsp_fifo();
kmac_app_item kmac_app_rsp;
@(negedge cfg.under_reset);
forever begin
wait(!cfg.under_reset);
`DV_SPINWAIT_EXIT(
forever begin
wait(!cfg.under_reset);
@(posedge in_kmac_app);
`uvm_info(`gfn, $sformatf("rsp app_mode: %0s", app_mode.name()), UVM_HIGH)
`DV_SPINWAIT_EXIT(
bit app_intf_err = 0;
kmac_app_rsp_fifo[app_mode].get(kmac_app_rsp);
`uvm_info(`gfn,
$sformatf("Detected a KMAC_APP response:\n%0s",
kmac_app_rsp.sprint()),
UVM_HIGH)
// sample coverage
if (cfg.en_cov) begin
cov.app_cg_wrappers[app_mode].app_sample(
kmac_app_rsp.byte_data_q.size() <= keymgr_pkg::KmacDataIfWidth/8,
'0,
kmac_app_rsp.rsp_error,
1,
0
);
cov.app_cg_wrappers[app_mode].app_cfg_reg_sample(hash_mode);
end
// safety check that things are working properly and
// no random KMAC_APP operations are seen
`DV_CHECK_FATAL(in_kmac_app == 1,
"in_kmac_app is not set, scoreboard has not picked up KMAC_APP request")
// Check app interface errors.
if (app_mode == AppKeymgr && cfg.enable_masking && !entropy_ready) begin
app_intf_err = 1;
`DV_CHECK_FATAL(kmac_app_rsp.rsp_digest_share0 == 0,
"APP interface error, expect output to be all 0s")
`DV_CHECK_FATAL(kmac_app_rsp.rsp_digest_share1 == 0,
"APP interface error, expect output to be all 0s")
end else begin
// assign digest values
kmac_app_digest_share0 = kmac_app_rsp.rsp_digest_share0;
kmac_app_digest_share1 = kmac_app_rsp.rsp_digest_share1;
if (do_check_digest) check_digest();
end
`DV_CHECK_FATAL(kmac_app_rsp.rsp_error == app_intf_err)
in_kmac_app = 0;
sha3_squeeze = 0;
sha3_absorb = 0;
sha3_idle = 1;
`uvm_info(`gfn, "dropped in_kmac_app and raised sha3_idle", UVM_HIGH)
clear_state();
,
wait(!in_kmac_app);
)
end
,
wait(cfg.under_reset);
)
end
endtask
virtual task process_tl_access(tl_seq_item item, tl_channels_e channel, string ral_name);
uvm_reg csr;
dv_base_reg dv_base_csr;
string csr_name = "";
bit msgfifo_access;
bit share0_access;
bit share1_access;
bit do_read_check = 1'b1;
bit write = item.is_write();
uvm_reg_addr_t csr_addr = cfg.ral_models[ral_name].get_word_aligned_addr(item.a_addr);
bit [TL_AW-1:0] csr_addr_mask = ral.get_addr_mask();
bit addr_phase_read = (!write && channel == AddrChannel);
bit addr_phase_write = (write && channel == AddrChannel);
bit data_phase_read = (!write && channel == DataChannel);
bit data_phase_write = (write && channel == DataChannel);
// if access was to a valid csr, get the csr handle
if (csr_addr inside {cfg.ral_models[ral_name].csr_addrs}) begin
csr = cfg.ral_models[ral_name].default_map.get_reg_by_offset(csr_addr);
`DV_CHECK_NE_FATAL(csr, null)
`downcast(dv_base_csr, csr)
csr_name = csr.get_name();
// if incoming access is a write to valid csr, immediately make updates
if (addr_phase_write) begin
// following csrs are locked by CFG_REGWEN:
// - cfg
// - entropy_period
// - entropy_seed
// - key_len
// if writes to these csrs are seen, must check that they are not locked first.
if (ral.cfg_regwen.locks_reg_or_fld(dv_base_csr) &&
`gmv(ral.cfg_regwen) == 0) return;
void'(csr.predict(.value(item.a_data), .kind(UVM_PREDICT_WRITE), .be(item.a_mask)));
end
end else if ((csr_addr & csr_addr_mask) inside {[KMAC_FIFO_BASE : KMAC_FIFO_END]}) begin
// msgfifo window
msgfifo_access = 1;
end else if ((csr_addr & csr_addr_mask) inside {[KMAC_STATE_SHARE0_BASE :
KMAC_STATE_SHARE0_END]}) begin
// state window 0
share0_access = 1;
end else if ((csr_addr & csr_addr_mask) inside {[KMAC_STATE_SHARE1_BASE :
KMAC_STATE_SHARE1_END]}) begin
// state window 1
share1_access = 1;
end else begin
`uvm_fatal(`gfn, $sformatf("Access unexpected addr 0x%0h", csr_addr))
end
// process the csr req
// for write, update local variable and fifo at address phase
// for read, update predication at address phase and compare at data phase
case (csr_name)
// add individual case item for each csr
"intr_state": begin
`uvm_info(`gfn, $sformatf("intr_kmac_done: %0d", intr_kmac_done), UVM_HIGH)
`uvm_info(`gfn, $sformatf("intr_fifo_empty: %0d", intr_fifo_empty), UVM_HIGH)
`uvm_info(`gfn, $sformatf("intr_kmac_err: %0d", intr_kmac_err), UVM_HIGH)
if (data_phase_write) begin
// clear internal state on a write
if (item.a_data[KmacDone]) intr_kmac_done = 0;
if (item.a_data[KmacFifoEmpty]) intr_fifo_empty = 0;
if (item.a_data[KmacErr]) intr_kmac_err = 0;
end else if (data_phase_read) begin
// ICEBOX: check below
do_read_check = 0;
if (item.d_data[KmacDone]) begin
sha3_absorb = 0;
sha3_squeeze = 1;
end
// sample intr coverage
if (cfg.en_cov) begin
bit [TL_DW-1:0] intr_en = `gmv(ral.intr_enable);
bit [KmacNumIntrs-1:0] intr_exp = `gmv(ral.intr_state);
foreach (intr_exp[i]) begin
cov.intr_cg.sample(i, intr_en[i], item.d_data);
cov.intr_pins_cg.sample(i, cfg.intr_vif.pins[i]);
end
end
end
end
"intr_enable": begin
// no need to do anything here, functionality is tested in the automated intr tests,
// and any issues here will become known if any checks on `intr_state` fail
end
"intr_test": begin
if (addr_phase_write) begin
bit [TL_DW-1:0] intr_en = `gmv(ral.intr_enable);
bit [KmacNumIntrs-1:0] intr_exp = item.a_data | `gmv(ral.intr_state);
void'(ral.intr_state.predict(.value(intr_exp), .kind(UVM_PREDICT_DIRECT)));
// update internal interrupt tracking variables
if (intr_exp[KmacDone]) intr_kmac_done = 1;
if (intr_exp[KmacFifoEmpty]) intr_fifo_empty = 1;
if (intr_exp[KmacErr]) intr_kmac_err = 1;
// sample coverage
if (cfg.en_cov) begin
foreach (intr_exp[i]) begin
cov.intr_test_cg.sample(i, item.a_data[i], intr_en[i], intr_exp[i]);
end
end
end
end
"cfg_regwen": begin
// do nothing
end
"cfg_shadowed": begin
// don't continue if the write is shadow register's first write,
// or the second write has update error
if (addr_phase_write &&
(dv_base_csr.is_staged() || dv_base_csr.get_shadow_update_err())) begin
return;
end
if (addr_phase_write) begin
// don't continue if the KMAC is currently operating
if (!sha3_idle) begin
return;
end
kmac_en = item.a_data[KmacEn];
entropy_fast_process = item.a_data[KmacFastEntropy];
entropy_ready = item.a_data[KmacEntropyReady];
sideload_en = item.a_data[KmacSideload];
hash_mode = sha3_pkg::sha3_mode_e'(item.a_data[KmacModeMSB:KmacModeLSB]);
strength = sha3_pkg::keccak_strength_e'(item.a_data[KmacStrengthMSB:KmacStrengthLSB]);
entropy_mode = entropy_mode_e'(item.a_data[KmacEntropyModeMSB:KmacEntropyModeLSB]);
// sample sideload-related coverage
if (cfg.en_cov) begin
cov.sideload_cg.sample(sideload_en, kmac_en, 0);
end
// Entropy mode configuration error
if (cfg.enable_masking && !(entropy_mode inside {EntropyModeSw, EntropyModeEdn})) begin
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrIncorrectEntropyMode;
kmac_err.info = 24'(entropy_mode);
predict_err(.is_kmac_err(1));
end
if (item.a_data[KmacEntropyReady] && first_op_after_rst) begin
set_entropy_fetch(1);
end
end
end
"cmd": begin
// Writing to CMD will always result in the KMAC doing something
//
// ICEBOX - handle error cases
if (addr_phase_write) begin
bit [KmacCmdIdx:0] kmac_cmd = item.a_data[KmacCmdIdx:0];
// Handle hash_cnt clear conditions
if (item.a_data[KmacHashCntClrIdx]) `DV_CHECK(ral.entropy_refresh_hash_cnt.predict(0));
if (item.a_data[KmacEntropyReqIdx]) begin
`DV_CHECK(ral.entropy_refresh_hash_cnt.predict(0));
set_entropy_fetch(1);
end
if (app_fsm_active) begin
// As per designer comment in https:/lowRISC/opentitan/issues/7716,
// if CmdStart is sent during an active App operation, KMAC will throw
// ErrSwIssuedCmdInAppActive, but for any other command the KMAC will throw a
// ErrSwCmdSequence.
if (kmac_cmd_e'(kmac_cmd) != CmdNone) begin
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrSwIssuedCmdInAppActive;
kmac_err.info = 24'(item.a_data);
predict_err(.is_kmac_err(1));
end
end else begin
case (kmac_cmd_e'(kmac_cmd))
CmdStart: begin
bit en_unsupported_modestrength = 1;
// Mode/Strength configuration error
if ((hash_mode inside {sha3_pkg::Shake, sha3_pkg::CShake} &&
!(strength inside {sha3_pkg::L128, sha3_pkg::L256})) ||
(hash_mode == sha3_pkg::Sha3 &&
strength == sha3_pkg::L128)) begin
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrUnexpectedModeStrength;
kmac_err.info = {8'h2, 10'h0, 2'(hash_mode), 1'b0, 3'(strength)};
predict_err(.is_kmac_err(1));
// If the mode/strength are mis-configured, the IP will finish running a hash
// with the incorrect configuration, producing a garbage digest that should not
// be checked.
if (`gmv(ral.cfg_shadowed.en_unsupported_modestrength)) do_check_digest = 1'b0;
else en_unsupported_modestrength = 0;
end
if (checked_kmac_cmd == CmdNone && en_unsupported_modestrength) begin
// the first 6B of the prefix (function name),
// need to check that it is "KMAC" when `kmac_en == 1`
bit [47:0] function_name_6B;
bit [TL_DW-1:0] prefix_val;
// msgfifo will now be written
unchecked_kmac_cmd = CmdStart;
function_name_6B[31:0] = `gmv(ral.prefix[0]);
prefix_val = `gmv(ral.prefix[1]);
function_name_6B[47:32] = prefix_val[15:0];
void'(ral.cfg_regwen.predict(.value(0)));
// If masking on and it is a KMAC transaction with secret keys, increment the
// entropy count.
if (kmac_en) incr_and_predict_hash_cnt();
if (kmac_en && function_name_6B != kmac_pkg::EncodedStringKMAC) begin
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrIncorrectFunctionName;
kmac_err.info = {8'h1, 16'h0};
// If incorrect function name is given, KMAC will finish the current hash
// operation and produce an incorrect digest, do not check this.
predict_err(.is_kmac_err(1));
do_check_digest = 0;
end
end else begin // SW sent wrong command
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrSwCmdSequence;
kmac_err.info = get_kmac_sw_cmd_seq_err_info(kmac_cmd);
predict_err(.is_kmac_err(1));
end
end
CmdProcess: begin
if (checked_kmac_cmd == CmdStart) begin
// kmac will now compute the digest
unchecked_kmac_cmd = CmdProcess;
end else begin // SW sent wrong command
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrSwCmdSequence;
kmac_err.info = get_kmac_sw_cmd_seq_err_info(kmac_cmd);
predict_err(.is_kmac_err(1));
end
end
CmdManualRun: begin
if (checked_kmac_cmd inside {CmdProcess, CmdManualRun}) begin
// kmac will now squeeze more output data
unchecked_kmac_cmd = CmdManualRun;
req_manual_squeeze = 1;
// Mask out status sequeeze check because it requires cycle accurate prediction.
// Use sequence to backdoor check if sequeeze is reset to 0 after each squeeze
// command.
status_mask[KmacStatusSha3Squeeze] = 1;
`uvm_info(`gfn, "raised req_manual_squeeze", UVM_HIGH)
end else begin // SW sent wrong command
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrSwCmdSequence;
kmac_err.info = get_kmac_sw_cmd_seq_err_info(kmac_cmd);
predict_err(.is_kmac_err(1));
end
end
CmdDone: begin
if (checked_kmac_cmd inside {CmdProcess, CmdManualRun}) begin
unchecked_kmac_cmd = CmdDone;
sha3_squeeze = 0;
`uvm_info(`gfn, "dropped sha3_squeeze", UVM_HIGH)
// sample coverage of message length
if (cfg.en_cov) begin
cov.msg_len_cg.sample(msg.size());
end
status_mask[KmacStatusSha3Squeeze] = 0;
// Calculate the digest using DPI and check for correctness
if (do_check_digest) check_digest();
// Flush all scoreboard state to prepare for the next hash operation
clear_state();
void'(ral.cfg_regwen.predict(.value(1)));
end else begin // SW sent wrong command
kmac_err.valid = 1;
kmac_err.code = kmac_pkg::ErrSwCmdSequence;
kmac_err.info = get_kmac_sw_cmd_seq_err_info(kmac_cmd);
predict_err(.is_kmac_err(1));
end
end
CmdNone: begin
// RTL internal value, doesn't actually do anything
end
default: begin
`uvm_fatal(`gfn, $sformatf("%0d is an illegal CMD value", kmac_cmd))
end
endcase
end
end else begin
// this bit will be set to 0 during the data phase of the write,
// providing better detection of when exactly a manual squeeze command
// has been requested
req_manual_squeeze = 0;
`uvm_info(`gfn, "dropped req_manual_squeeze", UVM_HIGH)
end
end
"status": begin
if (addr_phase_read) begin
bit [TL_DW-1:0] exp_status;
exp_status[KmacStatusSha3Idle] = sha3_idle;
exp_status[KmacStatusSha3Absorb] = sha3_absorb;
exp_status[KmacStatusSha3Squeeze] = sha3_squeeze;
void'(ral.status.predict(.value(exp_status), .kind(UVM_PREDICT_READ)));
end else if (data_phase_read) begin
do_read_check = 0;
// Check fifo empty/full and fifo depth are aligned.
if (item.d_data[KmacStatusFifoEmpty]) begin
`DV_CHECK_EQ(item.d_data[KmacStatusFifoDepthMSB : KmacStatusFifoDepthLSB], 0,
$sformatf("Status (val:%0h) error when fifo empty! Expect Fifo Depth to be 0",
item.d_data))
`DV_CHECK_EQ(item.d_data[KmacStatusFifoFull], 0,
$sformatf("Status (val:%0h) error! Full/Empty cannot both set",
item.d_data))
end else if (item.d_data[KmacStatusFifoFull]) begin
`DV_CHECK_EQ(item.d_data[KmacStatusFifoDepthMSB : KmacStatusFifoDepthLSB],
KMAC_FIFO_DEPTH,
$sformatf("Status (val:%0h) error when fifo full! Expect Fifo Depth to be %0h",
item.d_data, KMAC_FIFO_DEPTH))
end else begin
// When fifo empty is not set, we still allow one clock cycle where the fifo depth is
// set to 0. This is documented in issue #14286.
`DV_CHECK_LT(item.d_data[KmacStatusFifoDepthMSB : KmacStatusFifoDepthLSB],
KMAC_FIFO_DEPTH,
$sformatf("Status (val:%0h) error! Depth cannot be %0h when fifo full is not set",
item.d_data, KMAC_FIFO_DEPTH))
end
`DV_CHECK_EQ(csr.get_mirrored_value() | status_mask, item.d_data | status_mask,
$sformatf("reg name: %0s", csr.get_full_name()))
// Sample coverage:
if (cfg.en_cov) begin
cov.msgfifo_level_cg.sample(
item.d_data[KmacStatusFifoEmpty],
item.d_data[KmacStatusFifoFull],
item.d_data[KmacStatusFifoDepthMSB : KmacStatusFifoDepthLSB],
hash_mode,
is_kmac_en());
cov.sha3_status_cg.sample(item.d_data[KmacStatusSha3Idle],
item.d_data[KmacStatusSha3Absorb],
item.d_data[KmacStatusSha3Squeeze]);
end
end
end
"key_len": begin
// ICEBOX need to do error checking
if (addr_phase_write) begin
key_len = key_len_e'(item.a_data);
end
end
"err_code": begin
if (data_phase_read) begin
kmac_pkg::err_t err_code = kmac_pkg::err_t'(item.d_data);
if (err_code.code == ErrSwCmdSequence) begin
// Mask out the kmac_state FSM information because the SCB is not cycle accurate to
// track in which SHA state does the error happen.
kmac_pkg::err_t err_chk_mask = '1;
err_chk_mask.info[kmac_st_idx +: 2] = 0;
// ICEBOX: add some direct sequence to check this error information.
do_read_check = 0;
`DV_CHECK_EQ(csr.get_mirrored_value() & err_chk_mask, item.d_data & err_chk_mask,
$sformatf("reg name: %0s", csr.get_full_name()))
end
end
end
"entropy_refresh_threshold_shadowed": begin
if (addr_phase_write &&
(dv_base_csr.is_staged() || dv_base_csr.get_shadow_update_err())) begin
bit [HASH_CNT_WIDTH-1:0] threshold = item.a_data;
if (threshold > 0 && threshold <= `gmv(ral.entropy_refresh_hash_cnt)) begin
`DV_CHECK(ral.entropy_refresh_hash_cnt.predict(0));
set_entropy_fetch(1);