[otp_ctrl/dv] Fix xcelium compile errors

Signed-off-by: Michael Schaffner <[email protected]>

hw/ip/otp_ctrl/dv/env/otp_ctrl_scoreboard.sv

@@ -389,7 +389,7 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
 
  virtual task check_flash_rsps();
  for (int i = FlashDataKey; i <= FlashAddrKey; i++) begin
- automatic digest_sel_e sel_flash = i;
+ automatic digest_sel_e sel_flash = digest_sel_e'(i);
  fork
  forever begin
  push_pull_item#(.DeviceDataWidth(FLASH_DATA_SIZE)) rcv_item;
@@ -568,7 +568,7 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
  // ECC uncorrectable errors are gated by `is_tl_mem_access_allowed` function.
  if (ecc_err != OtpNoEccErr && part_has_integrity(part_idx)) begin
 
- predict_err(part_idx, OtpMacroEccCorrError);
+ predict_err(otp_status_e'(part_idx), OtpMacroEccCorrError);
  if (ecc_err == OtpEccCorrErr) begin
  `DV_CHECK_EQ(item.d_data, otp_a[otp_addr],
  $sformatf("mem read mismatch at TLUL addr %0h, csr_addr %0h",
@@ -585,12 +585,12 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
  `DV_CHECK_EQ(item.d_data, read_out,
  $sformatf("mem read mismatch at TLUL addr %0h, csr_addr %0h",
  csr_addr, dai_addr))
- predict_no_err(part_idx);
+ predict_no_err(otp_status_e'(part_idx));
  end else if (ecc_err == OtpNoEccErr) begin
  `DV_CHECK_EQ(item.d_data, otp_a[otp_addr],
  $sformatf("mem read mismatch at TLUL addr %0h, csr_addr %0h",
  csr_addr, dai_addr))
- predict_no_err(part_idx);
+ predict_no_err(otp_status_e'(part_idx));
  end
  end
  return;
@@ -680,7 +680,7 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
  if (part_idx == Secret2Idx) begin
  cov.dai_access_secret2_cg.sample(
  !(cfg.otp_ctrl_vif.lc_creator_seed_sw_rw_en_i != lc_ctrl_pkg::On),
- item.a_data);
+ dai_cmd_e'(item.a_data));
  end else if (is_sw_part_idx(part_idx) &&
  item.a_data inside {DaiRead, DaiWrite}) begin
  cov.unbuf_access_lock_cg_wrap[part_idx].sample(.read_lock(sw_read_lock),
@@ -881,7 +881,8 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
  end
 
  if (addr_phase_write && `gmv(ral.check_trigger_regwen) && item.a_data inside {[1:3]}) begin
- bit [TL_DW-1] check_timout = `gmv(ral.check_timeout) == 0 ? '1 : `gmv(ral.check_timeout);
+ bit [TL_DW-1:0] check_timout = `gmv(ral.check_timeout) == 0 ? '1 :
+ `gmv(ral.check_timeout);
  exp_status[OtpCheckPendingIdx] = 1;
  under_chk = 1;
  if (check_timout <= CHK_TIMEOUT_CYC) begin
@@ -891,11 +892,11 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
  if (get_field_val(ral.check_trigger.consistency, item.a_data)) begin
  foreach (cfg.ecc_chk_err[i]) begin
  if (cfg.ecc_chk_err[i] == OtpEccCorrErr && part_has_integrity(i)) begin
- predict_err(i, OtpMacroEccCorrError);
+ predict_err(otp_status_e'(i), OtpMacroEccCorrError);
  end else if (cfg.ecc_chk_err[i] == OtpEccUncorrErr &&
  part_has_integrity(i)) begin
  set_exp_alert("fatal_macro_error", 1, check_timout);
- predict_err(i, OtpMacroEccUncorrError);
+ predict_err(otp_status_e'(i), OtpMacroEccUncorrError);
  end
  end
  end
@@ -1361,7 +1362,7 @@ class otp_ctrl_scoreboard #(type CFG_T = otp_ctrl_env_cfg)
  bit [TL_DW-1:0] read_out;
  int ecc_err = read_a_word_with_ecc(dai_addr, read_out);
  if (ecc_err == OtpEccUncorrErr && part_has_integrity(part_idx)) begin
- predict_err(part_idx, OtpMacroEccUncorrError);
+ predict_err(otp_status_e'(part_idx), OtpMacroEccUncorrError);
  set_exp_alert("fatal_macro_error", 1, 20);
  custom_err = 1;
  return 0;

hw/ip/otp_ctrl/dv/env/seq_lib/otp_ctrl_base_vseq.sv

@@ -123,8 +123,8 @@ class otp_ctrl_base_vseq extends cip_base_vseq #(
  virtual task otp_ctrl_init();
  // reset memory to avoid readout X
  clear_otp_memory();
- lc_state = 0;
- lc_cnt = 0;
+ lc_state = lc_state_e'(0);
+ lc_cnt = lc_cnt_e'(0);
  endtask
 
  virtual function void clear_otp_memory();

hw/ip/otp_ctrl/dv/env/seq_lib/otp_ctrl_init_fail_vseq.sv

@@ -176,6 +176,7 @@ class otp_ctrl_init_fail_vseq extends otp_ctrl_smoke_vseq;
  int error_cnt;
  otp_err_code_e exp_err_code = (alert_name == "fatal_check_error") ?
  OtpCheckFailError : OtpMacroEccUncorrError;
+ uvm_reg_data_t err_code_raw;
  otp_err_code_e err_code;
  dv_base_reg_field err_code_flds[$];
 
@@ -201,7 +202,8 @@ class otp_ctrl_init_fail_vseq extends otp_ctrl_smoke_vseq;
  for (int i = 0; i <= OtpLciErrIdx; i++) begin
  ral.err_code[i].get_dv_base_reg_fields(err_code_flds);
  if (exp_status[i]) begin
- csr_rd(err_code_flds[0], err_code);
+ csr_rd(err_code_flds[0], err_code_raw);
+ err_code = otp_err_code_e'(err_code_raw);
  if (err_code == exp_err_code) begin
  error_cnt++;
  end else if (err_code != OtpFsmStateError) begin

hw/ip/otp_ctrl/dv/env/seq_lib/otp_ctrl_smoke_vseq.sv

@@ -149,7 +149,7 @@ class otp_ctrl_smoke_vseq extends otp_ctrl_base_vseq;
 
  `DV_CHECK_RANDOMIZE_FATAL(this)
  // recalculate part_idx in case some test turn off constraint dai_wr_legal_addr_c
- part_idx = get_part_index(dai_addr);
+ part_idx = part_idx_e'(get_part_index(dai_addr));
  `uvm_info(`gfn, $sformatf("starting dai access seq %0d/%0d with addr %0h in partition %0d",
  i, num_dai_op, dai_addr, part_idx), UVM_HIGH)