[clkmgr, fpga] Enhance clkmgr to allow for different types of clock gates per module

[tjaychen]

Specifically, allow additional attributes in the top hjson file to specify what kind of FPGA clock gates a particular module should use.
See #11063 for motivation.

[tjaychen]

@vogelpi FYI

[vogelpi]

Cool, thanks for creating this issue @tjaychen . Automating this based on the top-level sounds like a good idea.

[andreaskurth]

Triaged for clkmgr. I think this isn't needed for the current release, so Type:FutureRelease Not relevant to currently planned releases/milestones seems appropriate.

[msfschaffner]

CC @a-will

[a-will]

This can actually be specified with prim-specific localparams + hierarchical paths to set it from the chip_* layer (which can come from either the template or hjson, depending on implementation in topgen). I initially did this with spi_device for CW340, but then I found a different way (converted some of the higher-layer clock prims to abstract).