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[dv] Clean up enable_reg_testplan #10972

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Feb 22, 2022
Merged

[dv] Clean up enable_reg_testplan #10972

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4 changes: 4 additions & 0 deletions hw/dv/tools/dvsim/testplans/csr_testplan.hjson
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Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,8 @@
- If regwen CSR is HW read-only, this feature can be fully tested by common
CSR tests - csr_rw and csr_aliasing.
- If regwen CSR is HW updated, a separate test should be created to test it.

This is only applicable if the block contains regwen and locakable CSRs.
'''
milestone: V1
tests: ["{name}{intf}_csr_rw", "{name}{intf}_csr_aliasing"]
Expand All @@ -106,6 +108,8 @@
occurs after that.
- When regwen = 0, a different value is written to the lockable CSR field, and a read
occurs after that.

This is only applicable if the block contains regwen and locakable CSRs.
'''
}
]
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19 changes: 0 additions & 19 deletions hw/dv/tools/dvsim/testplans/enable_reg_testplan.hjson
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This file was deleted.

1 change: 0 additions & 1 deletion hw/ip/pwm/data/pwm_testplan.hjson
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,6 @@
name: "pwm"
import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
"hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson",
"hw/dv/tools/dvsim/testplans/enable_reg_testplan.hjson",
"hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson",
"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson",
"pwm_sec_cm_testplan.hjson"],
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1 change: 0 additions & 1 deletion hw/ip_templates/alert_handler/data/alert_handler_testplan.hjson
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Expand Up @@ -5,7 +5,6 @@
name: "alert_handler"
import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
"hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson",
"hw/dv/tools/dvsim/testplans/enable_reg_testplan.hjson",
"hw/dv/tools/dvsim/testplans/shadow_reg_errors_testplan.hjson",
"hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson",
"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson",
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1 change: 0 additions & 1 deletion hw/top_earlgrey/data/chip_testplan.hjson
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Expand Up @@ -6,7 +6,6 @@

// TODO: remove the common testplans if not applicable
import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
"hw/dv/tools/dvsim/testplans/enable_reg_testplan.hjson",
// TODO #5484, comment these 2 lines out because spi host memory is dummy
// "hw/dv/tools/dvsim/testplans/mem_testplan.hjson",
"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson",
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1 change: 0 additions & 1 deletion hw/top_earlgrey/ip_autogen/alert_handler/data/alert_handler_testplan.hjson
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Expand Up @@ -5,7 +5,6 @@
name: "alert_handler"
import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
"hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson",
"hw/dv/tools/dvsim/testplans/enable_reg_testplan.hjson",
"hw/dv/tools/dvsim/testplans/shadow_reg_errors_testplan.hjson",
"hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson",
"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson",
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