Add unratified Smclic, Ssclic, Smclicshv extensions #420
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Spec: https:/riscv/riscv-fast-interrupt
Tests: riscv-non-isa/riscv-arch-test#436
Note: pulls are not yet available for spike that support CLIC
Related pulls to run arch-tests against the sail-riscv model:
riscv-software-src/riscv-config#169
riscv-software-src/riscof#106
riscv-software-src/riscv-isa-sim#1596
To include m-mode CLIC interrupt tests in riscof testlist flow, add Smclic to riscof yaml file, e.g.:
spike/spike_isa.yaml:
ISA: RV32IMCZicsr_Zifencei_Smclic