Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Avoid using ebx as an asm! operand #185

Merged
merged 3 commits into from
Oct 5, 2021
Merged

Avoid using ebx as an asm! operand #185

Changes from 2 commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
8b8ccfb
Revert "counters: use AT&T inline asm syntax for older LLVM."
andjo403 Oct 3, 2021
326c6a4
Avoid using ebx as an asm! operand
andjo403 Oct 3, 2021
404e220
use functions to avoid duplicated asm
andjo403 Oct 3, 2021
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
47 changes: 18 additions & 29 deletions measureme/src/counters.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -542,26 +542,24 @@ mod hw {
} else {
asm!(
// Dummy `cpuid(0)` to serialize instruction execution.
"xor %eax, %eax", // Intel syntax: "xor eax, eax"
"xor eax, eax",
// LLVM sometimes reserves `ebx` for its internal use, we so we need to use
// a scratch register for it instead.
"mov {tmp_rbx:r}, rbx",
"cpuid",
"mov rbx, {tmp_rbx:r}",
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I've noticed this. This is frustrating, as it makes cpuid undesirably troublesome (I wish Intel and AMD would agree on e.g. mfence/lfence being serializing). I suspect that using a LLVM intrinsic for cpuid would result in shorter codegen, can you try this? Either way, can you PM me on Zulip?

I've let that rustc PR sit, sadly (long story short, other factors forced us to abandon the grant it was part of), and it would be good to take stock of what's useful and what's just hacks we only needed to get the results we wanted.


"mov {rdpmc_ecx:e}, %ecx", // Intel syntax: "mov ecx, {rdpmc_ecx:e}"
"mov ecx, {rdpmc_ecx:e}",
"rdpmc",
rdpmc_ecx = in(reg) reg_idx,
tmp_rbx = out(reg) _,
out("eax") lo,
out("edx") hi,

// `cpuid` clobbers (not overwritten by `rdpmc`).
out("ebx") _,
out("ecx") _,

options(nostack),

// HACK(eddyb) LLVM 9 and older do not support modifiers
// in Intel syntax inline asm; whenever Rust minimum LLVM
// version becomes LLVM 10, remove and replace above
// instructions with Intel syntax version (from comments).
options(att_syntax),
);
}
}
Expand All @@ -579,33 +577,31 @@ mod hw {
unsafe {
asm!(
// Dummy `cpuid(0)` to serialize instruction execution.
"xor %eax, %eax", // Intel syntax: "xor eax, eax"
"xor eax, eax",
// LLVM sometimes reserves `ebx` for its internal use, we so we need to use
// a scratch register for it instead.
"mov {tmp_rbx:r}, rbx",
"cpuid",
"mov rbx, {tmp_rbx:r}",

"mov {a_rdpmc_ecx:e}, %ecx", // Intel syntax: "mov ecx, {a_rdpmc_ecx:e}"
"mov ecx, {a_rdpmc_ecx:e}",
"rdpmc",
"mov %eax, {a_rdpmc_eax:e}", // Intel syntax: "mov {a_rdpmc_eax:e}, eax"
"mov %edx, {a_rdpmc_edx:e}", // Intel syntax: "mov {a_rdpmc_edx:e}, edx"
"mov {b_rdpmc_ecx:e}, %ecx", // Intel syntax: "mov ecx, {b_rdpmc_ecx:e}"
"mov {a_rdpmc_eax:e}, eax",
"mov {a_rdpmc_edx:e}, edx",
"mov ecx, {b_rdpmc_ecx:e}",
"rdpmc",
a_rdpmc_ecx = in(reg) a_reg_idx,
a_rdpmc_eax = out(reg) a_lo,
a_rdpmc_edx = out(reg) a_hi,
b_rdpmc_ecx = in(reg) b_reg_idx,
tmp_rbx = out(reg) _,
out("eax") b_lo,
out("edx") b_hi,

// `cpuid` clobbers (not overwritten by `rdpmc`).
out("ebx") _,
out("ecx") _,

options(nostack),

// HACK(eddyb) LLVM 9 and older do not support modifiers
// in Intel syntax inline asm; whenever Rust minimum LLVM
// version becomes LLVM 10, remove and replace above
// instructions with Intel syntax version (from comments).
options(att_syntax),
);
}
(
Expand Down Expand Up @@ -815,17 +811,10 @@ mod hw {
let mut _tmp: u64 = 0;
unsafe {
asm!(
// Intel syntax: "lock xadd [{atomic}], {tmp}"
"lock xadd {tmp}, ({atomic})",
"lock xadd qword ptr [{atomic}], {tmp}",

atomic = in(reg) &mut atomic,
tmp = inout(reg) _tmp,

// HACK(eddyb) LLVM 9 and older do not support modifiers
// in Intel syntax inline asm; whenever Rust minimum LLVM
// version becomes LLVM 10, remove and replace above
// instructions with Intel syntax version (from comments).
options(att_syntax),
);
}

Expand Down