Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Enable f16 and f128 in assembly on platforms that support it #125398

Open
tgross35 opened this issue May 22, 2024 · 5 comments
Open

Enable f16 and f128 in assembly on platforms that support it #125398

tgross35 opened this issue May 22, 2024 · 5 comments
Labels
A-inline-assembly Area: Inline assembly (`asm!(…)`) E-medium Call for participation: Medium difficulty. Experience needed to fix: Intermediate. F-f16_and_f128 `#![feature(f16)]`, `#![feature(f128)]` T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.

Comments

@tgross35
Copy link
Contributor

tgross35 commented May 22, 2024

The below should work, but errors that f16 is not usable for registers:

#![feature(f16, f128)]

use core::arch::asm;

#[inline(never)]
pub fn f32_to_f16(a: f32) -> f16 {
    a as f16
}

#[inline(never)]
pub fn f32_to_f16_asm(a: f32) -> f16 {
    let ret: f16;
    unsafe {
        asm!(
                "fcvt    {ret:h}, {a:s}",
                a = in(vreg) a,
                ret = lateout(vreg) ret,
                options(nomem, nostack),
        );
    }

    ret
}

On aarch64 the first function generates:

example::f32_to_f16::hc897184dfb47f3d6:
        fcvt    h0, s0
        ret

f16 types should be supported as a vreg on aarch64 in order to reproduce that code.


The following other platforms also apparently have some level of instruction support, but are less well documented:

Additionally, for f128:

  • s390x supports f128, referred to as "BFP Extended Format" in https://publibfp.dhe.ibm.com/epubs/pdf/a227832c.pdf. I am not sure if this comes with any special instructions.
  • PowerPC with -Ctarget-cpu=pwr9 seems to have f128 support via instructions like xsaddqp

Tracking issue: #116909

@rustbot rustbot added the needs-triage This issue may need triage. Remove it if it has been sufficiently triaged. label May 22, 2024
@tgross35
Copy link
Contributor Author

tgross35 commented May 22, 2024

I'm adding E-Easy because a PR that just enables support for aarch64 should be pretty easy, start around

ty::Float(FloatTy::F32) => Some(InlineAsmType::F32),
ty::Float(FloatTy::F64) => Some(InlineAsmType::F64),
and massage the new types in. Actually figuring out rules for the rest of the platforms will be harder, but that can come later.

Sample for reference: https://rust.godbolt.org/z/zK4qha1qo

@rustbot label +T-compiler +E-Easy +F-f16_and_f128 +A-inline-assembly -needs-triage

@rustbot rustbot added A-inline-assembly Area: Inline assembly (`asm!(…)`) E-easy Call for participation: Easy difficulty. Experience needed to fix: Not much. Good first issue. F-f16_and_f128 `#![feature(f16)]`, `#![feature(f128)]` T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. and removed needs-triage This issue may need triage. Remove it if it has been sufficiently triaged. labels May 22, 2024
@lengrongfu
Copy link
Contributor

@tgross35 I can try to submit a PR, can you give me some guidance?

@tgross35
Copy link
Contributor Author

tgross35 commented Jun 6, 2024

Hi @lengrongfu, thanks for the interest!

This should be pretty easy I think. Start by making a test in tests/ui/asm/ that contains the assembly function from my original post. Make sure this fails when you run ./x t --stage 1 path/to/your/new/test.rs.

Then just find where the error is emitted (search the codebase for "cannot use value of type") and work backwards from that until the test passes. This will probably mean adding F16 to InlineAsmType and then chasing down errors.

We will need to make sure that this works on platforms with support (e.g. aarch64) but still fails on those without it (e.g. x86). Just focus on getting aarch64 to build first.

There is a compiler help stream on Zulip https://rust-lang.zulipchat.com/#narrow/stream/182449-t-compiler.2Fhelp feel free to ask if you get stuck! Also not a bad idea to post a draft PR as soon as you have some basic work done, even if not yet passing.

@tgross35 tgross35 changed the title Enable f16 in assembly on platforms that support it Enable f16 and f128 in assembly on platforms that support it Jun 7, 2024
matthiaskrgr added a commit to matthiaskrgr/rust that referenced this issue Jun 7, 2024
Enable f16 in assembly on aarch64 platforms that support it

Issue: rust-lang#125398
matthiaskrgr added a commit to matthiaskrgr/rust that referenced this issue Jun 15, 2024
…r=Amanieu

Add `f16` and `f128` inline ASM support for `x86` and `x86-64`

This PR adds `f16` and `f128` input and output support to inline ASM on `x86` and `x86-64`. `f16` vector sizes are taken from [here](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html).

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128
matthiaskrgr added a commit to matthiaskrgr/rust that referenced this issue Jun 15, 2024
…r=Amanieu

Add `f16` and `f128` inline ASM support for `x86` and `x86-64`

This PR adds `f16` and `f128` input and output support to inline ASM on `x86` and `x86-64`. `f16` vector sizes are taken from [here](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html).

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

``@rustbot`` label +F-f16_and_f128
rust-timer added a commit to rust-lang-ci/rust that referenced this issue Jun 15, 2024
Rollup merge of rust-lang#126417 - beetrees:f16-f128-inline-asm-x86, r=Amanieu

Add `f16` and `f128` inline ASM support for `x86` and `x86-64`

This PR adds `f16` and `f128` input and output support to inline ASM on `x86` and `x86-64`. `f16` vector sizes are taken from [here](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html).

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

``@rustbot`` label +F-f16_and_f128
workingjubilee added a commit to workingjubilee/rustc that referenced this issue Jun 22, 2024
…manieu

Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128
rust-timer added a commit to rust-lang-ci/rust that referenced this issue Jun 22, 2024
Rollup merge of rust-lang#126530 - beetrees:f16-inline-asm-riscv, r=Amanieu

Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128
GuillaumeGomez added a commit to GuillaumeGomez/rust that referenced this issue Jun 22, 2024
…nieu

Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).`

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128
matthiaskrgr added a commit to matthiaskrgr/rust that referenced this issue Jun 22, 2024
…nieu

Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:``@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).``

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

``@rustbot`` label +F-f16_and_f128
rust-timer added a commit to rust-lang-ci/rust that referenced this issue Jun 22, 2024
Rollup merge of rust-lang#126555 - beetrees:f16-inline-asm-arm, r=Amanieu

Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).`

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128
bors added a commit to rust-lang-ci/rust that referenced this issue Aug 27, 2024
…, r=<try>

Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043.

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
bors added a commit to rust-lang-ci/rust that referenced this issue Aug 27, 2024
…, r=<try>

Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043.

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
tgross35 added a commit to tgross35/rust that referenced this issue Aug 27, 2024
…64, r=Amanieu

Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043.

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
rust-timer added a commit to rust-lang-ci/rust that referenced this issue Aug 27, 2024
Rollup merge of rust-lang#129536 - beetrees:f16-f128-inline-asm-aarch64, r=Amanieu

Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043.

Relevant issue: rust-lang#125398
Tracking issue: rust-lang#116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
@ismailarilik
Copy link
Contributor

I think E-easy label should be removed from this issue.

@tgross35
Copy link
Contributor Author

tgross35 commented Oct 8, 2024

Fair enough - it is still pretty easy for a compiler change, but does require some background knowledge.

@tgross35 tgross35 added E-medium Call for participation: Medium difficulty. Experience needed to fix: Intermediate. and removed E-easy Call for participation: Easy difficulty. Experience needed to fix: Not much. Good first issue. labels Oct 8, 2024
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
A-inline-assembly Area: Inline assembly (`asm!(…)`) E-medium Call for participation: Medium difficulty. Experience needed to fix: Intermediate. F-f16_and_f128 `#![feature(f16)]`, `#![feature(f128)]` T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
Projects
None yet
Development

No branches or pull requests

4 participants