JLC now detects BOM mismatch

[gcormier]

Prerequisites

• I have read FAQ
• I use KiKit at least version 1.4.0 (older version are not supported)

KiKit version

latest

KiCAD version

7.0.8

Operating system

Github

Description

As per discussion #604, JLC will now detect the fiducials/etc as missing

Steps to Reproduce

1. Create a panel
2. Export for fabrication
3. Upload to JLC and proceed to the BOM/CPL step.

It would be nice to exclude exporting these. I think clicking "continue" is a bad user experience as it might mask an actual human-error during design where there was something not exported properly. It simply trains users to "ignore errors" when using JLC.

kitritiled-panel_cpl_jlc.csv
kitritiled_bom_jlc.csv
gerbers.zip

[yaqwsx]

Could you please provide us with precise steps to reproduce (source board and exact command). I struggle to reproduce what you observe. When I run this on any of my projects with the upstream version of KiKit (that is panelization + kikit fab jlcpcb), the mousebites, tooling holes and fiducials are not included in the BOM and POS files.

[gcormier]

Yup, I will put something together for you. I'm using KiBot, so I will make sure to provide a native KiKit config file for you :)

[yaqwsx]

If you use KiBot, then you are probably not using KiKit export. KiKit has the fab command that is tailored for specific fab houses and ensure the output is compatible with them. We would have found that out immediately if you provided precise step for reproduction.

I don't know KiBot, but I guess it should have the ability to ignore components. All KiKit added footprints have the prefix KiKit_.

[gcormier]

Hmm good point. The BOM is handled by KiBot. Sorry about that, I will debug a bit further and ask over on the KiBot repo.

[gcormier]

INTI-CMNB/KiBot#516 (reply in thread)

Could you take a look and share your thoughts?