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boards: sensortile_box: Use dts for clocks configuration
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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <[email protected]>
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ABOSTM authored and MaureenHelm committed Apr 30, 2021
1 parent a8da0b9 commit 59a8081
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Showing 2 changed files with 24 additions and 37 deletions.
23 changes: 23 additions & 0 deletions boards/arm/sensortile_box/sensortile_box.dts
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,29 @@
};
};

&clk_hse {
clock-frequency = <DT_FREQ_M(16)>;
status = "okay";
};

&pll {
div-m = <4>;
mul-n = <40>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
current-speed = <115200>;
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38 changes: 1 addition & 37 deletions boards/arm/sensortile_box/sensortile_box_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -3,15 +3,6 @@
CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L4R9XX=y

# 120MHz system clock only in 'boost power' mode. DM00310109, section
# 5.1.7 states that the R1MODE bit must be cleared before system can
# be 120MHz. This requires an update to the stm32 clock control
# driver, so default to 80MHz until then.
# CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000

# 80MHz system clock in 'normal power' mode
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# enable uart driver
CONFIG_SERIAL=y

Expand All @@ -21,36 +12,9 @@ CONFIG_PINMUX=y
# Enable GPIO
CONFIG_GPIO=y

# Clock Configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y

# Use PLLCLK for SYSCLK
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y

# Use HSI (16MHz) to feed into PLL
#CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
CONFIG_CLOCK_STM32_HSE_CLOCK=16000000

CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2

# Produce 80MHz clock at PLLCLK output
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=40

# Comment out above and uncomment below for 120MHz. Note that you
# must have configured the mcu for boost power mode.
# CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=60

# Produce Max (80MHz or 120MHz) HCLK
CONFIG_CLOCK_STM32_AHB_PRESCALER=1

# Produce Max (80MHz or 120MHz) APB1 clocks and APB2 clocks
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
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