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tests: arm_interrupt: remove redundant test case part
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The test case part in test_arm_interrupt, which is
triggering a SysTick IRQ (when SysTick is not used
for system timer implementation), to catch a spurious
interrupt is not really testing what it is designed
for. The reason is that the z_arm_exc_spurious has
be re-designed to be invoked only if the kernel is
built without support for system clock, i.e. with
CONFIG_SYS_CLOCK_EXISTS=n, but this configuration is
not compatible with ZTESTs and is, therefore, never
tested in this test, in any configuration. When the
SysTick is not implemented in the HW, it is not
possible to set the PendSTSET bit, so this is not
possible to execute this part of the test case, anyways.

What we have been catching as an error, here, is the
ASSERT in the sys_clock_isr() weak implementation, but
asserts are verified earlier in this test case, so this
part is really redundant.

Signed-off-by: Ioannis Glaropoulos <[email protected]>
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ioannisg committed Jun 23, 2021
1 parent 7531d2e commit 8cb443c
Showing 1 changed file with 0 additions and 35 deletions.
35 changes: 0 additions & 35 deletions tests/arch/arm/arm_interrupt/src/arm_interrupt.c
Original file line number Diff line number Diff line change
Expand Up @@ -215,15 +215,6 @@ void arm_isr_handler(const void *args)
expected_reason = K_ERR_KERNEL_PANIC;
__ASSERT(0, "Intentional assert\n");
} else if (test_flag == 4) {
#if defined(CONFIG_CPU_CORTEX_M_HAS_SYSTICK)
#if !defined(CONFIG_SYS_CLOCK_EXISTS) || !defined(CONFIG_CORTEX_M_SYSTICK)
expected_reason = K_ERR_CPU_EXCEPTION;
SCB->ICSR |= SCB_ICSR_PENDSTSET_Msk;
__DSB();
__ISB();
#endif
#endif
} else if (test_flag == 5) {
#if defined(CONFIG_HW_STACK_PROTECTION)
/*
* Verify that the Stack Overflow has been reported by the core
Expand Down Expand Up @@ -331,29 +322,6 @@ void test_arm_interrupt(void)
zassert_true(post_flag == j, "Test flag not set by ISR\n");
}

#if defined(CONFIG_CPU_CORTEX_M_HAS_SYSTICK)
#if !defined(CONFIG_SYS_CLOCK_EXISTS) || !defined(CONFIG_CORTEX_M_SYSTICK)
/* Verify that triggering a Cortex-M exception (accidentally) that has
* not been installed in the vector table, leads to the reserved
* exception been called and a resulting CPU fault. We test this using
* the SysTick exception in platforms that are not expecting to use the
* SysTick timer for system timing.
*/

/* The ISR will manually set the SysTick exception to pending state. */
NVIC_SetPendingIRQ(i);
__DSB();
__ISB();

/* Verify that the spurious exception has led to the fault and the
* expected reason variable is reset.
*/
reason = expected_reason;
zassert_equal(reason, -1,
"expected_reason has not been reset (%d)\n", reason);
#endif
#endif

#if defined(CONFIG_HW_STACK_PROTECTION)
/*
* Simulate a stacking error that is caused explicitly by the
Expand All @@ -370,9 +338,6 @@ void test_arm_interrupt(void)
NVIC_EnableIRQ(i);
NVIC_SetPendingIRQ(i);

/* Set test flag so the IRQ handler executes the appropriate case. */
test_flag = 4;

/* Manually set PSP almost at the bottom of the stack. An exception
* entry will make PSP descend below the limit and into the MPU guard
* section (or beyond the address pointed by PSPLIM in ARMv8-M MCUs).
Expand Down

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