stm32: window watchdog (wwdg): invalid interrupts priority for CM0 Series Socs

[str4t0m]

Describe the bug
All stm32 series define default wwdg interrupt priority of 7, but Cortex-M0 only have 2 bits for interrupt priority.

To Reproduce
Steps to reproduce the behavior:

1. enable wwdg.
2. execute watchdog sample or wdt_basic_api test.
3. Assertion fails when the priority is set during driver initialization(z_arm_irq_priority_set()).

Impact
Interrupt priority must be overridden locally, otherwise the application crashes.

[str4t0m]

I will open a corresponding pr later.