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ARM64 SMP support #30676
ARM64 SMP support #30676
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This breaks when we disable
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tagging @vladimir-podbrezsky as well |
Overall changes looks functionally complete. Covers almost all base aspect of SMP from core arch. |
@carlocaione https:/MrVan/zephyr/tree/qemu-smp-v2 I pushed a branch to my github. This branch is based on you #30911 and #30398 PR. |
Can you force push on this PR instead? So we can give it another round of reviews. |
all the dependings PRs have been merged, rebased. |
@carlocaione @sandeepbrcm @jharris-intel @npitre Could I get your R-b? If there are still small issues, I would start a new PR for resolving small issues. If no critical issues, I would prefer to have this PR in. Thanks. |
Re, #30676 (comment) |
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@MrVan arch: arm: aarch64: add SMP support seems good in its current scope.
Few minor comments to complete this from my side.
@MrVan before merging this I'd like to see a new issue with a list of the (minor?) open points to be addressed later, otherwise they are going to be lost. |
Save old_thread to switch_handle for wait_for_thread usage Signed-off-by: Peng Fan <[email protected]>
Export z_arm64_mmu_init for SMP usage Signed-off-by: Peng Fan <[email protected]>
Add SMP support. Note: there is still limitation that we rely on NUM CPUs. And all cpus must be from 0,1,2 and .... Signed-off-by: Peng Fan <[email protected]>
To take the usage of arm arch counter 64bit capability, implement custom arch_busy_wait Signed-off-by: Peng Fan <[email protected]>
Implement smp_timer_init to initialize arch timer of secondary cores. Signed-off-by: Peng Fan <[email protected]>
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Following other ARCHs, add arch_curr_cpu in arch_inlines.h Signed-off-by: Peng Fan <[email protected]>
With _kernel_offset_to_nested, we only able to access the nested counter of the first cpu. Since we are going to support SMP, we need accessing nested from per cpu. To get the current cpu, introduce z_arm64_curr_cpu for asm usage, because arch_curr_cpu could not be compiled in asm code. Signed-off-by: Peng Fan <[email protected]>
Add arch_dcache_range to support flush and invalidate Signed-off-by: Peng Fan <[email protected]>
With timer/gic/cache added, we could add the SMP support. Bringup cores Signed-off-by: Peng Fan <[email protected]>
Add cpu1 node Signed-off-by: Peng Fan <[email protected]>
Select SCHED_IPI_SUPPORTED when SMP enabled. Signed-off-by: Peng Fan <[email protected]>
Support SMP and switch to booting from NS world Signed-off-by: Peng Fan <[email protected]>
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I don't have any other functional comment at the moment considering this is base support.
@jharris-intel can you ACK / NACK this? AFAIK you are the only one besides @MrVan that is actually using these patches on real hardware. |
That's somewhat surprising to me, but sure, I'll take another look. (By the way, if you're looking for a relatively cheap / common dev vehicle, booting bare metal on the Raspberry Pi may not be a bad choice.) |
This patchset includes the PR of #29736, after the PR merged, I'll rebase this PR.