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STM32: Board conversion to DT clock configuration. STM32L4 #34724

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merged 9 commits into from
Apr 30, 2021
Merged

STM32: Board conversion to DT clock configuration. STM32L4 #34724

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1101f49
boards: nucleo_l4r5zi: Use dts for clocks configuration
ABOSTM Apr 29, 2021
1e60e90
boards: nucleo_l412rb_p: Use dts for clocks configuration
ABOSTM Apr 30, 2021
88d3904
boards: nucleo_l432kc: Use dts for clocks configuration
ABOSTM Apr 30, 2021
68d1aa5
boards: nucleo_l433rc_p: Use dts for clocks configuration
ABOSTM Apr 30, 2021
b879323
boards: nucleo_l452re: Use dts for clocks configuration
ABOSTM Apr 30, 2021
270a66a
boards: nucleo_l496zg: Use dts for clocks configuration
ABOSTM Apr 30, 2021
dc32936
boards: stm32l476g_disco: Use dts for clocks configuration
ABOSTM Apr 30, 2021
3e1632e
boards: stm32l496g_disco: Use dts for clocks configuration
ABOSTM Apr 30, 2021
5eea241
boards: sensortile_box: Use dts for clocks configuration
ABOSTM Apr 30, 2021
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21 changes: 21 additions & 0 deletions boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,27 @@
};
};

&clk_hsi {
status = "okay";
};

&pll {
div-m = <1>;
mul-n = <10>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
current-speed = <115200>;
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16 changes: 1 addition & 15 deletions boards/arm/nucleo_l412rb_p/nucleo_l412rb_p_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L412XX=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# Enable MPU
CONFIG_ARM_MPU=y
Expand All @@ -24,17 +22,5 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=10
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
22 changes: 22 additions & 0 deletions boards/arm/nucleo_l432kc/nucleo_l432kc.dts
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Expand Up @@ -33,6 +33,28 @@
};
};

&clk_hsi {
status = "okay";
};

&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
current-speed = <115200>;
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17 changes: 1 addition & 16 deletions boards/arm/nucleo_l432kc/nucleo_l432kc_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L432XX=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# Enable MPU
CONFIG_ARM_MPU=y
Expand All @@ -20,21 +18,8 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

# console
CONFIG_CONSOLE=y
Expand Down
22 changes: 22 additions & 0 deletions boards/arm/nucleo_l433rc_p/nucleo_l433rc_p.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,28 @@
};
};

&clk_hsi {
status = "okay";
};

&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
current-speed = <115200>;
Expand Down
17 changes: 1 addition & 16 deletions boards/arm/nucleo_l433rc_p/nucleo_l433rc_p_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L433XX=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# Enable MPU
CONFIG_ARM_MPU=y
Expand All @@ -20,21 +18,8 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

# console
CONFIG_CONSOLE=y
Expand Down
22 changes: 22 additions & 0 deletions boards/arm/nucleo_l452re/nucleo_l452re_common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,28 @@
};
};

&clk_hsi {
status = "okay";
};

&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
current-speed = <115200>;
Expand Down
17 changes: 1 addition & 16 deletions boards/arm/nucleo_l452re/nucleo_l452re_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L452XX=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# enable uart driver
CONFIG_SERIAL=y
Expand All @@ -20,21 +18,8 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

# console
CONFIG_CONSOLE=y
Expand Down
17 changes: 1 addition & 16 deletions boards/arm/nucleo_l452re/nucleo_l452re_p_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L452XX=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# enable uart driver
CONFIG_SERIAL=y
Expand All @@ -20,21 +18,8 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

# console
CONFIG_CONSOLE=y
Expand Down
22 changes: 22 additions & 0 deletions boards/arm/nucleo_l496zg/nucleo_l496zg.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,28 @@
};
};

&clk_hsi {
status = "okay";
};

&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
current-speed = <115200>;
Expand Down
17 changes: 1 addition & 16 deletions boards/arm/nucleo_l496zg/nucleo_l496zg_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32L4X=y
CONFIG_SOC_STM32L496XX=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000

# enable uart driver
CONFIG_SERIAL=y
Expand All @@ -14,21 +12,8 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 80MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

# console
CONFIG_CONSOLE=y
Expand Down
22 changes: 22 additions & 0 deletions boards/arm/nucleo_l4r5zi/nucleo_l4r5zi.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,28 @@
};
};

&clk_hsi {
status = "okay";
};

&pll {
div-m = <4>;
mul-n = <40>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
current-speed = <115200>;
Expand Down
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