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Use 'synopsys' pragma to disable sim code for synth/lint
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calebofearth committed Sep 24, 2024
1 parent 9a09f8f commit 5f2f567
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions src/axi/rtl/axi_if.sv
Original file line number Diff line number Diff line change
Expand Up @@ -155,7 +155,7 @@ interface axi_if #(parameter integer AW = 32, parameter integer DW = 32, paramet
input bready
);

// synthesis translate_off
// synopsys translate_off

// Tasks
`ifdef VERILATOR
Expand Down Expand Up @@ -363,6 +363,6 @@ interface axi_if #(parameter integer AW = 32, parameter integer DW = 32, paramet
`undef EQ__
`undef TIME_ALGN

// synthesis translate_on
// synopsys translate_on

endinterface

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