Squashed commit of the following:

commit e08900f Author: Michael Norris <[email protected]> Date: Thu Mar 28 11:00:58 2024 -0700 rolling back packed struct removal enabling lint on integrated TRNG files fixes for integrated TRNG lint violations commit 75ecd6c Author: Michael Norris <[email protected]> Date: Wed Mar 27 12:59:24 2024 -0700 fixing lint errors from LMS changes commit 3049b98 Author: Caleb Whitehead <[email protected]> Date: Thu Mar 28 16:44:43 2024 -0700 Squashed commit of the following: commit f03b9ba Merge: bc73a52 55f5f95 Author: Michael Norris <[email protected]> Date: Wed Mar 27 12:51:20 2024 -0700 Merge remote-tracking branch 'chips/main' into user/dev/michnorris/lint_fix commit bc73a52 Author: Michael Norris <[email protected]> Date: Wed Mar 27 12:45:42 2024 -0700 removing change from other lint pr branch, not sure where it came from. commit 697a740 Author: Michael Norris <[email protected]> Date: Wed Mar 27 12:20:42 2024 -0700 removing lint blackboxes removed packed struct post processing from generated reg files. cast width of dynamic shifts to make lint happy casting some arithmetic widths, math parameter widths etc commit a16581d Author: Michael Norris <[email protected]> Date: Tue Mar 26 15:00:06 2024 -0700 initial round of lint fixes
chipsalliance · Mar 29, 2024 · fae37d0 · fae37d0
1 parent 4c9e86c
commit fae37d0
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Showing 44 changed files with 164 additions and 144 deletions.
diff --git a/src/aes/config/compile.yml b/src/aes/config/compile.yml
@@ -39,3 +39,7 @@ targets:
  - $COMPILE_ROOT/rtl/aes_prng_masking.sv
  - $COMPILE_ROOT/rtl/aes_key_expand.sv
  tops: [aes_cipher_core]
+ rtl_lint:
+ directories: []
+ waiver_files: []
+ tops: [aes_cipher_core]
diff --git a/src/aes/rtl/aes_pkg.sv b/src/aes/rtl/aes_pkg.sv
@@ -68,7 +68,7 @@ parameter masking_lfsr_perm_t RndCnstMaskingLfsrPermDefault = {
  256'h808d419d63982a16995e0e3b57826a36718a9329452492533d83115a75316e15
 };
 
-typedef enum integer {
+typedef enum logic [31:0] {
  SBoxImplLut, // Unmasked LUT-based S-Box
  SBoxImplCanright, // Unmasked Canright S-Box, see aes_sbox_canright.sv
  SBoxImplCanrightMasked, // First-order masked Canright S-Box

diff --git a/src/aes/rtl/aes_reg_pkg.sv b/src/aes/rtl/aes_reg_pkg.sv
@@ -336,7 +336,7 @@ package aes_reg_pkg;
  parameter logic [0:0] AES_CTRL_SHADOWED_MANUAL_OPERATION_RESVAL = 1'h 0;
 
  // Register index
- typedef enum int {
+ typedef enum logic [31:0] {
  AES_ALERT_TEST,
  AES_KEY_SHARE0_0,
  AES_KEY_SHARE0_1,

diff --git a/src/caliptra_prim/rtl/caliptra_prim_packer_fifo.sv b/src/caliptra_prim/rtl/caliptra_prim_packer_fifo.sv
@@ -132,7 +132,7 @@ module caliptra_prim_packer_fifo #(
 
  assign lsb_is_one = {{DepthW{1'b0}},1'b1};
  assign max_value = FullDepth;
- assign rdata_shifted = data_q >> ptr_q*OutW;
+ assign rdata_shifted = MaxW'(data_q >> ptr_q*OutW);
  assign clear_status = (rready_i && (depth_q == lsb_is_one)) || clr_q;
  assign clear_data = (ClearOnRead && clear_status) || clr_q;
  assign load_data = wvalid_i && wready_o;

diff --git a/src/caliptra_prim/rtl/caliptra_prim_pkg.sv b/src/caliptra_prim/rtl/caliptra_prim_pkg.sv
@@ -9,7 +9,7 @@
 package caliptra_prim_pkg;
 
  // Implementation target specialization
- typedef enum integer {
+ typedef enum logic [31:0] {
  ImplGeneric,
  ImplXilinx,
  ImplBadbit

diff --git a/src/csrng/config/compile.yml b/src/csrng/config/compile.yml
@@ -41,6 +41,11 @@ targets:
  - $COMPILE_ROOT/rtl/csrng_cmd_stage.sv
  - $COMPILE_ROOT/rtl/csrng.sv
  tops: [csrng]
+ rtl_lint:
+ directories: []
+ waiver_files:
+ - $MSFT_REPO_ROOT/src/csrng/config/design_lint/sglint_waivers
+ tops: [csrng]
 ---
 provides: [csrng_tb]
 schema_version: 2.4.0

diff --git a/src/csrng/rtl/csrng_reg_pkg.sv b/src/csrng/rtl/csrng_reg_pkg.sv
@@ -364,7 +364,7 @@ package csrng_reg_pkg;
  parameter logic [31:0] CSRNG_INT_STATE_VAL_RESVAL = 32'h 0;
 
  // Register index
- typedef enum int {
+ typedef enum logic [31:0] {
  CSRNG_INTR_STATE,
  CSRNG_INTR_ENABLE,
  CSRNG_INTR_TEST,

diff --git a/src/datavault/config/compile.yml b/src/datavault/config/compile.yml
@@ -37,8 +37,6 @@ targets:
  directories: []
  waiver_files:
  - $COMPILE_ROOT/config/design_lint/datavault/sglint_waivers
- black_box:
- - dv_reg
 global:
  tool:
  vcs:

diff --git a/src/doe/config/compile.yml b/src/doe/config/compile.yml
@@ -39,8 +39,6 @@ targets:
  directories: []
  waiver_files:
  - $COMPILE_ROOT/config/design_lint/doe_ctrl/sglint_waivers
- black_box:
- - doe_reg
 ---
 provides: [doe_cbc_tb] 
 schema_version: 2.4.0

diff --git a/src/ecc/config/compile.yml b/src/ecc/config/compile.yml
@@ -41,8 +41,6 @@ targets:
  directories: []
  waiver_files:
  - $COMPILE_ROOT/config/design_lint/ecc_top/sglint_waivers
- black_box:
- - ecc_reg
 ---
 provides: [ecc_top_tb] 
 schema_version: 2.4.0

diff --git a/src/ecc/rtl/ecc_add_sub_mod_alter.sv b/src/ecc/rtl/ecc_add_sub_mod_alter.sv
@@ -105,7 +105,7 @@ module ecc_add_sub_mod_alter #(
  else if (add_en_i)
  push_result_reg <= 2'b10;
  else // one shift to right
- push_result_reg <= (push_result_reg >> 1);
+ push_result_reg <= 2'(push_result_reg >> 1);
  end
 
  assign ready_o = push_result_reg[0];

diff --git a/src/ecc/rtl/ecc_dsa_ctrl.sv b/src/ecc/rtl/ecc_dsa_ctrl.sv
@@ -297,7 +297,7 @@ module ecc_dsa_ctrl
 
  always_comb 
  begin : SCA_config
- scalar_out_reg = (sca_scalar_rnd_en)? scalar_out : (scalar_in_reg << RND_SIZE);
+ scalar_out_reg = (sca_scalar_rnd_en)? scalar_out : (REG_SIZE+RND_SIZE)'(scalar_in_reg << RND_SIZE);
  lambda_reg = (sca_point_rnd_en)? lambda : ONE_CONST;
  masking_rnd_reg = (sca_mask_sign_en)? masking_rnd : ZERO_CONST;
  end // SCA_config
@@ -595,8 +595,8 @@ module ecc_dsa_ctrl
  end
  else if (prog_instr.opcode == DSA_UOP_WR_SCALAR) begin
  unique case (prog_instr.reg_id)
- SCALAR_PK_ID : write_reg = (scalar_PK_reg << RND_SIZE);
- SCALAR_G_ID : write_reg = (scalar_G_reg << RND_SIZE);
+ SCALAR_PK_ID : write_reg = (REG_SIZE+RND_SIZE)'(scalar_PK_reg << RND_SIZE);
+ SCALAR_G_ID : write_reg = (REG_SIZE+RND_SIZE)'(scalar_G_reg << RND_SIZE);
  SCALAR_ID : write_reg = scalar_out_reg; // SCA
  default : write_reg = '0;
  endcase

diff --git a/src/entropy_src/config/compile.yml b/src/entropy_src/config/compile.yml
@@ -43,6 +43,11 @@ targets:
  - $COMPILE_ROOT/rtl/entropy_src_ack_sm.sv
  - $COMPILE_ROOT/rtl/entropy_src.sv
  tops: [entropy_src]
+ rtl_lint:
+ directories: []
+ waiver_files:
+ - $MSFT_REPO_ROOT/src/entropy_src/config/design_lint/sglint_waivers
+ tops: [entropy_src]
  tb:
  directories: [$COMPILE_ROOT/tb]
  files:

diff --git a/src/entropy_src/rtl/entropy_src_reg_pkg.sv b/src/entropy_src/rtl/entropy_src_reg_pkg.sv
@@ -893,7 +893,7 @@ package entropy_src_reg_pkg;
  parameter logic [0:0] ENTROPY_SRC_DEBUG_STATUS_MAIN_SM_IDLE_RESVAL = 1'h 1;
 
  // Register index
- typedef enum int {
+ typedef enum logic [31:0] {
  ENTROPY_SRC_INTR_STATE,
  ENTROPY_SRC_INTR_ENABLE,
  ENTROPY_SRC_INTR_TEST,

diff --git a/src/entropy_src/rtl/entropy_src_watermark_reg.sv b/src/entropy_src/rtl/entropy_src_watermark_reg.sv
@@ -26,29 +26,40 @@ module entropy_src_watermark_reg #(
  // flops
  logic [RegWidth-1:0] event_cntr_q, event_cntr_d;
 
- always_ff @(posedge clk_i or negedge rst_ni)
- if (!rst_ni) begin
- event_cntr_q <= reg_reset;
- end else begin
- event_cntr_q <= event_cntr_d;
- end
-
- assign event_cntr_d = clear_i ? reg_reset :
- event_i ? event_cntr_change :
- event_cntr_q;
-
  // Set mode of this counter to be either a high or low watermark
  if (HighWatermark) begin : gen_hi_wm
 
  assign reg_reset = {RegWidth{1'b0}};
 
  assign event_cntr_change = (value_i > event_cntr_q) ? (value_i) : event_cntr_q;
+
+ assign event_cntr_d = clear_i ? reg_reset :
+ event_i ? event_cntr_change :
+ event_cntr_q;
+
+ always_ff @(posedge clk_i or negedge rst_ni)
+ if (!rst_ni) begin
+ event_cntr_q <= {RegWidth{1'b0}};
+ end else begin
+ event_cntr_q <= event_cntr_d;
+ end
 
  end else begin : gen_lo_wm
 
  assign reg_reset = {RegWidth{1'b1}};
 
  assign event_cntr_change = (value_i < event_cntr_q) ? (value_i) : event_cntr_q;
+
+ assign event_cntr_d = clear_i ? reg_reset :
+ event_i ? event_cntr_change :
+ event_cntr_q;
+
+ always_ff @(posedge clk_i or negedge rst_ni)
+ if (!rst_ni) begin
+ event_cntr_q <= {RegWidth{1'b1}};
+ end else begin
+ event_cntr_q <= event_cntr_d;
+ end
 
  end
 

diff --git a/src/hmac/config/compile.yml b/src/hmac/config/compile.yml
@@ -20,8 +20,6 @@ targets:
  directories: []
  waiver_files: 
  - $COMPILE_ROOT/config/design_lint/hmac_ctrl/sglint_waivers
- black_box:
- - hmac_reg
 ---
 provides: [hmac_ctrl_tb] 
 schema_version: 2.4.0