Merge dev-integrate --> main

src/aes/config/aes.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl

src/aes/config/aes_pkg.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl

src/aes/rtl/aes_cipher_control.sv

@@ -8,7 +8,9 @@
 
 `include "caliptra_prim_assert.sv"
 
-module aes_cipher_control import aes_pkg::*;
+module aes_cipher_control 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter bit SecMasking = 0,
  parameter sbox_impl_e SecSBoxImpl = SBoxImplDom

src/aes/rtl/aes_cipher_control_fsm.sv

@@ -8,7 +8,9 @@
 
 `include "caliptra_prim_assert.sv"
 
-module aes_cipher_control_fsm import aes_pkg::*;
+module aes_cipher_control_fsm 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter bit SecMasking = 0,
  parameter sbox_impl_e SecSBoxImpl = SBoxImplDom

src/aes/rtl/aes_cipher_control_fsm_n.sv

@@ -11,7 +11,9 @@
 // - inverting these signals between the regular FSM and the caliptra_prim_buf synthesis barriers.
 // Synthesis tools will then push the inverters into the actual FSM.
 
-module aes_cipher_control_fsm_n import aes_pkg::*;
+module aes_cipher_control_fsm_n 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter bit SecMasking = 0,
  parameter sbox_impl_e SecSBoxImpl = SBoxImplDom

src/aes/rtl/aes_cipher_control_fsm_p.sv

@@ -7,7 +7,9 @@
 // This module contains the AES cipher core control FSM operating on
 // and producing the positive values of important control signals.
 
-module aes_cipher_control_fsm_p import aes_pkg::*;
+module aes_cipher_control_fsm_p 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter bit SecMasking = 0,
  parameter sbox_impl_e SecSBoxImpl = SBoxImplDom

src/aes/rtl/aes_cipher_core.sv

@@ -92,7 +92,9 @@
 
 `include "caliptra_prim_assert.sv"
 
-module aes_cipher_core import aes_pkg::*;
+module aes_cipher_core 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter bit AES192Enable = 1,
  parameter bit SecMasking = 1,

src/aes/rtl/aes_key_expand.sv

@@ -6,7 +6,9 @@
 
 `include "caliptra_prim_assert.sv"
 
-module aes_key_expand import aes_pkg::*;
+module aes_key_expand 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter bit AES192Enable = 1,
  parameter bit SecMasking = 0,

src/aes/rtl/aes_mix_columns.sv

@@ -10,6 +10,7 @@ module aes_mix_columns (
  output logic [3:0][3:0][7:0] data_o
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
 
  // Transpose to operate on columns

src/aes/rtl/aes_mix_single_column.sv

@@ -13,6 +13,7 @@ module aes_mix_single_column (
  output logic [3:0][7:0] data_o
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
 
  logic [3:0][7:0] x;

src/aes/rtl/aes_prng_masking.sv

@@ -20,7 +20,9 @@
 
 `include "caliptra_prim_assert.sv"
 
-module aes_prng_masking import aes_pkg::*;
+module aes_prng_masking 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter int unsigned Width = WidthPRDMasking, // Must be divisble by ChunkSize and 8
  parameter int unsigned ChunkSize = ChunkSizePRDMasking, // Width of the LFSR primitives

src/aes/rtl/aes_sbox.sv

@@ -6,7 +6,9 @@
 
 `include "caliptra_prim_assert.sv"
 
-module aes_sbox import aes_pkg::*;
+module aes_sbox 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter sbox_impl_e SecSBoxImpl = SBoxImplLut
 ) (

src/aes/rtl/aes_sbox_canright.sv

@@ -13,6 +13,7 @@ module aes_sbox_canright (
  output logic [7:0] data_o
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
  import aes_sbox_canright_pkg::*;
 

src/aes/rtl/aes_sbox_canright_masked.sv

@@ -40,6 +40,7 @@ module aes_masked_inverse_gf2p4 (
  output logic [3:0] b_inv
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
  import aes_sbox_canright_pkg::*;
 

src/aes/rtl/aes_sbox_canright_masked_noreuse.sv

@@ -39,6 +39,7 @@ module aes_masked_inverse_gf2p4_noreuse (
  output logic [3:0] b_inv
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
  import aes_sbox_canright_pkg::*;
 

src/aes/rtl/aes_sbox_dom.sv

@@ -1000,6 +1000,7 @@ module aes_sbox_dom
  output logic [19:0] prd_o // PRD for usage in Stages 2 - 4 of other S-Box instances
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
  import aes_sbox_canright_pkg::*;
 

src/aes/rtl/aes_sbox_lut.sv

@@ -10,6 +10,7 @@ module aes_sbox_lut (
  output logic [7:0] data_o
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
 
  // Define the LUTs

src/aes/rtl/aes_sel_buf_chk.sv

@@ -23,6 +23,7 @@ module aes_sel_buf_chk #(
  output logic err_o
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
 
  // Tie off unused inputs.

src/aes/rtl/aes_shift_rows.sv

@@ -10,6 +10,7 @@ module aes_shift_rows (
  output logic [3:0][3:0][7:0] data_o
 );
 
+ import aes_reg_pkg::*;
  import aes_pkg::*;
 
  // Row 0 is left untouched

src/aes/rtl/aes_sub_bytes.sv

@@ -4,7 +4,9 @@
 //
 // AES SubBytes
 
-module aes_sub_bytes import aes_pkg::*;
+module aes_sub_bytes 
+ import aes_reg_pkg::*;
+ import aes_pkg::*;
 #(
  parameter sbox_impl_e SecSBoxImpl = SBoxImplDom
 ) (

src/ahb_lite_bus/config/ahb_lite_bus.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/ahb_lite_bus/rtl

src/ahb_lite_bus/rtl/ahb_lite_bus.sv

@@ -36,7 +36,7 @@ module ahb_lite_bus #(
  // --------------------------------------
  // Responder Interface Port
  // --------------------------------------
- CALIPTRA_AHB_LITE_BUS_INF.Responder_Interface_Ports ahb_lite_responders[NUM_RESPONDERS-1:0],
+ CALIPTRA_AHB_LITE_BUS_INF.Responder_Interface_Ports ahb_lite_responders[0:NUM_RESPONDERS-1],
 
  // ----------------------------------------------
  // Respnder Disable

src/caliptra_prim/config/caliptra_prim.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl

src/caliptra_prim/config/caliptra_prim_pkg.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl
 ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_util_pkg.sv
 ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_alert_pkg.sv

src/caliptra_prim/rtl/caliptra_prim_lc_sync.sv

@@ -10,7 +10,11 @@
 
 `include "caliptra_prim_assert.sv"
 
-module caliptra_prim_lc_sync #(
+module caliptra_prim_lc_sync 
+ import lc_ctrl_state_pkg::*;
+ import lc_ctrl_reg_pkg::*;
+ import lc_ctrl_pkg::*;
+#(
  // Number of separately buffered output signals.
  // The buffer cells have a don't touch constraint
  // on them such that synthesis tools won't collapse

src/caliptra_prim_generic/config/caliptra_prim_generic.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl
 ${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop_en.sv
 ${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop.sv

src/csrng/config/csrng.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl

src/csrng/config/csrng_pkg.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/entropy_src/rtl
 +incdir+${CALIPTRA_ROOT}/src/csrng/rtl
 ${CALIPTRA_ROOT}/src/entropy_src/rtl/entropy_src_main_sm_pkg.sv

src/csrng/config/csrng_tb.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl

src/csrng/rtl/csrng.sv

@@ -9,9 +9,12 @@
 module csrng
  import csrng_pkg::*;
  import csrng_reg_pkg::*;
+ import lc_ctrl_state_pkg::*;
+ import lc_ctrl_reg_pkg::*;
+ import lc_ctrl_pkg::*;
 #(
  parameter aes_pkg::sbox_impl_e SBoxImpl = aes_pkg::SBoxImplCanright,
- parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
+ parameter logic [csrng_reg_pkg::NumAlerts-1:0] AlertAsyncOn = {csrng_reg_pkg::NumAlerts{1'b1}},
  parameter int NHwApps = 2,
  parameter cs_keymgr_div_t RndCnstCsKeymgrDivNonProduction = CsKeymgrDivWidth'(0),
  parameter cs_keymgr_div_t RndCnstCsKeymgrDivProduction = CsKeymgrDivWidth'(0),
@@ -56,8 +59,8 @@ module csrng
  output csrng_rsp_t [NHwApps-1:0] csrng_cmd_o,
 
  // Alerts
- input caliptra_prim_alert_pkg::alert_rx_t [NumAlerts-1:0] alert_rx_i,
- output caliptra_prim_alert_pkg::alert_tx_t [NumAlerts-1:0] alert_tx_o,
+ input caliptra_prim_alert_pkg::alert_rx_t [csrng_reg_pkg::NumAlerts-1:0] alert_rx_i,
+ output caliptra_prim_alert_pkg::alert_tx_t [csrng_reg_pkg::NumAlerts-1:0] alert_tx_o,
 
  // Interrupts
  output logic intr_cs_cmd_req_done_o,
@@ -69,10 +72,10 @@ module csrng
  csrng_reg2hw_t reg2hw;
  csrng_hw2reg_t hw2reg;
 
- logic [NumAlerts-1:0] alert_test;
- logic [NumAlerts-1:0] alert;
+ logic [csrng_reg_pkg::NumAlerts-1:0] alert_test;
+ logic [csrng_reg_pkg::NumAlerts-1:0] alert;
 
- logic [NumAlerts-1:0] intg_err_alert;
+ logic [csrng_reg_pkg::NumAlerts-1:0] intg_err_alert;
  assign intg_err_alert[0] = 1'b0;
 
  // SEC_CM: CONFIG.REGWEN
@@ -143,7 +146,7 @@ module csrng
  ///////////////////////////
  // Alert generation
  ///////////////////////////
- for (genvar i = 0; i < NumAlerts; i++) begin : gen_alert_tx
+ for (genvar i = 0; i < csrng_reg_pkg::NumAlerts; i++) begin : gen_alert_tx
  caliptra_prim_alert_sender #(
  .AsyncOn(AlertAsyncOn[i]),
  .IsFatal(i)

src/csrng/rtl/csrng_core.sv

@@ -6,7 +6,12 @@
 //
 
 
-module csrng_core import csrng_pkg::*; #(
+module csrng_core 
+ import csrng_pkg::*; 
+ import lc_ctrl_state_pkg::*;
+ import lc_ctrl_reg_pkg::*;
+ import lc_ctrl_pkg::*;
+#(
  parameter aes_pkg::sbox_impl_e SBoxImpl = aes_pkg::SBoxImplLut,
  parameter int NHwApps = 2,
  parameter cs_keymgr_div_t RndCnstCsKeymgrDivNonProduction = CsKeymgrDivWidth'(0),

src/datavault/config/datavault.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/datavault/rtl

src/datavault/config/dv_defines_pkg.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/datavault/rtl
 ${CALIPTRA_ROOT}/src/datavault/rtl/dv_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/datavault/rtl/dv_defines_pkg.sv

src/datavault/config/dv_uvm_pkg.vf

@@ -1,2 +1,3 @@
+
 +incdir+${CALIPTRA_ROOT}/src/datavault/rtl
 ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_uvm.sv

src/doe/config/doe_cbc_tb.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl

src/doe/config/doe_core_cbc_tb.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl

src/doe/config/doe_ctrl.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl

src/doe/config/doe_defines_pkg.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/doe/rtl
 ${CALIPTRA_ROOT}/src/doe/rtl/doe_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/doe/rtl/doe_defines_pkg.sv

src/ecc/config/ecc_montgomerymultiplier_tb.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl

src/ecc/config/ecc_top.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl

src/ecc/config/ecc_top_tb.vf

@@ -1,3 +1,4 @@
+
 +incdir+${CALIPTRA_ROOT}/src/integration/rtl
 +incdir+${CALIPTRA_ROOT}/src/libs/rtl
 +incdir+${CALIPTRA_ROOT}/src/keyvault/rtl

src/ecc/coverage/ecc_top_cov_if.sv

@@ -34,6 +34,7 @@ interface ecc_top_cov_if
  logic error_flag;
  logic privkey_input_outofrange;
  logic r_output_outofrange;
+ logic s_output_outofrange;
  logic r_input_outofrange;
  logic s_input_outofrange;
  logic pubkeyx_input_outofrange;
@@ -93,6 +94,7 @@ interface ecc_top_cov_if
  assign error_flag = ecc_top.ecc_dsa_ctrl_i.error_flag;
  assign privkey_input_outofrange = ecc_top.ecc_dsa_ctrl_i.privkey_input_outofrange;
  assign r_output_outofrange = ecc_top.ecc_dsa_ctrl_i.r_output_outofrange;
+ assign s_output_outofrange = ecc_top.ecc_dsa_ctrl_i.s_output_outofrange;
  assign r_input_outofrange = ecc_top.ecc_dsa_ctrl_i.r_input_outofrange;
  assign s_input_outofrange = ecc_top.ecc_dsa_ctrl_i.s_input_outofrange;
  assign pubkeyx_input_outofrange = ecc_top.ecc_dsa_ctrl_i.pubkeyx_input_outofrange;
@@ -118,6 +120,7 @@ interface ecc_top_cov_if
  error_flag_cp: coverpoint error_flag;
  privkey_input_outofrange_cp: coverpoint privkey_input_outofrange;
  r_output_outofrange_cp: coverpoint r_output_outofrange;
+ s_output_outofrange_cp: coverpoint s_output_outofrange;
  r_input_outofrange_cp: coverpoint r_input_outofrange;
  s_input_outofrange_cp: coverpoint s_input_outofrange;
  pubkeyx_input_outofrange_cp: coverpoint pubkeyx_input_outofrange;