[test] Add DVsim support for the activity-checking part of power virus test #17800
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bilgiday
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cindychip
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minor comment, otherwise this looks great @bilgiday , thanks!
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…s test - C code: - Add adc_ctrl enablement code. - Fix pwm enablement code by adding phase_counter enablement. - chip_if.sv: - Add SignalProbe macros to monitor the states' of the active IPs - *_vseq.sv: - Modify the DV_WAIT macro's message to bring the activity closer the start of max power epoch. - Add a utility function to verify that all IPs are active at the beginning of the max-power epoch. Signed-off-by: Bilgiday Yuce <[email protected]>
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C code:
chip_if.sv:
*_vseq.sv:
Checked DVsim on my local branch.