drivers: gpio: Add PSoC-6 GPIO driver #29489
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nandojve
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area: Boards
area: Devicetree
area: Devicetree Binding
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Update <soc.h> include files. This removes the unnecessary <kernel_includes.h> file. In addition, add <sys/util.h> to expose macros and <devicetree.h> following general standards. Signed-off-by: Gerson Fernando Budke <[email protected]>
The psoc6.dtsi file declare a reference to nvic. Since it was proper defined at psoc6_cm0/4.dtsi files this entry is redundant. Drop the useless entry. Signed-off-by: Gerson Fernando Budke <[email protected]>
PSoC-6 SoC needs that user define the nvic interrupt number to bind with the peripheral interrupt line for the Cortex-M0+ CPU. It uses a multiplex before any NVIC interrupt line. The interrupt vector is selected using interrupt-parent property with the intmux_chN number reference. Note: The PSoC-6 SoC allows that both CPUs receive the same interrupt. A tipical use is GPIO interrupt handle and user is responsable to define interrupt line, priority and take care of enable same peripheral instance on both CPUs only when appropriated. Signed-off-by: Gerson Fernando Budke <[email protected]>
Introduce PSoC-6 GPIO support. Signed-off-by: Gerson Fernando Budke <[email protected]>
Add LED and switch DTS information. Port P0 received the NVIC line 20 on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external interrupt source for both m0 and m4 cpus. Signed-off-by: Gerson Fernando Budke <[email protected]>
Add LED and switch DTS information. Port P0 received the NVIC line 20 on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external interrupt source for both m0 and m4 cpus. Signed-off-by: Gerson Fernando Budke <[email protected]>
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mbolivar-nordic
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Jan 8, 2021
mnkp
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Jan 14, 2021
galak
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Jan 20, 2021
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Will need to re-open/create a new PR as incorrectly merged this PR. I've fixed the master tree and this will need to get re-submitted. |
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@pabigot |
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Add GPIO driver with external interrupt capabilities. This allows m0 to enable ext-int on port-x, m4 to enable ext-int on port-x and/or both m0/4 enabling at same time ext-int on port-x. The use is application defined, for instance, allows sync external events.
The cy8ckit_062_ble board receives m0 binds for LED and switch. This allows evaluate GPIO and Ext-Int using <samples/basic/button>
This PR have
twothree commits from #29459 and should be merged after #29459.