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linker: aarch32: simplify memory region generation #34185

Merged
merged 5 commits into from
Apr 15, 2021
Merged

linker: aarch32: simplify memory region generation #34185

merged 5 commits into from
Apr 15, 2021

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JordanYates
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Generating linker memory regions from devicetree nodes is a common pattern in the linker script. This PR adds a macro which automatically generates a region given a devicetree node. The macro is then used in the linker script to cleanup definitions.

Dedicated devicetree nodes are created for SRAM1 and SRAM2 for the STM32WB family to facilitate macro usage.
The TI_CCFG registers are redefined as a partition on flash0 to enable more cleanup.

@JordanYates
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@galak This contains the standalone linker cleanup from #33656

Adds a public macro for creating memory regions from devicetree nodes.
`DT_REGION_FROM_NODE_STATUS_OKAY` declares the memory regions for
consumption by ld, assuming the node exists and has `status = "okay"`.

Signed-off-by: Jordan Yates <[email protected]>
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@erwango erwango left a comment

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Minor changes requested but otherwise welcomed addition, thanks!

include/arch/arm/aarch32/cortex_m/scripts/linker.ld Outdated Show resolved Hide resolved
include/arch/arm/aarch32/cortex_m/scripts/linker.ld Outdated Show resolved Hide resolved
Jordan Yates added 4 commits April 12, 2021 19:33
Simplify the linker script by using the helper macros introduced in
<linker/devicetree_regions.h>. The conditional checks on the Kconfig
symbols are discarded as their default values are typically set via
the status="okay" property of the nodes, and hence the behaviour doesn't
change.

Signed-off-by: Jordan Yates <[email protected]>
Move the definition of the two IPC RAM blocks from `#define`'s in family
linker scripts to proper devicetree nodes. Use the devicetree nodes to
generate the memory regions.

Signed-off-by: Jordan Yates <[email protected]>
Define the FLASH_CCFG memory region from a devicetree partition instead
of from math in the linker file. Removing the special math case results
in the FLASH_CCFG region overlapping the FLASH region, but the linker
accepts this until the FLASH region actually starts placing variables
in the FLASH_CCFG region.

As a result, applications that don't fit in (FLASH_SIZE - 88) bytes will
still fail to link, just with an overlapping memory region error instead
of an overflow error.

Signed-off-by: Jordan Yates <[email protected]>
Move the TI_CCFG linker section code into a dedicated snippet in the soc
directory.

Signed-off-by: Jordan Yates <[email protected]>
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@tejlmand tejlmand left a comment

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Nice cleanup, thanks. 👍

@carlescufi carlescufi merged commit 18d3f4d into zephyrproject-rtos:master Apr 15, 2021
@ioannisg
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Nice work here - sorry I had no chance to review this.

@JordanYates JordanYates deleted the 210410_linker_macros branch April 15, 2021 22:17
@MaureenHelm
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Turns out this broke code relocation to these regions, as the relocation script expects <region name>_ADDR to be defined (i.e., ITCM_ADDR). This affects #33701, which relocates flash driver code to ITCM.

cc: @pdgendt @mmahadevan108

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@MaureenHelm is there a sample which produces the error, or can be modified to produce it?
I'm not sure which relocation script is the problem, nor can I find where <region name>_ADDR is expected.

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pdgendt commented Apr 16, 2021

@JordanYates the relocate script uses the <region name>_ADDR

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@pdgendt thanks for that link, can you provide a board & sample which fails to build?

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pdgendt commented Apr 16, 2021

@JordanYates you can build samples/drivers/flash_shell/ for mimxrt1064_evk but you have to enable the following in prj.conf:

CONFIG_FLASH_MCUX_FLEXSPI_NOR=y
CONFIG_FLASH_MCUX_FLEXSPI_XIP=y

@JordanYates
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@pdgendt #34331 should fix the issue.

MaureenHelm pushed a commit that referenced this pull request Apr 16, 2021
With the addition of #34185, it is not longer gauranteed that for a
memory region `NAME` there exists a symbol `NAME_ADDR`. Use the linker
builtin function `ORIGIN` to instead directly get the start address of
the selected memory region.

Signed-off-by: Jordan Yates <[email protected]>
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area: API Changes to public APIs area: ARM ARM (32-bit) Architecture area: Devicetree platform: STM32 ST Micro STM32
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7 participants